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https://github.com/adulau/aha.git
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drivers/parisc: replace remaining __FUNCTION__ occurrences
__FUNCTION__ is gcc-specific, use __func__ Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
This commit is contained in:
Harvey Harrison
Kyle McMartin
parent
91bae23ce1
commit
a8043ecb17
9 changed files with 63 additions and 63 deletions
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@ -88,7 +88,7 @@ asp_init_chip(struct parisc_device *dev)
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ret = -EBUSY;
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dev->irq = gsc_claim_irq(&gsc_irq, ASP_GSC_IRQ);
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if (dev->irq < 0) {
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printk(KERN_ERR "%s(): cannot get GSC irq\n", __FUNCTION__);
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printk(KERN_ERR "%s(): cannot get GSC irq\n", __func__);
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goto out;
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}
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@ -359,7 +359,7 @@ ccio_alloc_range(struct ioc *ioc, struct device *dev, size_t size)
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BUG_ON((pages_needed * IOVP_SIZE) > DMA_CHUNK_SIZE);
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DBG_RES("%s() size: %d pages_needed %d\n",
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__FUNCTION__, size, pages_needed);
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__func__, size, pages_needed);
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/*
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** "seek and ye shall find"...praying never hurts either...
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@ -395,16 +395,16 @@ ccio_alloc_range(struct ioc *ioc, struct device *dev, size_t size)
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#endif
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} else {
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panic("%s: %s() Too many pages to map. pages_needed: %u\n",
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__FILE__, __FUNCTION__, pages_needed);
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__FILE__, __func__, pages_needed);
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}
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panic("%s: %s() I/O MMU is out of mapping resources.\n", __FILE__,
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__FUNCTION__);
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__func__);
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resource_found:
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DBG_RES("%s() res_idx %d res_hint: %d\n",
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__FUNCTION__, res_idx, ioc->res_hint);
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__func__, res_idx, ioc->res_hint);
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#ifdef CCIO_SEARCH_TIME
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{
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@ -450,7 +450,7 @@ ccio_free_range(struct ioc *ioc, dma_addr_t iova, unsigned long pages_mapped)
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BUG_ON(pages_mapped > BITS_PER_LONG);
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DBG_RES("%s(): res_idx: %d pages_mapped %d\n",
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__FUNCTION__, res_idx, pages_mapped);
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__func__, res_idx, pages_mapped);
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#ifdef CCIO_MAP_STATS
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ioc->used_pages -= pages_mapped;
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@ -474,7 +474,7 @@ ccio_free_range(struct ioc *ioc, dma_addr_t iova, unsigned long pages_mapped)
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#endif
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} else {
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panic("%s:%s() Too many pages to unmap.\n", __FILE__,
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__FUNCTION__);
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__func__);
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}
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}
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@ -775,7 +775,7 @@ ccio_map_single(struct device *dev, void *addr, size_t size,
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pdir_start = &(ioc->pdir_base[idx]);
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DBG_RUN("%s() 0x%p -> 0x%lx size: %0x%x\n",
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__FUNCTION__, addr, (long)iovp | offset, size);
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__func__, addr, (long)iovp | offset, size);
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/* If not cacheline aligned, force SAFE_DMA on the whole mess */
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if((size % L1_CACHE_BYTES) || ((unsigned long)addr % L1_CACHE_BYTES))
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@ -820,7 +820,7 @@ ccio_unmap_single(struct device *dev, dma_addr_t iova, size_t size,
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ioc = GET_IOC(dev);
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DBG_RUN("%s() iovp 0x%lx/%x\n",
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__FUNCTION__, (long)iova, size);
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__func__, (long)iova, size);
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iova ^= offset; /* clear offset bits */
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size += offset;
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@ -922,7 +922,7 @@ ccio_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
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BUG_ON(!dev);
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ioc = GET_IOC(dev);
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DBG_RUN_SG("%s() START %d entries\n", __FUNCTION__, nents);
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DBG_RUN_SG("%s() START %d entries\n", __func__, nents);
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/* Fast path single entry scatterlists. */
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if (nents == 1) {
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@ -966,7 +966,7 @@ ccio_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
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BUG_ON(coalesced != filled);
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DBG_RUN_SG("%s() DONE %d mappings\n", __FUNCTION__, filled);
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DBG_RUN_SG("%s() DONE %d mappings\n", __func__, filled);
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for (i = 0; i < filled; i++)
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current_len += sg_dma_len(sglist + i);
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@ -995,7 +995,7 @@ ccio_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents,
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ioc = GET_IOC(dev);
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DBG_RUN_SG("%s() START %d entries, %08lx,%x\n",
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__FUNCTION__, nents, sg_virt_addr(sglist), sglist->length);
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__func__, nents, sg_virt_addr(sglist), sglist->length);
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#ifdef CCIO_MAP_STATS
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ioc->usg_calls++;
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@ -1011,7 +1011,7 @@ ccio_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents,
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++sglist;
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}
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DBG_RUN_SG("%s() DONE (nents %d)\n", __FUNCTION__, nents);
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DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);
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}
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static struct hppa_dma_ops ccio_ops = {
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@ -1225,7 +1225,7 @@ static int
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ccio_get_iotlb_size(struct parisc_device *dev)
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{
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if (dev->spa_shift == 0) {
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panic("%s() : Can't determine I/O TLB size.\n", __FUNCTION__);
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panic("%s() : Can't determine I/O TLB size.\n", __func__);
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}
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return (1 << dev->spa_shift);
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}
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@ -1315,7 +1315,7 @@ ccio_ioc_init(struct ioc *ioc)
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BUG_ON((1 << get_order(ioc->pdir_size)) != (ioc->pdir_size >> PAGE_SHIFT));
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DBG_INIT("%s() hpa 0x%p mem %luMB IOV %dMB (%d bits)\n",
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__FUNCTION__, ioc->ioc_regs,
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__func__, ioc->ioc_regs,
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(unsigned long) num_physpages >> (20 - PAGE_SHIFT),
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iova_space_size>>20,
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iov_order + PAGE_SHIFT);
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@ -1323,7 +1323,7 @@ ccio_ioc_init(struct ioc *ioc)
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ioc->pdir_base = (u64 *)__get_free_pages(GFP_KERNEL,
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get_order(ioc->pdir_size));
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if(NULL == ioc->pdir_base) {
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panic("%s() could not allocate I/O Page Table\n", __FUNCTION__);
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panic("%s() could not allocate I/O Page Table\n", __func__);
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}
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memset(ioc->pdir_base, 0, ioc->pdir_size);
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@ -1332,12 +1332,12 @@ ccio_ioc_init(struct ioc *ioc)
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/* resource map size dictated by pdir_size */
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ioc->res_size = (ioc->pdir_size / sizeof(u64)) >> 3;
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DBG_INIT("%s() res_size 0x%x\n", __FUNCTION__, ioc->res_size);
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DBG_INIT("%s() res_size 0x%x\n", __func__, ioc->res_size);
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ioc->res_map = (u8 *)__get_free_pages(GFP_KERNEL,
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get_order(ioc->res_size));
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if(NULL == ioc->res_map) {
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panic("%s() could not allocate resource map\n", __FUNCTION__);
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panic("%s() could not allocate resource map\n", __func__);
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}
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memset(ioc->res_map, 0, ioc->res_size);
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@ -1409,7 +1409,7 @@ ccio_init_resource(struct resource *res, char *name, void __iomem *ioaddr)
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result = insert_resource(&iomem_resource, res);
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if (result < 0) {
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printk(KERN_ERR "%s() failed to claim CCIO bus address space (%08lx,%08lx)\n",
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__FUNCTION__, res->start, res->end);
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__func__, res->start, res->end);
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}
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}
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@ -180,7 +180,7 @@ static int dino_cfg_read(struct pci_bus *bus, unsigned int devfn, int where,
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void __iomem *base_addr = d->hba.base_addr;
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unsigned long flags;
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DBG("%s: %p, %d, %d, %d\n", __FUNCTION__, base_addr, devfn, where,
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DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where,
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size);
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spin_lock_irqsave(&d->dinosaur_pen, flags);
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@ -215,7 +215,7 @@ static int dino_cfg_write(struct pci_bus *bus, unsigned int devfn, int where,
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void __iomem *base_addr = d->hba.base_addr;
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unsigned long flags;
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DBG("%s: %p, %d, %d, %d\n", __FUNCTION__, base_addr, devfn, where,
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DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where,
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size);
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spin_lock_irqsave(&d->dinosaur_pen, flags);
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@ -301,7 +301,7 @@ static void dino_disable_irq(unsigned int irq)
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struct dino_device *dino_dev = irq_desc[irq].chip_data;
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int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
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DBG(KERN_WARNING "%s(0x%p, %d)\n", __FUNCTION__, dino_dev, irq);
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DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, irq);
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/* Clear the matching bit in the IMR register */
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dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));
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@ -314,7 +314,7 @@ static void dino_enable_irq(unsigned int irq)
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int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
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u32 tmp;
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DBG(KERN_WARNING "%s(0x%p, %d)\n", __FUNCTION__, dino_dev, irq);
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DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, irq);
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/*
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** clear pending IRQ bits
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@ -340,7 +340,7 @@ static void dino_enable_irq(unsigned int irq)
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tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR);
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if (tmp & DINO_MASK_IRQ(local_irq)) {
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DBG(KERN_WARNING "%s(): IRQ asserted! (ILR 0x%x)\n",
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__FUNCTION__, tmp);
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__func__, tmp);
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gsc_writel(dino_dev->txn_data, dino_dev->txn_addr);
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}
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}
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@ -388,7 +388,7 @@ ilr_again:
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int local_irq = __ffs(mask);
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int irq = dino_dev->global_irq[local_irq];
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DBG(KERN_DEBUG "%s(%d, %p) mask 0x%x\n",
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__FUNCTION__, irq, intr_dev, mask);
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__func__, irq, intr_dev, mask);
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__do_IRQ(irq);
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mask &= ~(1 << local_irq);
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} while (mask);
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@ -566,7 +566,7 @@ dino_fixup_bus(struct pci_bus *bus)
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int port_base = HBA_PORT_BASE(dino_dev->hba.hba_num);
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DBG(KERN_WARNING "%s(0x%p) bus %d platform_data 0x%p\n",
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__FUNCTION__, bus, bus->secondary,
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__func__, bus, bus->secondary,
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bus->bridge->platform_data);
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/* Firmware doesn't set up card-mode dino, so we have to */
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@ -112,7 +112,7 @@ static void gsc_asic_disable_irq(unsigned int irq)
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int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
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u32 imr;
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __FUNCTION__, irq,
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, irq,
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irq_dev->name, imr);
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/* Disable the IRQ line by clearing the bit in the IMR */
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@ -127,7 +127,7 @@ static void gsc_asic_enable_irq(unsigned int irq)
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int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
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u32 imr;
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __FUNCTION__, irq,
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, irq,
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irq_dev->name, imr);
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/* Enable the IRQ line by setting the bit in the IMR */
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@ -193,7 +193,7 @@ lasi_init_chip(struct parisc_device *dev)
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dev->irq = gsc_alloc_irq(&gsc_irq);
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if (dev->irq < 0) {
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printk(KERN_ERR "%s(): cannot get GSC irq\n",
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__FUNCTION__);
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__func__);
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kfree(lasi);
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return -EBUSY;
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}
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@ -377,12 +377,12 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
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/* original - Generate config cycle on broken elroy
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with risk we will miss PCI bus errors. */
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*data = lba_rd_cfg(d, tok, pos, size);
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DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __FUNCTION__, tok, pos, *data);
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DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __func__, tok, pos, *data);
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return 0;
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}
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if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->secondary, devfn, d)) {
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DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __FUNCTION__, tok, pos);
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DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __func__, tok, pos);
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/* either don't want to look or know device isn't present. */
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*data = ~0U;
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return(0);
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@ -398,7 +398,7 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
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case 2: *data = READ_REG16(data_reg + (pos & 2)); break;
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case 4: *data = READ_REG32(data_reg); break;
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}
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DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __FUNCTION__, tok, pos, *data);
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DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __func__, tok, pos, *data);
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return 0;
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}
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@ -441,16 +441,16 @@ static int elroy_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, int
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if (!LBA_SKIP_PROBE(d)) {
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/* Original Workaround */
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lba_wr_cfg(d, tok, pos, (u32) data, size);
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DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __FUNCTION__, tok, pos,data);
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DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __func__, tok, pos,data);
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return 0;
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}
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if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->secondary, devfn, d))) {
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DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __FUNCTION__, tok, pos,data);
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DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __func__, tok, pos,data);
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return 1; /* New Workaround */
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}
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DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __FUNCTION__, tok, pos, data);
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DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __func__, tok, pos, data);
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/* Basic Algorithm */
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LBA_CFG_ADDR_SETUP(d, tok | pos);
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@ -521,7 +521,7 @@ static int mercury_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, i
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if ((pos > 255) || (devfn > 255))
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return -EINVAL;
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DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __FUNCTION__, tok, pos, data);
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DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __func__, tok, pos, data);
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LBA_CFG_TR4_ADDR_SETUP(d, tok | pos);
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switch(size) {
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@ -890,7 +890,7 @@ LBA_PORT_IN(32, 0)
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#define LBA_PORT_OUT(size, mask) \
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static void lba_astro_out##size (struct pci_hba_data *d, u16 addr, u##size val) \
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{ \
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DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __FUNCTION__, d, addr, val); \
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DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, d, addr, val); \
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WRITE_REG##size(val, astro_iop_base + addr); \
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if (LBA_DEV(d)->hw_rev < 3) \
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lba_t32 = READ_U32(d->base_addr + LBA_FUNC_ID); \
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@ -932,7 +932,7 @@ static struct pci_port_ops lba_astro_port_ops = {
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static u##size lba_pat_in##size (struct pci_hba_data *l, u16 addr) \
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{ \
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u##size t; \
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DBG_PORT("%s(0x%p, 0x%x) ->", __FUNCTION__, l, addr); \
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DBG_PORT("%s(0x%p, 0x%x) ->", __func__, l, addr); \
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t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \
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DBG_PORT(" 0x%x\n", t); \
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return (t); \
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@ -948,7 +948,7 @@ LBA_PORT_IN(32, 0)
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static void lba_pat_out##size (struct pci_hba_data *l, u16 addr, u##size val) \
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{ \
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void __iomem *where = PIOP_TO_GMMIO(LBA_DEV(l), addr); \
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DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __FUNCTION__, l, addr, val); \
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DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, l, addr, val); \
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WRITE_REG##size(val, where); \
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/* flush the I/O down to the elroy at least */ \
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lba_t32 = READ_U32(l->base_addr + LBA_FUNC_ID); \
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@ -1584,7 +1584,7 @@ void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask)
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WARN_ON((ibase & 0x001fffff) != 0);
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WARN_ON((imask & 0x001fffff) != 0);
|
||||
|
||||
DBG("%s() ibase 0x%x imask 0x%x\n", __FUNCTION__, ibase, imask);
|
||||
DBG("%s() ibase 0x%x imask 0x%x\n", __func__, ibase, imask);
|
||||
WRITE_REG32( imask, base_addr + LBA_IMASK);
|
||||
WRITE_REG32( ibase, base_addr + LBA_IBASE);
|
||||
iounmap(base_addr);
|
||||
|
|
|
|||
|
|
@ -569,7 +569,7 @@ int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long d
|
|||
|
||||
default:
|
||||
printk(KERN_ERR "%s: Wrong LCD/LED model %d !\n",
|
||||
__FUNCTION__, lcd_info.model);
|
||||
__func__, lcd_info.model);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -384,7 +384,7 @@ sba_search_bitmap(struct ioc *ioc, struct device *dev,
|
|||
}
|
||||
mask = RESMAP_MASK(bits_wanted) >> bitshiftcnt;
|
||||
|
||||
DBG_RES("%s() o %ld %p", __FUNCTION__, o, res_ptr);
|
||||
DBG_RES("%s() o %ld %p", __func__, o, res_ptr);
|
||||
while(res_ptr < res_end)
|
||||
{
|
||||
DBG_RES(" %p %lx %lx\n", res_ptr, mask, *res_ptr);
|
||||
|
|
@ -454,7 +454,7 @@ sba_alloc_range(struct ioc *ioc, struct device *dev, size_t size)
|
|||
#endif
|
||||
|
||||
DBG_RES("%s(%x) %d -> %lx hint %x/%x\n",
|
||||
__FUNCTION__, size, pages_needed, pide,
|
||||
__func__, size, pages_needed, pide,
|
||||
(uint) ((unsigned long) ioc->res_hint - (unsigned long) ioc->res_map),
|
||||
ioc->res_bitshift );
|
||||
|
||||
|
|
@ -497,7 +497,7 @@ sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size)
|
|||
unsigned long m = RESMAP_MASK(bits_not_wanted) >> (pide & (BITS_PER_LONG - 1));
|
||||
|
||||
DBG_RES("%s( ,%x,%x) %x/%lx %x %p %lx\n",
|
||||
__FUNCTION__, (uint) iova, size,
|
||||
__func__, (uint) iova, size,
|
||||
bits_not_wanted, m, pide, res_ptr, *res_ptr);
|
||||
|
||||
#ifdef SBA_COLLECT_STATS
|
||||
|
|
@ -740,7 +740,7 @@ sba_map_single(struct device *dev, void *addr, size_t size,
|
|||
iovp = (dma_addr_t) pide << IOVP_SHIFT;
|
||||
|
||||
DBG_RUN("%s() 0x%p -> 0x%lx\n",
|
||||
__FUNCTION__, addr, (long) iovp | offset);
|
||||
__func__, addr, (long) iovp | offset);
|
||||
|
||||
pdir_start = &(ioc->pdir_base[pide]);
|
||||
|
||||
|
|
@ -798,7 +798,7 @@ sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size,
|
|||
unsigned long flags;
|
||||
dma_addr_t offset;
|
||||
|
||||
DBG_RUN("%s() iovp 0x%lx/%x\n", __FUNCTION__, (long) iova, size);
|
||||
DBG_RUN("%s() iovp 0x%lx/%x\n", __func__, (long) iova, size);
|
||||
|
||||
ioc = GET_IOC(dev);
|
||||
offset = iova & ~IOVP_MASK;
|
||||
|
|
@ -937,7 +937,7 @@ sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
|
|||
int coalesced, filled = 0;
|
||||
unsigned long flags;
|
||||
|
||||
DBG_RUN_SG("%s() START %d entries\n", __FUNCTION__, nents);
|
||||
DBG_RUN_SG("%s() START %d entries\n", __func__, nents);
|
||||
|
||||
ioc = GET_IOC(dev);
|
||||
|
||||
|
|
@ -998,7 +998,7 @@ sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
|
|||
|
||||
spin_unlock_irqrestore(&ioc->res_lock, flags);
|
||||
|
||||
DBG_RUN_SG("%s() DONE %d mappings\n", __FUNCTION__, filled);
|
||||
DBG_RUN_SG("%s() DONE %d mappings\n", __func__, filled);
|
||||
|
||||
return filled;
|
||||
}
|
||||
|
|
@ -1023,7 +1023,7 @@ sba_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents,
|
|||
#endif
|
||||
|
||||
DBG_RUN_SG("%s() START %d entries, %p,%x\n",
|
||||
__FUNCTION__, nents, sg_virt_addr(sglist), sglist->length);
|
||||
__func__, nents, sg_virt_addr(sglist), sglist->length);
|
||||
|
||||
ioc = GET_IOC(dev);
|
||||
|
||||
|
|
@ -1047,7 +1047,7 @@ sba_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents,
|
|||
++sglist;
|
||||
}
|
||||
|
||||
DBG_RUN_SG("%s() DONE (nents %d)\n", __FUNCTION__, nents);
|
||||
DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);
|
||||
|
||||
#ifdef ASSERT_PDIR_SANITY
|
||||
spin_lock_irqsave(&ioc->res_lock, flags);
|
||||
|
|
@ -1118,7 +1118,7 @@ sba_alloc_pdir(unsigned int pdir_size)
|
|||
pdir_base = __get_free_pages(GFP_KERNEL, pdir_order);
|
||||
if (NULL == (void *) pdir_base) {
|
||||
panic("%s() could not allocate I/O Page Table\n",
|
||||
__FUNCTION__);
|
||||
__func__);
|
||||
}
|
||||
|
||||
/* If this is not PA8700 (PCX-W2)
|
||||
|
|
@ -1261,7 +1261,7 @@ sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
|||
ioc->pdir_size = (iova_space_size / IOVP_SIZE) * sizeof(u64);
|
||||
|
||||
DBG_INIT("%s() hpa 0x%p IOV %dMB (%d bits)\n",
|
||||
__FUNCTION__, ioc->ioc_hpa, iova_space_size >> 20,
|
||||
__func__, ioc->ioc_hpa, iova_space_size >> 20,
|
||||
iov_order + PAGE_SHIFT);
|
||||
|
||||
ioc->pdir_base = (void *) __get_free_pages(GFP_KERNEL,
|
||||
|
|
@ -1272,7 +1272,7 @@ sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
|||
memset(ioc->pdir_base, 0, ioc->pdir_size);
|
||||
|
||||
DBG_INIT("%s() pdir %p size %x\n",
|
||||
__FUNCTION__, ioc->pdir_base, ioc->pdir_size);
|
||||
__func__, ioc->pdir_base, ioc->pdir_size);
|
||||
|
||||
#ifdef SBA_HINT_SUPPORT
|
||||
ioc->hint_shift_pdir = iov_order + PAGE_SHIFT;
|
||||
|
|
@ -1354,7 +1354,7 @@ sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
|||
|
||||
if (agp_found && sba_reserve_agpgart) {
|
||||
printk(KERN_INFO "%s: reserving %dMb of IOVA space for agpgart\n",
|
||||
__FUNCTION__, (iova_space_size/2) >> 20);
|
||||
__func__, (iova_space_size/2) >> 20);
|
||||
ioc->pdir_size /= 2;
|
||||
ioc->pdir_base[PDIR_INDEX(iova_space_size/2)] = SBA_AGPGART_COOKIE;
|
||||
}
|
||||
|
|
@ -1406,7 +1406,7 @@ sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
|||
ioc->pdir_size = pdir_size = (iova_space_size/IOVP_SIZE) * sizeof(u64);
|
||||
|
||||
DBG_INIT("%s() hpa 0x%lx mem %ldMB IOV %dMB (%d bits)\n",
|
||||
__FUNCTION__,
|
||||
__func__,
|
||||
ioc->ioc_hpa,
|
||||
(unsigned long) num_physpages >> (20 - PAGE_SHIFT),
|
||||
iova_space_size>>20,
|
||||
|
|
@ -1415,7 +1415,7 @@ sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
|||
ioc->pdir_base = sba_alloc_pdir(pdir_size);
|
||||
|
||||
DBG_INIT("%s() pdir %p size %x\n",
|
||||
__FUNCTION__, ioc->pdir_base, pdir_size);
|
||||
__func__, ioc->pdir_base, pdir_size);
|
||||
|
||||
#ifdef SBA_HINT_SUPPORT
|
||||
/* FIXME : DMA HINTs not used */
|
||||
|
|
@ -1443,7 +1443,7 @@ sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
|||
#endif
|
||||
|
||||
DBG_INIT("%s() IOV base 0x%lx mask 0x%0lx\n",
|
||||
__FUNCTION__, ioc->ibase, ioc->imask);
|
||||
__func__, ioc->ibase, ioc->imask);
|
||||
|
||||
/*
|
||||
** FIXME: Hint registers are programmed with default hint
|
||||
|
|
@ -1470,7 +1470,7 @@ sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
|
|||
|
||||
ioc->ibase = 0; /* used by SBA_IOVA and related macros */
|
||||
|
||||
DBG_INIT("%s() DONE\n", __FUNCTION__);
|
||||
DBG_INIT("%s() DONE\n", __func__);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -1544,7 +1544,7 @@ printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa,
|
|||
if (!IS_PLUTO(sba_dev->dev)) {
|
||||
ioc_ctl = READ_REG(sba_dev->sba_hpa+IOC_CTRL);
|
||||
DBG_INIT("%s() hpa 0x%lx ioc_ctl 0x%Lx ->",
|
||||
__FUNCTION__, sba_dev->sba_hpa, ioc_ctl);
|
||||
__func__, sba_dev->sba_hpa, ioc_ctl);
|
||||
ioc_ctl &= ~(IOC_CTRL_RM | IOC_CTRL_NC | IOC_CTRL_CE);
|
||||
ioc_ctl |= IOC_CTRL_DD | IOC_CTRL_D4 | IOC_CTRL_TC;
|
||||
/* j6700 v1.6 firmware sets 0x294f */
|
||||
|
|
@ -1675,7 +1675,7 @@ sba_common_init(struct sba_device *sba_dev)
|
|||
|
||||
res_size >>= 3; /* convert bit count to byte count */
|
||||
DBG_INIT("%s() res_size 0x%x\n",
|
||||
__FUNCTION__, res_size);
|
||||
__func__, res_size);
|
||||
|
||||
sba_dev->ioc[i].res_size = res_size;
|
||||
sba_dev->ioc[i].res_map = (char *) __get_free_pages(GFP_KERNEL, get_order(res_size));
|
||||
|
|
@ -1688,7 +1688,7 @@ sba_common_init(struct sba_device *sba_dev)
|
|||
if (NULL == sba_dev->ioc[i].res_map)
|
||||
{
|
||||
panic("%s:%s() could not allocate resource map\n",
|
||||
__FILE__, __FUNCTION__ );
|
||||
__FILE__, __func__ );
|
||||
}
|
||||
|
||||
memset(sba_dev->ioc[i].res_map, 0, res_size);
|
||||
|
|
@ -1725,7 +1725,7 @@ sba_common_init(struct sba_device *sba_dev)
|
|||
#endif
|
||||
|
||||
DBG_INIT("%s() %d res_map %x %p\n",
|
||||
__FUNCTION__, i, res_size, sba_dev->ioc[i].res_map);
|
||||
__func__, i, res_size, sba_dev->ioc[i].res_map);
|
||||
}
|
||||
|
||||
spin_lock_init(&sba_dev->sba_lock);
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@ wax_init_chip(struct parisc_device *dev)
|
|||
dev->irq = gsc_claim_irq(&gsc_irq, WAX_GSC_IRQ);
|
||||
if (dev->irq < 0) {
|
||||
printk(KERN_ERR "%s(): cannot get GSC irq\n",
|
||||
__FUNCTION__);
|
||||
__func__);
|
||||
kfree(wax);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue