mirror of
https://github.com/adulau/aha.git
synced 2024-12-27 03:06:10 +00:00
Merge git://git.infradead.org/iommu-2.6
* git://git.infradead.org/iommu-2.6: implement early_io{re,un}map for ia64 Revert "Intel IOMMU: Avoid memory allocation failures in dma map api calls" intel-iommu: ignore page table validation in pass through mode intel-iommu: Fix oops with intel_iommu=igfx_off intel-iommu: Check for an RMRR which ends before it starts. intel-iommu: Apply BIOS sanity checks for interrupt remapping too. intel-iommu: Detect DMAR in hyperspace at probe time. dmar: Fix build failure without NUMA, warn on bogus RHSA tables and don't abort iommu: Allocate dma-remapping structures using numa locality info intr_remap: Allocate intr-remapping table using numa locality info dmar: Allocate queued invalidation structure using numa locality info dmar: support for parsing Remapping Hardware Static Affinity structure
This commit is contained in:
commit
a79960e576
6 changed files with 154 additions and 51 deletions
|
@ -424,6 +424,8 @@ __writeq (unsigned long val, volatile void __iomem *addr)
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extern void __iomem * ioremap(unsigned long offset, unsigned long size);
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extern void __iomem * ioremap(unsigned long offset, unsigned long size);
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extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
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extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
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extern void iounmap (volatile void __iomem *addr);
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extern void iounmap (volatile void __iomem *addr);
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extern void __iomem * early_ioremap (unsigned long phys_addr, unsigned long size);
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extern void early_iounmap (volatile void __iomem *addr, unsigned long size);
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/*
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/*
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* String version of IO memory access ops:
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* String version of IO memory access ops:
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@ -21,6 +21,12 @@ __ioremap (unsigned long phys_addr)
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return (void __iomem *) (__IA64_UNCACHED_OFFSET | phys_addr);
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return (void __iomem *) (__IA64_UNCACHED_OFFSET | phys_addr);
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}
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}
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void __iomem *
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early_ioremap (unsigned long phys_addr, unsigned long size)
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{
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return __ioremap(phys_addr);
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}
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void __iomem *
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void __iomem *
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ioremap (unsigned long phys_addr, unsigned long size)
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ioremap (unsigned long phys_addr, unsigned long size)
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{
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{
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@ -101,6 +107,11 @@ ioremap_nocache (unsigned long phys_addr, unsigned long size)
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}
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}
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EXPORT_SYMBOL(ioremap_nocache);
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EXPORT_SYMBOL(ioremap_nocache);
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void
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early_iounmap (volatile void __iomem *addr, unsigned long size)
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{
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}
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void
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void
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iounmap (volatile void __iomem *addr)
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iounmap (volatile void __iomem *addr)
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{
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{
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@ -339,6 +339,35 @@ found:
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}
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}
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#endif
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#endif
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#ifdef CONFIG_ACPI_NUMA
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static int __init
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dmar_parse_one_rhsa(struct acpi_dmar_header *header)
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{
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struct acpi_dmar_rhsa *rhsa;
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struct dmar_drhd_unit *drhd;
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rhsa = (struct acpi_dmar_rhsa *)header;
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for_each_drhd_unit(drhd) {
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if (drhd->reg_base_addr == rhsa->base_address) {
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int node = acpi_map_pxm_to_node(rhsa->proximity_domain);
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if (!node_online(node))
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node = -1;
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drhd->iommu->node = node;
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return 0;
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}
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}
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WARN(1, "Your BIOS is broken; RHSA refers to non-existent DMAR unit at %llx\n"
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"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
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drhd->reg_base_addr,
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dmi_get_system_info(DMI_BIOS_VENDOR),
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dmi_get_system_info(DMI_BIOS_VERSION),
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dmi_get_system_info(DMI_PRODUCT_VERSION));
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return 0;
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}
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#endif
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static void __init
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static void __init
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dmar_table_print_dmar_entry(struct acpi_dmar_header *header)
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dmar_table_print_dmar_entry(struct acpi_dmar_header *header)
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{
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{
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@ -458,7 +487,9 @@ parse_dmar_table(void)
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#endif
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#endif
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break;
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break;
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case ACPI_DMAR_HARDWARE_AFFINITY:
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case ACPI_DMAR_HARDWARE_AFFINITY:
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/* We don't do anything with RHSA (yet?) */
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#ifdef CONFIG_ACPI_NUMA
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ret = dmar_parse_one_rhsa(entry_header);
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#endif
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break;
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break;
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default:
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default:
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printk(KERN_WARNING PREFIX
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printk(KERN_WARNING PREFIX
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@ -582,6 +613,8 @@ int __init dmar_table_init(void)
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return 0;
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return 0;
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}
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}
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static int bios_warned;
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int __init check_zero_address(void)
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int __init check_zero_address(void)
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{
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{
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struct acpi_table_dmar *dmar;
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struct acpi_table_dmar *dmar;
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@ -601,6 +634,9 @@ int __init check_zero_address(void)
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}
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}
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if (entry_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT) {
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if (entry_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT) {
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void __iomem *addr;
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u64 cap, ecap;
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drhd = (void *)entry_header;
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drhd = (void *)entry_header;
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if (!drhd->address) {
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if (!drhd->address) {
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/* Promote an attitude of violence to a BIOS engineer today */
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/* Promote an attitude of violence to a BIOS engineer today */
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@ -609,17 +645,40 @@ int __init check_zero_address(void)
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dmi_get_system_info(DMI_BIOS_VENDOR),
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dmi_get_system_info(DMI_BIOS_VENDOR),
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dmi_get_system_info(DMI_BIOS_VERSION),
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dmi_get_system_info(DMI_BIOS_VERSION),
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dmi_get_system_info(DMI_PRODUCT_VERSION));
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dmi_get_system_info(DMI_PRODUCT_VERSION));
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#ifdef CONFIG_DMAR
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bios_warned = 1;
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dmar_disabled = 1;
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goto failed;
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#endif
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}
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return 0;
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addr = early_ioremap(drhd->address, VTD_PAGE_SIZE);
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if (!addr ) {
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printk("IOMMU: can't validate: %llx\n", drhd->address);
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goto failed;
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}
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cap = dmar_readq(addr + DMAR_CAP_REG);
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ecap = dmar_readq(addr + DMAR_ECAP_REG);
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early_iounmap(addr, VTD_PAGE_SIZE);
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if (cap == (uint64_t)-1 && ecap == (uint64_t)-1) {
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/* Promote an attitude of violence to a BIOS engineer today */
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WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
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"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
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drhd->address,
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dmi_get_system_info(DMI_BIOS_VENDOR),
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dmi_get_system_info(DMI_BIOS_VERSION),
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dmi_get_system_info(DMI_PRODUCT_VERSION));
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bios_warned = 1;
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goto failed;
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}
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}
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break;
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}
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}
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entry_header = ((void *)entry_header + entry_header->length);
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entry_header = ((void *)entry_header + entry_header->length);
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}
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}
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return 1;
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return 1;
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failed:
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#ifdef CONFIG_DMAR
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dmar_disabled = 1;
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#endif
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return 0;
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}
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}
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void __init detect_intel_iommu(void)
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void __init detect_intel_iommu(void)
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@ -670,6 +729,18 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
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int agaw = 0;
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int agaw = 0;
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int msagaw = 0;
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int msagaw = 0;
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if (!drhd->reg_base_addr) {
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if (!bios_warned) {
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WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n"
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"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
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dmi_get_system_info(DMI_BIOS_VENDOR),
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dmi_get_system_info(DMI_BIOS_VERSION),
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dmi_get_system_info(DMI_PRODUCT_VERSION));
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bios_warned = 1;
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}
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return -EINVAL;
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}
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iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
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iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
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if (!iommu)
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if (!iommu)
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return -ENOMEM;
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return -ENOMEM;
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@ -686,13 +757,16 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
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iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG);
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iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG);
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if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) {
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if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) {
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/* Promote an attitude of violence to a BIOS engineer today */
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if (!bios_warned) {
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WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
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/* Promote an attitude of violence to a BIOS engineer today */
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"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
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WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
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drhd->reg_base_addr,
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"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
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dmi_get_system_info(DMI_BIOS_VENDOR),
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drhd->reg_base_addr,
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dmi_get_system_info(DMI_BIOS_VERSION),
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dmi_get_system_info(DMI_BIOS_VENDOR),
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dmi_get_system_info(DMI_PRODUCT_VERSION));
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dmi_get_system_info(DMI_BIOS_VERSION),
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dmi_get_system_info(DMI_PRODUCT_VERSION));
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bios_warned = 1;
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}
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goto err_unmap;
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goto err_unmap;
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}
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}
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|
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@ -715,6 +789,8 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
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iommu->agaw = agaw;
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iommu->agaw = agaw;
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iommu->msagaw = msagaw;
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iommu->msagaw = msagaw;
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iommu->node = -1;
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/* the registers might be more than one page */
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/* the registers might be more than one page */
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map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
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map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
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cap_max_fault_reg_offset(iommu->cap));
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cap_max_fault_reg_offset(iommu->cap));
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@ -1056,6 +1132,7 @@ static void __dmar_enable_qi(struct intel_iommu *iommu)
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int dmar_enable_qi(struct intel_iommu *iommu)
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int dmar_enable_qi(struct intel_iommu *iommu)
|
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{
|
{
|
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struct q_inval *qi;
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struct q_inval *qi;
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|
struct page *desc_page;
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|
|
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if (!ecap_qis(iommu->ecap))
|
if (!ecap_qis(iommu->ecap))
|
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return -ENOENT;
|
return -ENOENT;
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||||||
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@ -1072,13 +1149,16 @@ int dmar_enable_qi(struct intel_iommu *iommu)
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||||||
|
|
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qi = iommu->qi;
|
qi = iommu->qi;
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|
|
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qi->desc = (void *)(get_zeroed_page(GFP_ATOMIC));
|
|
||||||
if (!qi->desc) {
|
desc_page = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO, 0);
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|
if (!desc_page) {
|
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kfree(qi);
|
kfree(qi);
|
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iommu->qi = 0;
|
iommu->qi = 0;
|
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return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
qi->desc = page_address(desc_page);
|
||||||
|
|
||||||
qi->desc_status = kmalloc(QI_LENGTH * sizeof(int), GFP_ATOMIC);
|
qi->desc_status = kmalloc(QI_LENGTH * sizeof(int), GFP_ATOMIC);
|
||||||
if (!qi->desc_status) {
|
if (!qi->desc_status) {
|
||||||
free_page((unsigned long) qi->desc);
|
free_page((unsigned long) qi->desc);
|
||||||
|
|
|
@ -277,6 +277,7 @@ static int hw_pass_through = 1;
|
||||||
|
|
||||||
struct dmar_domain {
|
struct dmar_domain {
|
||||||
int id; /* domain id */
|
int id; /* domain id */
|
||||||
|
int nid; /* node id */
|
||||||
unsigned long iommu_bmp; /* bitmap of iommus this domain uses*/
|
unsigned long iommu_bmp; /* bitmap of iommus this domain uses*/
|
||||||
|
|
||||||
struct list_head devices; /* all devices' list */
|
struct list_head devices; /* all devices' list */
|
||||||
|
@ -386,30 +387,14 @@ static struct kmem_cache *iommu_domain_cache;
|
||||||
static struct kmem_cache *iommu_devinfo_cache;
|
static struct kmem_cache *iommu_devinfo_cache;
|
||||||
static struct kmem_cache *iommu_iova_cache;
|
static struct kmem_cache *iommu_iova_cache;
|
||||||
|
|
||||||
static inline void *iommu_kmem_cache_alloc(struct kmem_cache *cachep)
|
static inline void *alloc_pgtable_page(int node)
|
||||||
{
|
{
|
||||||
unsigned int flags;
|
struct page *page;
|
||||||
void *vaddr;
|
void *vaddr = NULL;
|
||||||
|
|
||||||
/* trying to avoid low memory issues */
|
page = alloc_pages_node(node, GFP_ATOMIC | __GFP_ZERO, 0);
|
||||||
flags = current->flags & PF_MEMALLOC;
|
if (page)
|
||||||
current->flags |= PF_MEMALLOC;
|
vaddr = page_address(page);
|
||||||
vaddr = kmem_cache_alloc(cachep, GFP_ATOMIC);
|
|
||||||
current->flags &= (~PF_MEMALLOC | flags);
|
|
||||||
return vaddr;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static inline void *alloc_pgtable_page(void)
|
|
||||||
{
|
|
||||||
unsigned int flags;
|
|
||||||
void *vaddr;
|
|
||||||
|
|
||||||
/* trying to avoid low memory issues */
|
|
||||||
flags = current->flags & PF_MEMALLOC;
|
|
||||||
current->flags |= PF_MEMALLOC;
|
|
||||||
vaddr = (void *)get_zeroed_page(GFP_ATOMIC);
|
|
||||||
current->flags &= (~PF_MEMALLOC | flags);
|
|
||||||
return vaddr;
|
return vaddr;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -420,7 +405,7 @@ static inline void free_pgtable_page(void *vaddr)
|
||||||
|
|
||||||
static inline void *alloc_domain_mem(void)
|
static inline void *alloc_domain_mem(void)
|
||||||
{
|
{
|
||||||
return iommu_kmem_cache_alloc(iommu_domain_cache);
|
return kmem_cache_alloc(iommu_domain_cache, GFP_ATOMIC);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void free_domain_mem(void *vaddr)
|
static void free_domain_mem(void *vaddr)
|
||||||
|
@ -430,7 +415,7 @@ static void free_domain_mem(void *vaddr)
|
||||||
|
|
||||||
static inline void * alloc_devinfo_mem(void)
|
static inline void * alloc_devinfo_mem(void)
|
||||||
{
|
{
|
||||||
return iommu_kmem_cache_alloc(iommu_devinfo_cache);
|
return kmem_cache_alloc(iommu_devinfo_cache, GFP_ATOMIC);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void free_devinfo_mem(void *vaddr)
|
static inline void free_devinfo_mem(void *vaddr)
|
||||||
|
@ -440,7 +425,7 @@ static inline void free_devinfo_mem(void *vaddr)
|
||||||
|
|
||||||
struct iova *alloc_iova_mem(void)
|
struct iova *alloc_iova_mem(void)
|
||||||
{
|
{
|
||||||
return iommu_kmem_cache_alloc(iommu_iova_cache);
|
return kmem_cache_alloc(iommu_iova_cache, GFP_ATOMIC);
|
||||||
}
|
}
|
||||||
|
|
||||||
void free_iova_mem(struct iova *iova)
|
void free_iova_mem(struct iova *iova)
|
||||||
|
@ -589,7 +574,8 @@ static struct context_entry * device_to_context_entry(struct intel_iommu *iommu,
|
||||||
root = &iommu->root_entry[bus];
|
root = &iommu->root_entry[bus];
|
||||||
context = get_context_addr_from_root(root);
|
context = get_context_addr_from_root(root);
|
||||||
if (!context) {
|
if (!context) {
|
||||||
context = (struct context_entry *)alloc_pgtable_page();
|
context = (struct context_entry *)
|
||||||
|
alloc_pgtable_page(iommu->node);
|
||||||
if (!context) {
|
if (!context) {
|
||||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||||
return NULL;
|
return NULL;
|
||||||
|
@ -732,7 +718,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
|
||||||
if (!dma_pte_present(pte)) {
|
if (!dma_pte_present(pte)) {
|
||||||
uint64_t pteval;
|
uint64_t pteval;
|
||||||
|
|
||||||
tmp_page = alloc_pgtable_page();
|
tmp_page = alloc_pgtable_page(domain->nid);
|
||||||
|
|
||||||
if (!tmp_page)
|
if (!tmp_page)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
@ -868,7 +854,7 @@ static int iommu_alloc_root_entry(struct intel_iommu *iommu)
|
||||||
struct root_entry *root;
|
struct root_entry *root;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
root = (struct root_entry *)alloc_pgtable_page();
|
root = (struct root_entry *)alloc_pgtable_page(iommu->node);
|
||||||
if (!root)
|
if (!root)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
@ -1263,6 +1249,7 @@ static struct dmar_domain *alloc_domain(void)
|
||||||
if (!domain)
|
if (!domain)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
|
domain->nid = -1;
|
||||||
memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
|
memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
|
||||||
domain->flags = 0;
|
domain->flags = 0;
|
||||||
|
|
||||||
|
@ -1420,9 +1407,10 @@ static int domain_init(struct dmar_domain *domain, int guest_width)
|
||||||
domain->iommu_snooping = 0;
|
domain->iommu_snooping = 0;
|
||||||
|
|
||||||
domain->iommu_count = 1;
|
domain->iommu_count = 1;
|
||||||
|
domain->nid = iommu->node;
|
||||||
|
|
||||||
/* always allocate the top pgd */
|
/* always allocate the top pgd */
|
||||||
domain->pgd = (struct dma_pte *)alloc_pgtable_page();
|
domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
|
||||||
if (!domain->pgd)
|
if (!domain->pgd)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
__iommu_flush_cache(iommu, domain->pgd, PAGE_SIZE);
|
__iommu_flush_cache(iommu, domain->pgd, PAGE_SIZE);
|
||||||
|
@ -1523,12 +1511,15 @@ static int domain_context_mapping_one(struct dmar_domain *domain, int segment,
|
||||||
|
|
||||||
/* Skip top levels of page tables for
|
/* Skip top levels of page tables for
|
||||||
* iommu which has less agaw than default.
|
* iommu which has less agaw than default.
|
||||||
|
* Unnecessary for PT mode.
|
||||||
*/
|
*/
|
||||||
for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
|
if (translation != CONTEXT_TT_PASS_THROUGH) {
|
||||||
pgd = phys_to_virt(dma_pte_addr(pgd));
|
for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
|
||||||
if (!dma_pte_present(pgd)) {
|
pgd = phys_to_virt(dma_pte_addr(pgd));
|
||||||
spin_unlock_irqrestore(&iommu->lock, flags);
|
if (!dma_pte_present(pgd)) {
|
||||||
return -ENOMEM;
|
spin_unlock_irqrestore(&iommu->lock, flags);
|
||||||
|
return -ENOMEM;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -1577,6 +1568,8 @@ static int domain_context_mapping_one(struct dmar_domain *domain, int segment,
|
||||||
spin_lock_irqsave(&domain->iommu_lock, flags);
|
spin_lock_irqsave(&domain->iommu_lock, flags);
|
||||||
if (!test_and_set_bit(iommu->seq_id, &domain->iommu_bmp)) {
|
if (!test_and_set_bit(iommu->seq_id, &domain->iommu_bmp)) {
|
||||||
domain->iommu_count++;
|
domain->iommu_count++;
|
||||||
|
if (domain->iommu_count == 1)
|
||||||
|
domain->nid = iommu->node;
|
||||||
domain_update_iommu_cap(domain);
|
domain_update_iommu_cap(domain);
|
||||||
}
|
}
|
||||||
spin_unlock_irqrestore(&domain->iommu_lock, flags);
|
spin_unlock_irqrestore(&domain->iommu_lock, flags);
|
||||||
|
@ -1991,6 +1984,16 @@ static int iommu_prepare_identity_map(struct pci_dev *pdev,
|
||||||
"IOMMU: Setting identity map for device %s [0x%Lx - 0x%Lx]\n",
|
"IOMMU: Setting identity map for device %s [0x%Lx - 0x%Lx]\n",
|
||||||
pci_name(pdev), start, end);
|
pci_name(pdev), start, end);
|
||||||
|
|
||||||
|
if (end < start) {
|
||||||
|
WARN(1, "Your BIOS is broken; RMRR ends before it starts!\n"
|
||||||
|
"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
|
||||||
|
dmi_get_system_info(DMI_BIOS_VENDOR),
|
||||||
|
dmi_get_system_info(DMI_BIOS_VERSION),
|
||||||
|
dmi_get_system_info(DMI_PRODUCT_VERSION));
|
||||||
|
ret = -EIO;
|
||||||
|
goto error;
|
||||||
|
}
|
||||||
|
|
||||||
if (end >> agaw_to_width(domain->agaw)) {
|
if (end >> agaw_to_width(domain->agaw)) {
|
||||||
WARN(1, "Your BIOS is broken; RMRR exceeds permitted address width (%d bits)\n"
|
WARN(1, "Your BIOS is broken; RMRR exceeds permitted address width (%d bits)\n"
|
||||||
"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
|
"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
|
||||||
|
@ -3228,6 +3231,9 @@ static int device_notifier(struct notifier_block *nb,
|
||||||
struct pci_dev *pdev = to_pci_dev(dev);
|
struct pci_dev *pdev = to_pci_dev(dev);
|
||||||
struct dmar_domain *domain;
|
struct dmar_domain *domain;
|
||||||
|
|
||||||
|
if (iommu_no_mapping(dev))
|
||||||
|
return 0;
|
||||||
|
|
||||||
domain = find_domain(pdev);
|
domain = find_domain(pdev);
|
||||||
if (!domain)
|
if (!domain)
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -3455,6 +3461,7 @@ static struct dmar_domain *iommu_alloc_vm_domain(void)
|
||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
domain->id = vm_domid++;
|
domain->id = vm_domid++;
|
||||||
|
domain->nid = -1;
|
||||||
memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
|
memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
|
||||||
domain->flags = DOMAIN_FLAG_VIRTUAL_MACHINE;
|
domain->flags = DOMAIN_FLAG_VIRTUAL_MACHINE;
|
||||||
|
|
||||||
|
@ -3481,9 +3488,10 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
|
||||||
domain->iommu_coherency = 0;
|
domain->iommu_coherency = 0;
|
||||||
domain->iommu_snooping = 0;
|
domain->iommu_snooping = 0;
|
||||||
domain->max_addr = 0;
|
domain->max_addr = 0;
|
||||||
|
domain->nid = -1;
|
||||||
|
|
||||||
/* always allocate the top pgd */
|
/* always allocate the top pgd */
|
||||||
domain->pgd = (struct dma_pte *)alloc_pgtable_page();
|
domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
|
||||||
if (!domain->pgd)
|
if (!domain->pgd)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
domain_flush_cache(domain, domain->pgd, PAGE_SIZE);
|
domain_flush_cache(domain, domain->pgd, PAGE_SIZE);
|
||||||
|
|
|
@ -590,7 +590,8 @@ static int setup_intr_remapping(struct intel_iommu *iommu, int mode)
|
||||||
if (!iommu->ir_table)
|
if (!iommu->ir_table)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
pages = alloc_pages(GFP_ATOMIC | __GFP_ZERO, INTR_REMAP_PAGE_ORDER);
|
pages = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO,
|
||||||
|
INTR_REMAP_PAGE_ORDER);
|
||||||
|
|
||||||
if (!pages) {
|
if (!pages) {
|
||||||
printk(KERN_ERR "failed to allocate pages of order %d\n",
|
printk(KERN_ERR "failed to allocate pages of order %d\n",
|
||||||
|
|
|
@ -332,6 +332,7 @@ struct intel_iommu {
|
||||||
#ifdef CONFIG_INTR_REMAP
|
#ifdef CONFIG_INTR_REMAP
|
||||||
struct ir_table *ir_table; /* Interrupt remapping info */
|
struct ir_table *ir_table; /* Interrupt remapping info */
|
||||||
#endif
|
#endif
|
||||||
|
int node;
|
||||||
};
|
};
|
||||||
|
|
||||||
static inline void __iommu_flush_cache(
|
static inline void __iommu_flush_cache(
|
||||||
|
|
Loading…
Reference in a new issue