adulau/aha
1
0
Fork 0
mirror of https://github.com/adulau/aha.git synced 2024-12-30 20:56:23 +00:00
Code Issues Projects Releases Packages Wiki Activity

[MTD] sharpsl_nand: move io addr to struct sharpsl_nand

Browse source 
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
This commit is contained in:
Dmitry Baryshkov 2008-10-16 17:58:18 +04:00
parent 2206ef1c5f
commit a4e4f29cbe
1 changed files with 32 additions and 27 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

59
drivers/mtd/nand/sharpsl.c
View file

@ -29,18 +29,20 @@
struct sharpsl_nand { struct sharpsl_nand {
struct mtd_info mtd; struct mtd_info mtd;
struct nand_chip chip; struct nand_chip chip;
void __iomem *io;
}; };
static void __iomem *sharpsl_io_base; #define mtd_to_sharpsl(_mtd) container_of(_mtd, struct sharpsl_nand, mtd)
/* register offset */ /* register offset */
#define ECCLPLB sharpsl_io_base+0x00 /* line parity 7 - 0 bit */ #define ECCLPLB 0x00 /* line parity 7 - 0 bit */
#define ECCLPUB sharpsl_io_base+0x04 /* line parity 15 - 8 bit */ #define ECCLPUB 0x04 /* line parity 15 - 8 bit */
#define ECCCP sharpsl_io_base+0x08 /* column parity 5 - 0 bit */ #define ECCCP 0x08 /* column parity 5 - 0 bit */
#define ECCCNTR sharpsl_io_base+0x0C /* ECC byte counter */ #define ECCCNTR 0x0C /* ECC byte counter */
#define ECCCLRR sharpsl_io_base+0x10 /* cleare ECC */ #define ECCCLRR 0x10 /* cleare ECC */
#define FLASHIO sharpsl_io_base+0x14 /* Flash I/O */ #define FLASHIO 0x14 /* Flash I/O */
#define FLASHCTL sharpsl_io_base+0x18 /* Flash Control */ #define FLASHCTL 0x18 /* Flash Control */
/* Flash control bit */ /* Flash control bit */
#define FLRYBY (1 << 5) #define FLRYBY (1 << 5)
@ -85,6 +87,7 @@ static struct mtd_partition sharpsl_nand_default_partition_info[] = {
static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd, static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
unsigned int ctrl) unsigned int ctrl)
{ {
struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
struct nand_chip *chip = mtd->priv; struct nand_chip *chip = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
@ -94,7 +97,7 @@ static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
bits ^= 0x11; bits ^= 0x11;
writeb((readb(FLASHCTL) & ~0x17) | bits, FLASHCTL); writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
} }
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
@ -128,20 +131,23 @@ static struct nand_ecclayout akita_oobinfo = {
static int sharpsl_nand_dev_ready(struct mtd_info *mtd) static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
{ {
return !((readb(FLASHCTL) & FLRYBY) == 0); struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
} }
static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode) static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
{ {
writeb(0, ECCCLRR); struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
writeb(0, sharpsl->io + ECCCLRR);
} }
static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code) static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
{ {
ecc_code[0] = ~readb(ECCLPUB); struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
ecc_code[1] = ~readb(ECCLPLB); ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
ecc_code[2] = (~readb(ECCCP) << 2) | 0x03; ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
return readb(ECCCNTR) != 0; ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
return readb(sharpsl->io + ECCCNTR) != 0;
} }
#ifdef CONFIG_MTD_PARTITIONS #ifdef CONFIG_MTD_PARTITIONS
@ -174,8 +180,8 @@ static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
} }
/* map physical address */ /* map physical address */
sharpsl_io_base = ioremap(r->start, resource_size(r)); sharpsl->io = ioremap(r->start, resource_size(r));
if (!sharpsl_io_base) { if (!sharpsl->io) {
printk("ioremap to access Sharp SL NAND chip failed\n"); printk("ioremap to access Sharp SL NAND chip failed\n");
err = -EIO; err = -EIO;
goto err_ioremap; goto err_ioremap;
@ -193,11 +199,11 @@ static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
/* /*
* PXA initialize * PXA initialize
*/ */
writeb(readb(FLASHCTL) | FLWP, FLASHCTL); writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
/* Set address of NAND IO lines */ /* Set address of NAND IO lines */
this->IO_ADDR_R = FLASHIO; this->IO_ADDR_R = sharpsl->io + FLASHIO;
this->IO_ADDR_W = FLASHIO; this->IO_ADDR_W = sharpsl->io + FLASHIO;
/* Set address of hardware control function */ /* Set address of hardware control function */
this->cmd_ctrl = sharpsl_nand_hwcontrol; this->cmd_ctrl = sharpsl_nand_hwcontrol;
this->dev_ready = sharpsl_nand_dev_ready; this->dev_ready = sharpsl_nand_dev_ready;
@ -218,12 +224,8 @@ static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
/* Scan to find existence of the device */ /* Scan to find existence of the device */
err = nand_scan(&sharpsl->mtd, 1); err = nand_scan(&sharpsl->mtd, 1);
if (err) { if (err)
platform_set_drvdata(pdev, NULL); goto err_scan;
iounmap(sharpsl_io_base);
kfree(sharpsl);
return err;
}
/* Register the partitions */ /* Register the partitions */
sharpsl->mtd.name = "sharpsl-nand"; sharpsl->mtd.name = "sharpsl-nand";
@ -252,6 +254,9 @@ static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
/* Return happy */ /* Return happy */
return 0; return 0;
err_scan:
platform_set_drvdata(pdev, NULL);
iounmap(sharpsl->io);
err_ioremap: err_ioremap:
err_get_res: err_get_res:
kfree(sharpsl); kfree(sharpsl);
@ -270,7 +275,7 @@ static int __devexit sharpsl_nand_remove(struct platform_device *pdev)
platform_set_drvdata(pdev, NULL); platform_set_drvdata(pdev, NULL);
iounmap(sharpsl_io_base); iounmap(sharpsl->io);
/* Free the MTD device structure */ /* Free the MTD device structure */
kfree(sharpsl); kfree(sharpsl);