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[PATCH] genirq: clean up irq-flow-type naming

Browse source 
Introduce desc->name and eliminate the handle_irq_name() hack.  Add
set_irq_chip_and_handler_name() to set the flow type and name at once.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Matthew Wilcox <willy@debian.org>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Ingo Molnar 2006-10-17 00:10:03 -07:00 committed by Linus Torvalds
parent 308ba5fcf8
commit a460e745e8
8 changed files with 47 additions and 58 deletions
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7
arch/i386/kernel/i8259.c
View file

@ -113,7 +113,8 @@ void make_8259A_irq(unsigned int irq)
{
disable_irq_nosync(irq);
io_apic_irqs &= ~(1<<irq);
set_irq_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
set_irq_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq,
"XT");
enable_irq(irq);
}
@ -369,8 +370,8 @@ void __init init_ISA_irqs (void)
/*
* 16 old-style INTA-cycle interrupts:
*/
set_irq_chip_and_handler(i, &i8259A_chip,
handle_level_irq);
set_irq_chip_and_handler_name(i, &i8259A_chip,
handle_level_irq, "XT");
} else {
/*
* 'high' PCI IRQs filled in on demand

17
arch/i386/kernel/io_apic.c
View file

@ -1225,11 +1225,11 @@ static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
{
if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
trigger == IOAPIC_LEVEL)
set_irq_chip_and_handler(irq, &ioapic_chip,
handle_fasteoi_irq);
set_irq_chip_and_handler_name(irq, &ioapic_chip,
handle_fasteoi_irq, "fasteoi");
else
set_irq_chip_and_handler(irq, &ioapic_chip,
handle_edge_irq);
set_irq_chip_and_handler_name(irq, &ioapic_chip,
handle_edge_irq, "edge");
set_intr_gate(vector, interrupt[irq]);
}
@ -2235,7 +2235,8 @@ static inline void check_timer(void)
printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
disable_8259A_irq(0);
set_irq_chip_and_handler(0, &lapic_chip, handle_fasteoi_irq);
set_irq_chip_and_handler_name(0, &lapic_chip, handle_fasteoi_irq,
"fasteio");
apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */
enable_8259A_irq(0);
@ -2541,7 +2542,8 @@ int arch_setup_msi_irq(unsigned int irq, struct pci_dev *dev)
write_msi_msg(irq, &msg);
set_irq_chip_and_handler(irq, &msi_chip, handle_edge_irq);
set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq,
"edge");
return 0;
}
@ -2636,7 +2638,8 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
write_ht_irq_low(irq, low);
write_ht_irq_high(irq, high);
set_irq_chip_and_handler(irq, &ht_irq_chip, handle_edge_irq);
set_irq_chip_and_handler_name(irq, &ht_irq_chip,
handle_edge_irq, "edge");
}
return vector;
}

2
arch/i386/kernel/irq.c
View file

@ -258,7 +258,7 @@ int show_interrupts(struct seq_file *p, void *v)
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
#endif
seq_printf(p, " %8s", irq_desc[i].chip->name);
seq_printf(p, "-%s", handle_irq_name(irq_desc[i].handle_irq));
seq_printf(p, "-%-8s", irq_desc[i].name);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)

7
arch/x86_64/kernel/i8259.c
View file

@ -178,7 +178,8 @@ void make_8259A_irq(unsigned int irq)
{
disable_irq_nosync(irq);
io_apic_irqs &= ~(1<<irq);
set_irq_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
set_irq_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq,
"XT");
enable_irq(irq);
}
@ -431,8 +432,8 @@ void __init init_ISA_irqs (void)
/*
* 16 old-style INTA-cycle interrupts:
*/
set_irq_chip_and_handler(i, &i8259A_chip,
handle_level_irq);
set_irq_chip_and_handler_name(i, &i8259A_chip,
handle_level_irq, "XT");
} else {
/*
* 'high' PCI IRQs filled in on demand

15
arch/x86_64/kernel/io_apic.c
View file

@ -696,11 +696,11 @@ static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
{
if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
trigger == IOAPIC_LEVEL)
set_irq_chip_and_handler(irq, &ioapic_chip,
handle_fasteoi_irq);
set_irq_chip_and_handler_name(irq, &ioapic_chip,
handle_fasteoi_irq, "fasteoi");
else
set_irq_chip_and_handler(irq, &ioapic_chip,
handle_edge_irq);
set_irq_chip_and_handler_name(irq, &ioapic_chip,
handle_edge_irq, "edge");
}
static void __init setup_IO_APIC_irqs(void)
@ -806,7 +806,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
* The timer IRQ doesn't have to know that behind the
* scene we have a 8259A-master in AEOI mode ...
*/
set_irq_chip_and_handler(0, &ioapic_chip, handle_edge_irq);
set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge");
/*
* Add it to the IO-APIC irq-routing table:
@ -1839,7 +1839,7 @@ int arch_setup_msi_irq(unsigned int irq, struct pci_dev *dev)
write_msi_msg(irq, &msg);
set_irq_chip_and_handler(irq, &msi_chip, handle_edge_irq);
set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge");
return 0;
}
@ -1936,7 +1936,8 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
write_ht_irq_low(irq, low);
write_ht_irq_high(irq, high);
set_irq_chip_and_handler(irq, &ht_irq_chip, handle_edge_irq);
set_irq_chip_and_handler_name(irq, &ht_irq_chip,
handle_edge_irq, "edge");
}
return vector;
}

2
arch/x86_64/kernel/irq.c
View file

@ -75,7 +75,7 @@ int show_interrupts(struct seq_file *p, void *v)
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
#endif
seq_printf(p, " %8s", irq_desc[i].chip->name);
seq_printf(p, "-%s", handle_irq_name(irq_desc[i].handle_irq));
seq_printf(p, "-%-8s", irq_desc[i].name);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)

22
include/linux/irq.h
View file

@ -141,6 +141,7 @@ struct irq_chip {
* @pending_mask: pending rebalanced interrupts
* @dir: /proc/irq/ procfs entry
* @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
* @name: flow handler name for /proc/interrupts output
*
* Pad this out to 32 bytes for cache and indexing reasons.
*/
@ -165,8 +166,9 @@ struct irq_desc {
cpumask_t pending_mask;
#endif
#ifdef CONFIG_PROC_FS
struct proc_dir_entry *dir;
struct proc_dir_entry *dir;
#endif
const char *name;
} ____cacheline_aligned;
extern struct irq_desc irq_desc[NR_IRQS];
@ -271,12 +273,6 @@ extern void fastcall handle_simple_irq(unsigned int irq, struct irq_desc *desc);
extern void fastcall handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
extern void fastcall handle_bad_irq(unsigned int irq, struct irq_desc *desc);
/*
* Get a descriptive string for the highlevel handler, for
* /proc/interrupts output:
*/
extern const char *handle_irq_name(irq_flow_handler_t handle);
/*
* Monolithic do_IRQ implementation.
* (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
@ -326,10 +322,12 @@ extern struct irq_chip no_irq_chip;
extern struct irq_chip dummy_irq_chip;
extern void
set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
irq_flow_handler_t handle);
set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
irq_flow_handler_t handle, const char *name);
extern void
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained);
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
const char *name);
/*
* Set a highlevel flow handler for a given IRQ:
@ -337,7 +335,7 @@ __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained);
static inline void
set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
{
__set_irq_handler(irq, handle, 0);
__set_irq_handler(irq, handle, 0, NULL);
}
/*
@ -349,7 +347,7 @@ static inline void
set_irq_chained_handler(unsigned int irq,
irq_flow_handler_t handle)
{
__set_irq_handler(irq, handle, 1);
__set_irq_handler(irq, handle, 1, NULL);
}
/* Handle dynamic irq creation and destruction */

33
kernel/irq/chip.c
View file

@ -499,7 +499,8 @@ handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
#endif /* CONFIG_SMP */
void
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained)
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
const char *name)
{
struct irq_desc *desc;
unsigned long flags;
@ -540,6 +541,7 @@ __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained)
desc->depth = 1;
}
desc->handle_irq = handle;
desc->name = name;
if (handle != handle_bad_irq && is_chained) {
desc->status &= ~IRQ_DISABLED;
@ -555,30 +557,13 @@ set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
irq_flow_handler_t handle)
{
set_irq_chip(irq, chip);
__set_irq_handler(irq, handle, 0);
__set_irq_handler(irq, handle, 0, NULL);
}
/*
* Get a descriptive string for the highlevel handler, for
* /proc/interrupts output:
*/
const char *
handle_irq_name(irq_flow_handler_t handle)
void
set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
irq_flow_handler_t handle, const char *name)
{
if (handle == handle_level_irq)
return "level ";
if (handle == handle_fasteoi_irq)
return "fasteoi";
if (handle == handle_edge_irq)
return "edge ";
if (handle == handle_simple_irq)
return "simple ";
#ifdef CONFIG_SMP
if (handle == handle_percpu_irq)
return "percpu ";
#endif
if (handle == handle_bad_irq)
return "bad ";
return NULL;
set_irq_chip(irq, chip);
__set_irq_handler(irq, handle, 0, name);
}