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agp: add chipset flushing support to AGP interface
This bumps the AGP interface to 0.103. Certain Intel chipsets contains a global write buffer, and this can require flushing from the drm or X.org to make sure all data has hit RAM before initiating a GPU transfer, due to a lack of coherency with the integrated graphics device and this buffer. This just adds generic support to the AGP interfaces, a follow-on patch will add support to the Intel driver to use this interface. Signed-off-by: Dave Airlie <airlied@redhat.com>
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9ef9dc69d4
commit
a13af4b4d8
8 changed files with 29 additions and 2 deletions
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@ -117,7 +117,8 @@ struct agp_bridge_driver {
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void (*free_by_type)(struct agp_memory *);
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void *(*agp_alloc_page)(struct agp_bridge_data *);
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void (*agp_destroy_page)(void *, int flags);
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int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
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int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
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void (*chipset_flush)(struct agp_bridge_data *);
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};
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struct agp_bridge_data {
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@ -43,7 +43,7 @@
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* fix some real stupidity. It's only by chance we can bump
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* past 0.99 at all due to some boolean logic error. */
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#define AGPGART_VERSION_MAJOR 0
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#define AGPGART_VERSION_MINOR 102
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#define AGPGART_VERSION_MINOR 103
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static const struct agp_version agp_current_version =
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{
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.major = AGPGART_VERSION_MAJOR,
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@ -273,6 +273,10 @@ long compat_agp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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case AGPIOC_UNBIND32:
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ret_val = compat_agpioc_unbind_wrap(curr_priv, (void __user *) arg);
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break;
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case AGPIOC_CHIPSET_FLUSH32:
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ret_val = agpioc_chipset_flush_wrap(curr_priv);
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break;
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}
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ioctl_out:
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@ -39,6 +39,7 @@
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#define AGPIOC_DEALLOCATE32 _IOW (AGPIOC_BASE, 7, compat_int_t)
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#define AGPIOC_BIND32 _IOW (AGPIOC_BASE, 8, compat_uptr_t)
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#define AGPIOC_UNBIND32 _IOW (AGPIOC_BASE, 9, compat_uptr_t)
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#define AGPIOC_CHIPSET_FLUSH32 _IO (AGPIOC_BASE, 10)
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struct agp_info32 {
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struct agp_version version; /* version of the driver */
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@ -101,5 +102,6 @@ void agp_free_memory_wrap(struct agp_memory *memory);
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struct agp_memory *agp_allocate_memory_wrap(size_t pg_count, u32 type);
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struct agp_memory *agp_find_mem_by_key(int key);
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struct agp_client *agp_find_client_by_pid(pid_t id);
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int agpioc_chipset_flush_wrap(struct agp_file_private *priv);
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#endif /* _AGP_COMPAT_H */
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@ -960,6 +960,13 @@ static int agpioc_unbind_wrap(struct agp_file_private *priv, void __user *arg)
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return agp_unbind_memory(memory);
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}
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int agpioc_chipset_flush_wrap(struct agp_file_private *priv)
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{
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DBG("");
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agp_flush_chipset(agp_bridge);
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return 0;
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}
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static int agp_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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@ -1033,6 +1040,10 @@ static int agp_ioctl(struct inode *inode, struct file *file,
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case AGPIOC_UNBIND:
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ret_val = agpioc_unbind_wrap(curr_priv, (void __user *) arg);
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break;
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case AGPIOC_CHIPSET_FLUSH:
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ret_val = agpioc_chipset_flush_wrap(curr_priv);
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break;
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}
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ioctl_out:
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@ -80,6 +80,13 @@ static int agp_get_key(void)
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return -1;
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}
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void agp_flush_chipset(struct agp_bridge_data *bridge)
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{
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if (bridge->driver->chipset_flush)
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bridge->driver->chipset_flush(bridge);
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}
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EXPORT_SYMBOL(agp_flush_chipset);
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/*
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* Use kmalloc if possible for the page list. Otherwise fall back to
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* vmalloc. This speeds things up and also saves memory for small AGP
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@ -109,6 +109,7 @@ extern int agp_unbind_memory(struct agp_memory *);
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extern void agp_enable(struct agp_bridge_data *, u32);
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extern struct agp_bridge_data *agp_backend_acquire(struct pci_dev *);
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extern void agp_backend_release(struct agp_bridge_data *);
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extern void agp_flush_chipset(struct agp_bridge_data *);
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#endif /* __KERNEL__ */
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#endif /* _AGP_BACKEND_H */
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@ -38,6 +38,7 @@
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#define AGPIOC_DEALLOCATE _IOW (AGPIOC_BASE, 7, int)
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#define AGPIOC_BIND _IOW (AGPIOC_BASE, 8, struct agp_bind*)
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#define AGPIOC_UNBIND _IOW (AGPIOC_BASE, 9, struct agp_unbind*)
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#define AGPIOC_CHIPSET_FLUSH _IO (AGPIOC_BASE, 10)
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#define AGP_DEVICE "/dev/agpgart"
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