[SERIAL] uart_port iotype member should use UPIO_*

Convert usage of SERIAL_IO_* to UPIO_*.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2006-02-05 10:48:10 +00:00 committed by Russell King
parent 53ea68ecea
commit 9b4a161777
38 changed files with 66 additions and 66 deletions

View file

@ -135,7 +135,7 @@ void __init serial_init(void)
memset(&s, 0, sizeof(s));
s.flags = STD_COM_FLAGS;
s.iotype = SERIAL_IO_MEM;
s.iotype = UPIO_MEM;
if (mips_machtype == MACH_LASAT_100) {
s.uartclk = LASAT_BASE_BAUD_100 * 16;

View file

@ -83,7 +83,7 @@ static void __init serial_init(void)
s.irq = ATLASINT_UART;
s.uartclk = ATLAS_BASE_BAUD * 16;
s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
s.iotype = SERIAL_IO_PORT;
s.iotype = UPIO_PORT;
s.regshift = 3;
if (early_serial_setup(&s) != 0) {

View file

@ -72,7 +72,7 @@ static void __init serial_init(void)
s.irq = MIPSCPU_INT_BASE + MIPSCPU_INT_UART0;
s.uartclk = SEAD_BASE_BAUD * 16;
s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
s.iotype = 0;
s.iotype = UPIO_PORT;
s.regshift = 3;
if (early_serial_setup(&s) != 0) {

View file

@ -89,7 +89,7 @@ static void __init serial_init(void)
s.irq = 0;
s.uartclk = BASE_BAUD * 16;
s.flags = ASYNC_BOOT_AUTOCONF | UPF_SKIP_TEST;
s.iotype = SERIAL_IO_PORT | ASYNC_SKIP_TEST;
s.iotype = UPIO_PORT;
s.regshift = 0;
s.timeout = 4;

View file

@ -66,7 +66,7 @@ struct ip3106_port ip3106_ports[] = {
[0] = {
.port = {
.type = PORT_IP3106,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void __iomem *)PNX8550_UART_PORT0,
.mapbase = PNX8550_UART_PORT0,
.irq = PNX8550_UART_INT(0),
@ -80,7 +80,7 @@ struct ip3106_port ip3106_ports[] = {
[1] = {
.port = {
.type = PORT_IP3106,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void __iomem *)PNX8550_UART_PORT1,
.mapbase = PNX8550_UART_PORT1,
.irq = PNX8550_UART_INT(1),

View file

@ -332,7 +332,7 @@ bamboo_early_serial_map(void)
port.irq = 0;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.line = 0;

View file

@ -97,7 +97,7 @@ bubinga_early_serial_map(void)
port.irq = ACTING_UART0_INT;
port.uartclk = uart_clock;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.line = 0;

View file

@ -225,7 +225,7 @@ ebony_early_serial_map(void)
port.irq = 0;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.line = 0;

View file

@ -279,7 +279,7 @@ luan_early_serial_map(void)
port.irq = UART0_INT;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.line = 0;

View file

@ -248,7 +248,7 @@ ocotea_early_serial_map(void)
port.irq = UART0_INT;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.line = 0;

View file

@ -95,7 +95,7 @@ ml300_early_serial_map(void)
port.irq = old_ports[i].irq;
port.uartclk = old_ports[i].baud_base * 16;
port.regshift = old_ports[i].iomem_reg_shift;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.line = i;

View file

@ -305,7 +305,7 @@ yucca_early_serial_map(void)
port.irq = UART0_INT;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.line = 0;

View file

@ -301,14 +301,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
struct uart_port p;
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
p.uartclk = binfo->bi_busfreq;
gen550_init(0, &p);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
p.uartclk = binfo->bi_busfreq;

View file

@ -162,14 +162,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
p.uartclk = binfo->bi_busfreq;
gen550_init(0, &p);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
p.uartclk = binfo->bi_busfreq;

View file

@ -534,14 +534,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
p.uartclk = binfo->bi_busfreq;
gen550_init(0, &p);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
p.uartclk = binfo->bi_busfreq;

View file

@ -64,7 +64,7 @@ sbc8560_early_serial_map(void)
uart_req.irq = MPC85xx_IRQ_EXT9;
uart_req.flags = STD_COM_FLAGS;
uart_req.uartclk = BASE_BAUD * 16;
uart_req.iotype = SERIAL_IO_MEM;
uart_req.iotype = UPIO_MEM;
uart_req.mapbase = UARTA_ADDR;
uart_req.membase = ioremap(uart_req.mapbase, MPC85xx_UART0_SIZE);
uart_req.type = PORT_16650;

View file

@ -346,14 +346,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
p.uartclk = binfo->bi_busfreq;
gen550_init(0, &p);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
p.uartclk = binfo->bi_busfreq;

View file

@ -116,7 +116,7 @@ chestnut_early_serial_map(void)
port.uartclk = BASE_BAUD * 16;
port.irq = UART0_INT;
port.flags = STD_COM_FLAGS | UPF_IOREMAP;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.mapbase = CHESTNUT_UART0_IO_BASE;
port.regshift = 0;

View file

@ -330,7 +330,7 @@ ev64260_early_serial_map(void)
port.irq = EV64260_UART_0_IRQ;
port.uartclk = BASE_BAUD * 16;
port.regshift = 2;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = STD_COM_FLAGS;
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)

View file

@ -100,7 +100,7 @@ static void __init ppc7d_early_serial_map(void)
serial_req.uartclk = UART_CLK;
serial_req.irq = 4;
serial_req.flags = STD_COM_FLAGS;
serial_req.iotype = SERIAL_IO_MEM;
serial_req.iotype = UPIO_MEM;
serial_req.membase = (u_char *) PPC7D_SERIAL_0;
gen550_init(0, &serial_req);

View file

@ -177,7 +177,7 @@ spruce_early_serial_map(void)
serial_req.uartclk = uart_clk;
serial_req.irq = UART0_INT;
serial_req.flags = ASYNC_BOOT_AUTOCONF;
serial_req.iotype = SERIAL_IO_MEM;
serial_req.iotype = UPIO_MEM;
serial_req.membase = (u_char *)UART0_IO_BASE;
serial_req.regshift = 0;

View file

@ -108,7 +108,7 @@ mpc83xx_early_serial_map(void)
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
memset(&serial_req, 0, sizeof (serial_req));
serial_req.iotype = SERIAL_IO_MEM;
serial_req.iotype = UPIO_MEM;
serial_req.mapbase = pdata[0].mapbase;
serial_req.membase = pdata[0].membase;
serial_req.regshift = 0;

View file

@ -90,7 +90,7 @@ mpc85xx_early_serial_map(void)
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
memset(&serial_req, 0, sizeof (serial_req));
serial_req.iotype = SERIAL_IO_MEM;
serial_req.iotype = UPIO_MEM;
serial_req.mapbase = pdata[0].mapbase;
serial_req.membase = pdata[0].membase;
serial_req.regshift = 0;

View file

@ -362,7 +362,7 @@ static struct uart_ops serial21285_ops = {
static struct uart_port serial21285_port = {
.mapbase = 0x42000160,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = NO_IRQ,
.fifosize = 16,
.ops = &serial21285_ops,

View file

@ -561,7 +561,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
.port = {
.membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
.mapbase = INTEGRATOR_UART0_BASE,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UARTINT0,
.uartclk = 14745600,
.fifosize = 16,
@ -576,7 +576,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
.port = {
.membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
.mapbase = INTEGRATOR_UART1_BASE,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UARTINT1,
.uartclk = 14745600,
.fifosize = 16,

View file

@ -892,7 +892,7 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res
int ret = 0;
switch (up->port.iotype) {
case SERIAL_IO_MEM:
case UPIO_MEM:
if (up->port.mapbase) {
*res = request_mem_region(up->port.mapbase, size, "serial");
if (!*res)
@ -900,8 +900,8 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res
}
break;
case SERIAL_IO_HUB6:
case SERIAL_IO_PORT:
case UPIO_HUB6:
case UPIO_PORT:
*res = request_region(up->port.iobase, size, "serial");
if (!*res)
ret = -EBUSY;
@ -919,7 +919,7 @@ static void serial8250_release_port(struct uart_port *port)
size <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_MEM:
case UPIO_MEM:
if (up->port.mapbase) {
/*
* Unmap the area.
@ -935,8 +935,8 @@ static void serial8250_release_port(struct uart_port *port)
}
break;
case SERIAL_IO_HUB6:
case SERIAL_IO_PORT:
case UPIO_HUB6:
case UPIO_PORT:
start = up->port.iobase;
if (size)

View file

@ -908,7 +908,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SMC1_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.flags = FLAG_SMC,
@ -922,7 +922,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SMC2_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.flags = FLAG_SMC,
@ -939,7 +939,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC1_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -953,7 +953,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC2_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -967,7 +967,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC3_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -981,7 +981,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC4_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,

View file

@ -650,7 +650,7 @@ static void __init dz_init_ports(void)
for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
spin_lock_init(&dport->port.lock);
dport->port.membase = (char *) base;
dport->port.iotype = SERIAL_IO_PORT;
dport->port.iotype = UPIO_PORT;
dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
dport->port.line = i;
dport->port.fifosize = 1;

View file

@ -668,7 +668,7 @@ static struct imx_port imx_ports[] = {
.rtsirq = UART1_MINT_RTS,
.port = {
.type = PORT_IMX,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void *)IMX_UART1_BASE,
.mapbase = IMX_UART1_BASE, /* FIXME */
.irq = UART1_MINT_RX,
@ -684,7 +684,7 @@ static struct imx_port imx_ports[] = {
.rtsirq = UART2_MINT_RTS,
.port = {
.type = PORT_IMX,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void *)IMX_UART2_BASE,
.mapbase = IMX_UART2_BASE, /* FIXME */
.irq = UART2_MINT_RX,

View file

@ -462,7 +462,7 @@ static int __init mux_probe(struct parisc_device *dev)
port->mapbase = dev->hpa.start + MUX_OFFSET +
(i * MUX_LINE_OFFSET);
port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET);
port->iotype = SERIAL_IO_MEM;
port->iotype = UPIO_MEM;
port->type = PORT_MUX;
port->irq = NO_IRQ;
port->uartclk = 0;

View file

@ -1492,7 +1492,7 @@ no_dma:
/*
* Init remaining bits of "port" structure
*/
uap->port.iotype = SERIAL_IO_MEM;
uap->port.iotype = UPIO_MEM;
uap->port.irq = np->intrs[0].line;
uap->port.uartclk = ZS_CLOCK;
uap->port.fifosize = 1;

View file

@ -628,7 +628,7 @@ static void __init sa1100_init_ports(void)
sa1100_ports[i].port.ops = &sa1100_pops;
sa1100_ports[i].port.fifosize = 8;
sa1100_ports[i].port.line = i;
sa1100_ports[i].port.iotype = SERIAL_IO_MEM;
sa1100_ports[i].port.iotype = UPIO_MEM;
init_timer(&sa1100_ports[i].timer);
sa1100_ports[i].timer.function = sa1100_timeout;
sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];

View file

@ -501,7 +501,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART1_PHYS),
.mapbase = UART1_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART1INTR,
.uartclk = 14745600/2,
.fifosize = 16,
@ -514,7 +514,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART2_PHYS),
.mapbase = UART2_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART2INTR,
.uartclk = 14745600/2,
.fifosize = 16,
@ -527,7 +527,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART3_PHYS),
.mapbase = UART3_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART3INTR,
.uartclk = 14745600/2,
.fifosize = 16,

View file

@ -1468,7 +1468,7 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff923000,
.mapbase = 0xff923000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 61,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
@ -1482,7 +1482,7 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff924000,
.mapbase = 0xff924000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 62,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
@ -1496,7 +1496,7 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff925000,
.mapbase = 0xff925000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 63,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
@ -1511,7 +1511,7 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
@ -1525,7 +1525,7 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xffe10000,
.mapbase = 0xffe10000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 79,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,

View file

@ -1036,7 +1036,7 @@ static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg
up->port.irq = edev->irqs[0];
up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
up->port.mapbase = (unsigned long)up->regs;
up->port.iotype = SERIAL_IO_MEM;
up->port.iotype = UPIO_MEM;
writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);

View file

@ -109,11 +109,11 @@ static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
offset <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_HUB6:
case UPIO_HUB6:
outb(up->port.hub6 - 1 + offset, up->port.iobase);
return inb(up->port.iobase + 1);
case SERIAL_IO_MEM:
case UPIO_MEM:
return readb(up->port.membase + offset);
default:
@ -139,12 +139,12 @@ serial_out(struct uart_sunsu_port *up, int offset, int value)
offset <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_HUB6:
case UPIO_HUB6:
outb(up->port.hub6 - 1 + offset, up->port.iobase);
outb(value, up->port.iobase + 1);
break;
case SERIAL_IO_MEM:
case UPIO_MEM:
writeb(value, up->port.membase + offset);
break;
@ -1052,7 +1052,7 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up)
return;
up->type_probed = PORT_UNKNOWN;
up->port.iotype = SERIAL_IO_MEM;
up->port.iotype = UPIO_MEM;
/*
* First we look for Ebus-bases su's

View file

@ -1487,7 +1487,7 @@ static void __init sunzilog_prepare(void)
up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB;
/* Channel A */
up[(chip * 2) + 0].port.iotype = SERIAL_IO_MEM;
up[(chip * 2) + 0].port.iotype = UPIO_MEM;
up[(chip * 2) + 0].port.irq = zilog_irq;
up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;
up[(chip * 2) + 0].port.fifosize = 1;
@ -1498,7 +1498,7 @@ static void __init sunzilog_prepare(void)
up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
/* Channel B */
up[(chip * 2) + 1].port.iotype = SERIAL_IO_MEM;
up[(chip * 2) + 1].port.iotype = UPIO_MEM;
up[(chip * 2) + 1].port.irq = zilog_irq;
up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;
up[(chip * 2) + 1].port.fifosize = 1;

View file

@ -496,7 +496,7 @@ static int __init v850e_uart_init (void)
port->ops = &v850e_uart_ops;
port->line = chan;
port->iotype = SERIAL_IO_MEM;
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF;
/* We actually use multiple IRQs, but the serial