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KVM: allow access to EFER in 32bit KVM
This patch makes the EFER register accessible on a 32bit KVM host. This is necessary to boot 32 bit PAE guests under SVM. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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1 changed files with 0 additions and 10 deletions
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@ -432,8 +432,6 @@ static u32 emulated_msrs[] = {
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MSR_IA32_MISC_ENABLE,
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};
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#ifdef CONFIG_X86_64
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static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
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{
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if (efer & efer_reserved_bits) {
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@ -458,8 +456,6 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
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vcpu->arch.shadow_efer = efer;
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}
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#endif
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void kvm_enable_efer_bits(u64 mask)
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{
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efer_reserved_bits &= ~mask;
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@ -489,11 +485,9 @@ static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
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int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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{
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switch (msr) {
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#ifdef CONFIG_X86_64
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case MSR_EFER:
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set_efer(vcpu, data);
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break;
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#endif
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case MSR_IA32_MC0_STATUS:
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pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
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__FUNCTION__, data);
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@ -571,11 +565,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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case MSR_IA32_MISC_ENABLE:
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data = vcpu->arch.ia32_misc_enable_msr;
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break;
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#ifdef CONFIG_X86_64
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case MSR_EFER:
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data = vcpu->arch.shadow_efer;
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break;
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#endif
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default:
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pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
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return 1;
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@ -2880,9 +2872,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
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set_cr8(vcpu, sregs->cr8);
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mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
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#ifdef CONFIG_X86_64
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kvm_x86_ops->set_efer(vcpu, sregs->efer);
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#endif
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kvm_set_apic_base(vcpu, sregs->apic_base);
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kvm_x86_ops->decache_cr4_guest_bits(vcpu);
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