mirror of
https://github.com/adulau/aha.git
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sunqe: Convert to pure OF driver.
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
af736fede7
commit
8e912b3339
2 changed files with 71 additions and 80 deletions
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@ -3,7 +3,7 @@
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* controller out there can be most efficiently programmed
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* if you make it look like a LANCE.
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*
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* Copyright (C) 1996, 1999, 2003, 2006 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1996, 1999, 2003, 2006, 2008 David S. Miller (davem@davemloft.net)
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*/
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#include <linux/module.h>
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@ -25,13 +25,14 @@
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#include <linux/ethtool.h>
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#include <linux/bitops.h>
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#include <linux/dma-mapping.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/byteorder.h>
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#include <asm/idprom.h>
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#include <asm/sbus.h>
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#include <asm/openprom.h>
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#include <asm/oplib.h>
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#include <asm/auxio.h>
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@ -41,8 +42,8 @@
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#include "sunqe.h"
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#define DRV_NAME "sunqe"
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#define DRV_VERSION "4.0"
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#define DRV_RELDATE "June 23, 2006"
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#define DRV_VERSION "4.1"
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#define DRV_RELDATE "August 27, 2008"
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#define DRV_AUTHOR "David S. Miller (davem@davemloft.net)"
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static char version[] =
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@ -691,12 +692,18 @@ static void qe_set_multicast(struct net_device *dev)
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/* Ethtool support... */
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static void qe_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
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{
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const struct linux_prom_registers *regs;
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struct sunqe *qep = dev->priv;
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struct of_device *op;
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strcpy(info->driver, "sunqe");
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strcpy(info->version, "3.0");
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sprintf(info->bus_info, "SBUS:%d",
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qep->qe_sdev->slot);
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op = qep->op;
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regs = of_get_property(op->node, "reg", NULL);
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if (regs)
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sprintf(info->bus_info, "SBUS:%d", regs->which_io);
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}
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static u32 qe_get_link(struct net_device *dev)
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@ -718,7 +725,7 @@ static const struct ethtool_ops qe_ethtool_ops = {
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};
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/* This is only called once at boot time for each card probed. */
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static inline void qec_init_once(struct sunqec *qecp, struct sbus_dev *qsdev)
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static void qec_init_once(struct sunqec *qecp, struct of_device *op)
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{
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u8 bsizes = qecp->qec_bursts;
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@ -736,15 +743,15 @@ static inline void qec_init_once(struct sunqec *qecp, struct sbus_dev *qsdev)
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sbus_writel(GLOB_PSIZE_2048, qecp->gregs + GLOB_PSIZE);
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/* Set the local memsize register, divided up to one piece per QE channel. */
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sbus_writel((qsdev->reg_addrs[1].reg_size >> 2),
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sbus_writel((resource_size(&op->resource[1]) >> 2),
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qecp->gregs + GLOB_MSIZE);
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/* Divide up the local QEC memory amongst the 4 QE receiver and
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* transmitter FIFOs. Basically it is (total / 2 / num_channels).
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*/
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sbus_writel((qsdev->reg_addrs[1].reg_size >> 2) >> 1,
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sbus_writel((resource_size(&op->resource[1]) >> 2) >> 1,
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qecp->gregs + GLOB_TSIZE);
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sbus_writel((qsdev->reg_addrs[1].reg_size >> 2) >> 1,
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sbus_writel((resource_size(&op->resource[1]) >> 2) >> 1,
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qecp->gregs + GLOB_RSIZE);
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}
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@ -768,24 +775,21 @@ static u8 __devinit qec_get_burst(struct device_node *dp)
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return bsizes;
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}
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static struct sunqec * __devinit get_qec(struct sbus_dev *child_sdev)
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static struct sunqec * __devinit get_qec(struct of_device *child)
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{
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struct sbus_dev *qec_sdev = child_sdev->parent;
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struct of_device *op = to_of_device(child->dev.parent);
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struct sunqec *qecp;
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for (qecp = root_qec_dev; qecp; qecp = qecp->next_module) {
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if (qecp->qec_sdev == qec_sdev)
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break;
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}
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qecp = dev_get_drvdata(&op->dev);
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if (!qecp) {
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qecp = kzalloc(sizeof(struct sunqec), GFP_KERNEL);
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if (qecp) {
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u32 ctrl;
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qecp->qec_sdev = qec_sdev;
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qecp->gregs = sbus_ioremap(&qec_sdev->resource[0], 0,
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GLOB_REG_SIZE,
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"QEC Global Registers");
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qecp->op = op;
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qecp->gregs = of_ioremap(&op->resource[0], 0,
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GLOB_REG_SIZE,
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"QEC Global Registers");
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if (!qecp->gregs)
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goto fail;
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@ -800,16 +804,18 @@ static struct sunqec * __devinit get_qec(struct sbus_dev *child_sdev)
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if (qec_global_reset(qecp->gregs))
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goto fail;
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qecp->qec_bursts = qec_get_burst(qec_sdev->ofdev.node);
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qecp->qec_bursts = qec_get_burst(op->node);
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qec_init_once(qecp, qec_sdev);
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qec_init_once(qecp, op);
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if (request_irq(qec_sdev->irqs[0], &qec_interrupt,
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if (request_irq(op->irqs[0], &qec_interrupt,
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IRQF_SHARED, "qec", (void *) qecp)) {
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printk(KERN_ERR "qec: Can't register irq.\n");
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goto fail;
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}
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dev_set_drvdata(&op->dev, qecp);
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qecp->next_module = root_qec_dev;
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root_qec_dev = qecp;
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}
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@ -819,17 +825,17 @@ static struct sunqec * __devinit get_qec(struct sbus_dev *child_sdev)
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fail:
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if (qecp->gregs)
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sbus_iounmap(qecp->gregs, GLOB_REG_SIZE);
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of_iounmap(&op->resource[0], qecp->gregs, GLOB_REG_SIZE);
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kfree(qecp);
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return NULL;
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}
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static int __devinit qec_ether_init(struct sbus_dev *sdev)
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static int __devinit qec_ether_init(struct of_device *op)
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{
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static unsigned version_printed;
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struct net_device *dev;
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struct sunqe *qe;
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struct sunqec *qecp;
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struct sunqe *qe;
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int i, res;
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if (version_printed++ == 0)
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qe = netdev_priv(dev);
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i = of_getintprop_default(sdev->ofdev.node, "channel#", -1);
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if (i == -1) {
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struct sbus_dev *td = sdev->parent->child;
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i = 0;
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while (td != sdev) {
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td = td->next;
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i++;
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}
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}
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res = -ENODEV;
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i = of_getintprop_default(op->node, "channel#", -1);
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if (i == -1)
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goto fail;
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qe->channel = i;
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spin_lock_init(&qe->lock);
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res = -ENODEV;
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qecp = get_qec(sdev);
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qecp = get_qec(op);
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if (!qecp)
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goto fail;
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qecp->qes[qe->channel] = qe;
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qe->dev = dev;
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qe->parent = qecp;
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qe->qe_sdev = sdev;
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qe->op = op;
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res = -ENOMEM;
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qe->qcregs = sbus_ioremap(&qe->qe_sdev->resource[0], 0,
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CREG_REG_SIZE, "QEC Channel Registers");
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qe->qcregs = of_ioremap(&op->resource[0], 0,
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CREG_REG_SIZE, "QEC Channel Registers");
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if (!qe->qcregs) {
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printk(KERN_ERR "qe: Cannot map channel registers.\n");
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goto fail;
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}
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qe->mregs = sbus_ioremap(&qe->qe_sdev->resource[1], 0,
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MREGS_REG_SIZE, "QE MACE Registers");
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qe->mregs = of_ioremap(&op->resource[1], 0,
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MREGS_REG_SIZE, "QE MACE Registers");
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if (!qe->mregs) {
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printk(KERN_ERR "qe: Cannot map MACE registers.\n");
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goto fail;
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}
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qe->qe_block = dma_alloc_coherent(&qe->qe_sdev->ofdev.dev,
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PAGE_SIZE,
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qe->qe_block = dma_alloc_coherent(&op->dev, PAGE_SIZE,
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&qe->qblock_dvma, GFP_ATOMIC);
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qe->buffers = dma_alloc_coherent(&qe->qe_sdev->ofdev.dev,
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sizeof(struct sunqe_buffers),
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qe->buffers = dma_alloc_coherent(&op->dev, sizeof(struct sunqe_buffers),
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&qe->buffers_dvma, GFP_ATOMIC);
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if (qe->qe_block == NULL || qe->qblock_dvma == 0 ||
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qe->buffers == NULL || qe->buffers_dvma == 0)
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/* Stop this QE. */
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qe_stop(qe);
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SET_NETDEV_DEV(dev, &sdev->ofdev.dev);
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SET_NETDEV_DEV(dev, &op->dev);
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dev->open = qe_open;
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dev->stop = qe_close;
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dev->set_multicast_list = qe_set_multicast;
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dev->tx_timeout = qe_tx_timeout;
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dev->watchdog_timeo = 5*HZ;
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dev->irq = sdev->irqs[0];
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dev->irq = op->irqs[0];
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dev->dma = 0;
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dev->ethtool_ops = &qe_ethtool_ops;
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if (res)
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goto fail;
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dev_set_drvdata(&sdev->ofdev.dev, qe);
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dev_set_drvdata(&op->dev, qe);
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printk(KERN_INFO "%s: qe channel[%d] ", dev->name, qe->channel);
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for (i = 0; i < 6; i++)
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fail:
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if (qe->qcregs)
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sbus_iounmap(qe->qcregs, CREG_REG_SIZE);
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of_iounmap(&op->resource[0], qe->qcregs, CREG_REG_SIZE);
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if (qe->mregs)
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sbus_iounmap(qe->mregs, MREGS_REG_SIZE);
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of_iounmap(&op->resource[1], qe->mregs, MREGS_REG_SIZE);
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if (qe->qe_block)
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dma_free_coherent(&qe->qe_sdev->ofdev.dev,
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PAGE_SIZE,
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qe->qe_block,
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qe->qblock_dvma);
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dma_free_coherent(&op->dev, PAGE_SIZE,
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qe->qe_block, qe->qblock_dvma);
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if (qe->buffers)
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dma_free_coherent(&qe->qe_sdev->ofdev.dev,
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dma_free_coherent(&op->dev,
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sizeof(struct sunqe_buffers),
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qe->buffers,
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qe->buffers_dvma);
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return res;
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}
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static int __devinit qec_sbus_probe(struct of_device *dev, const struct of_device_id *match)
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static int __devinit qec_sbus_probe(struct of_device *op, const struct of_device_id *match)
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{
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struct sbus_dev *sdev = to_sbus_device(&dev->dev);
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return qec_ether_init(sdev);
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return qec_ether_init(op);
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}
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static int __devexit qec_sbus_remove(struct of_device *dev)
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static int __devexit qec_sbus_remove(struct of_device *op)
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{
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struct sunqe *qp = dev_get_drvdata(&dev->dev);
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struct sunqe *qp = dev_get_drvdata(&op->dev);
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struct net_device *net_dev = qp->dev;
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unregister_netdev(net_dev);
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sbus_iounmap(qp->qcregs, CREG_REG_SIZE);
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sbus_iounmap(qp->mregs, MREGS_REG_SIZE);
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dma_free_coherent(&qp->qe_sdev->ofdev.dev,
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PAGE_SIZE,
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qp->qe_block,
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qp->qblock_dvma);
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dma_free_coherent(&qp->qe_sdev->ofdev.dev,
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sizeof(struct sunqe_buffers),
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qp->buffers,
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qp->buffers_dvma);
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of_iounmap(&op->resource[0], qp->qcregs, CREG_REG_SIZE);
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of_iounmap(&op->resource[1], qp->mregs, MREGS_REG_SIZE);
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dma_free_coherent(&op->dev, PAGE_SIZE,
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qp->qe_block, qp->qblock_dvma);
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dma_free_coherent(&op->dev, sizeof(struct sunqe_buffers),
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qp->buffers, qp->buffers_dvma);
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free_netdev(net_dev);
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dev_set_drvdata(&dev->dev, NULL);
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dev_set_drvdata(&op->dev, NULL);
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return 0;
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}
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@ -992,7 +983,7 @@ static struct of_platform_driver qec_sbus_driver = {
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static int __init qec_init(void)
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{
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return of_register_driver(&qec_sbus_driver, &sbus_bus_type);
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return of_register_driver(&qec_sbus_driver, &of_bus_type);
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}
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static void __exit qec_exit(void)
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@ -1001,11 +992,11 @@ static void __exit qec_exit(void)
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while (root_qec_dev) {
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struct sunqec *next = root_qec_dev->next_module;
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struct of_device *op = root_qec_dev->op;
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free_irq(root_qec_dev->qec_sdev->irqs[0],
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(void *) root_qec_dev);
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sbus_iounmap(root_qec_dev->gregs, GLOB_REG_SIZE);
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free_irq(op->irqs[0], (void *) root_qec_dev);
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of_iounmap(&op->resource[0], root_qec_dev->gregs,
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GLOB_REG_SIZE);
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kfree(root_qec_dev);
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root_qec_dev = next;
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@ -314,7 +314,7 @@ struct sunqec {
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void __iomem *gregs; /* QEC Global Registers */
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struct sunqe *qes[4]; /* Each child MACE */
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unsigned int qec_bursts; /* Support burst sizes */
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struct sbus_dev *qec_sdev; /* QEC's SBUS device */
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struct of_device *op; /* QEC's OF device */
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struct sunqec *next_module; /* List of all QECs in system */
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};
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@ -342,7 +342,7 @@ struct sunqe {
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__u32 buffers_dvma; /* DVMA visible address. */
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struct sunqec *parent;
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u8 mconfig; /* Base MACE mconfig value */
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struct sbus_dev *qe_sdev; /* QE's SBUS device struct */
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struct of_device *op; /* QE's OF device struct */
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struct net_device *dev; /* QE's netdevice struct */
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int channel; /* Who am I? */
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};
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