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[PATCH] ppc32: Add ppc_sys descriptions for PowerQUICC II devices
Added ppc_sys device and system definitions for PowerQUICC II devices. This will allow drivers for PQ2 to be proper platform device drivers. Which can be shared on PQ3 processors with the same peripherals. Signed-off-by: Matt McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
a2f40ccd29
commit
8e8fff0975
7 changed files with 619 additions and 4 deletions
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@ -41,7 +41,11 @@
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#include <asm/xmon.h>
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#include <asm/ocp.h>
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#if defined(CONFIG_85xx) || defined(CONFIG_83xx) || defined(CONFIG_MPC10X_BRIDGE)
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#define USES_PPC_SYS (defined(CONFIG_85xx) || defined(CONFIG_83xx) || \
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defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
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defined(CONFIG_PPC_MPC52xx))
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#if USES_PPC_SYS
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#include <asm/ppc_sys.h>
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#endif
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@ -241,7 +245,7 @@ int show_cpuinfo(struct seq_file *m, void *v)
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seq_printf(m, "bogomips\t: %lu.%02lu\n",
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lpj / (500000/HZ), (lpj / (5000/HZ)) % 100);
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#if defined(CONFIG_85xx) || defined(CONFIG_83xx) || defined(CONFIG_MPC10X_BRIDGE)
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#if USES_PPC_SYS
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if (cur_ppc_sys_spec->ppc_sys_name)
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seq_printf(m, "chipset\t\t: %s\n",
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cur_ppc_sys_spec->ppc_sys_name);
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@ -73,7 +73,8 @@ obj-$(CONFIG_SANDPOINT) += i8259.o pci_auto.o todc_time.o
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obj-$(CONFIG_SBC82xx) += todc_time.o
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obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \
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todc_time.o
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obj-$(CONFIG_8260) += m8260_setup.o
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obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \
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ppc_sys.o
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obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o
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obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o
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obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
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389
arch/ppc/syslib/pq2_devices.c
Normal file
389
arch/ppc/syslib/pq2_devices.c
Normal file
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@ -0,0 +1,389 @@
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/*
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* arch/ppc/syslib/pq2_devices.c
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*
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* PQ2 Device descriptions
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*
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* Maintainer: Kumar Gala <kumar.gala@freescale.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/ioport.h>
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#include <asm/cpm2.h>
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#include <asm/irq.h>
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#include <asm/ppc_sys.h>
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struct platform_device ppc_sys_platform_devices[] = {
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[MPC82xx_CPM_FCC1] = {
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.name = "fsl-cpm-fcc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x11300,
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.end = 0x1131f,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x8400,
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.end = 0x84ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC1,
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.end = SIU_INT_FCC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_FCC2] = {
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.name = "fsl-cpm-fcc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x11320,
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.end = 0x1133f,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x8500,
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.end = 0x85ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC2,
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.end = SIU_INT_FCC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_FCC3] = {
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.name = "fsl-cpm-fcc",
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.id = 3,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x11340,
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.end = 0x1135f,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x8600,
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.end = 0x86ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC3,
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.end = SIU_INT_FCC3,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_I2C] = {
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.name = "fsl-cpm-i2c",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "i2c_mem",
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.start = 0x11860,
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.end = 0x118BF,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "i2c_pram",
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.start = 0x8afc,
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.end = 0x8afd,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_I2C,
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.end = SIU_INT_I2C,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SCC1] = {
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.name = "fsl-cpm-scc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.start = 0x11A00,
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.end = 0x11A1F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.start = 0x8000,
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.end = 0x80ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SCC1,
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.end = SIU_INT_SCC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SCC2] = {
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.name = "fsl-cpm-scc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.start = 0x11A20,
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.end = 0x11A3F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.start = 0x8100,
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.end = 0x81ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SCC2,
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.end = SIU_INT_SCC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SCC3] = {
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.name = "fsl-cpm-scc",
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.id = 3,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.start = 0x11A40,
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.end = 0x11A5F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.start = 0x8200,
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.end = 0x82ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SCC3,
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.end = SIU_INT_SCC3,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SCC4] = {
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.name = "fsl-cpm-scc",
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.id = 4,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.start = 0x11A60,
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.end = 0x11A7F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.start = 0x8300,
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.end = 0x83ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SCC4,
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.end = SIU_INT_SCC4,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SPI] = {
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.name = "fsl-cpm-spi",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "spi_mem",
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.start = 0x11AA0,
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.end = 0x11AFF,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "spi_pram",
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.start = 0x89fc,
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.end = 0x89fd,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SPI,
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.end = SIU_INT_SPI,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_MCC1] = {
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.name = "fsl-cpm-mcc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "mcc_mem",
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.start = 0x11B30,
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.end = 0x11B3F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "mcc_pram",
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.start = 0x8700,
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.end = 0x877f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_MCC1,
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.end = SIU_INT_MCC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_MCC2] = {
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.name = "fsl-cpm-mcc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "mcc_mem",
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.start = 0x11B50,
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.end = 0x11B5F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "mcc_pram",
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.start = 0x8800,
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.end = 0x887f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_MCC2,
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.end = SIU_INT_MCC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SMC1] = {
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.name = "fsl-cpm-smc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "smc_mem",
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.start = 0x11A80,
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.end = 0x11A8F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "smc_pram",
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.start = 0x87fc,
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.end = 0x87fd,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SMC1,
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.end = SIU_INT_SMC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SMC2] = {
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.name = "fsl-cpm-smc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "smc_mem",
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.start = 0x11A90,
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.end = 0x11A9F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "smc_pram",
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.start = 0x88fc,
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.end = 0x88fd,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SMC2,
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.end = SIU_INT_SMC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_USB] = {
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.name = "fsl-cpm-usb",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "usb_mem",
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.start = 0x11b60,
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.end = 0x11b78,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "usb_pram",
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.start = 0x8b00,
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.end = 0x8bff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_USB,
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.end = SIU_INT_USB,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_SEC1] = {
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.name = "fsl-sec",
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.id = 1,
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.num_resources = 1,
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.resource = (struct resource[]) {
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{
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.name = "sec_mem",
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.start = 0x40000,
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.end = 0x52fff,
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.flags = IORESOURCE_MEM,
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},
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},
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},
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};
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static int __init mach_mpc82xx_fixup(struct platform_device *pdev)
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{
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ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
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return 0;
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}
|
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|
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static int __init mach_mpc82xx_init(void)
|
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{
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if (ppc_md.progress)
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ppc_md.progress("mach_mpc82xx_init:enter", 0);
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ppc_sys_device_fixup = mach_mpc82xx_fixup;
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return 0;
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}
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postcore_initcall(mach_mpc82xx_init);
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200
arch/ppc/syslib/pq2_sys.c
Normal file
200
arch/ppc/syslib/pq2_sys.c
Normal file
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@ -0,0 +1,200 @@
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/*
|
||||
* arch/ppc/syslib/pq2_devices.c
|
||||
*
|
||||
* PQ2 System descriptions
|
||||
*
|
||||
* Maintainer: Kumar Gala <kumar.gala@freescale.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
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*/
|
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|
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#include <linux/init.h>
|
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#include <linux/module.h>
|
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#include <linux/device.h>
|
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|
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#include <asm/ppc_sys.h>
|
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|
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struct ppc_sys_spec *cur_ppc_sys_spec;
|
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struct ppc_sys_spec ppc_sys_specs[] = {
|
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/* below is a list of the 8260 family of processors */
|
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{
|
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.ppc_sys_name = "8250",
|
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.mask = 0x0000ff00,
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.value = 0x00000000,
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.num_devices = 12,
|
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.device_list = (enum ppc_sys_devices[])
|
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{
|
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
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}
|
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},
|
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{
|
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.ppc_sys_name = "8255",
|
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.mask = 0x0000ff00,
|
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.value = 0x00000000,
|
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.num_devices = 11,
|
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.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
|
||||
MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
|
||||
MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
|
||||
MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
}
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8260",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000000,
|
||||
.num_devices = 12,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
|
||||
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
|
||||
MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
}
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8264",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000000,
|
||||
.num_devices = 12,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
|
||||
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
|
||||
MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
}
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8265",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000000,
|
||||
.num_devices = 12,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
|
||||
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
|
||||
MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
}
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8266",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000000,
|
||||
.num_devices = 12,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
|
||||
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
|
||||
MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
}
|
||||
},
|
||||
/* below is a list of the 8272 family of processors */
|
||||
{
|
||||
.ppc_sys_name = "8247",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000d00,
|
||||
.num_devices = 10,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
|
||||
MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
MPC82xx_CPM_USB,
|
||||
},
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8248",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000c00,
|
||||
.num_devices = 11,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
|
||||
MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
MPC82xx_CPM_USB, MPC82xx_SEC1,
|
||||
},
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8271",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000d00,
|
||||
.num_devices = 10,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
|
||||
MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
MPC82xx_CPM_USB,
|
||||
},
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8272",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000c00,
|
||||
.num_devices = 11,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
|
||||
MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
MPC82xx_CPM_USB, MPC82xx_SEC1,
|
||||
},
|
||||
},
|
||||
/* below is a list of the 8280 family of processors */
|
||||
{
|
||||
.ppc_sys_name = "8270",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000a00,
|
||||
.num_devices = 12,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
|
||||
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
|
||||
MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
},
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8275",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000a00,
|
||||
.num_devices = 12,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
|
||||
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
|
||||
MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
|
||||
},
|
||||
},
|
||||
{
|
||||
.ppc_sys_name = "8280",
|
||||
.mask = 0x0000ff00,
|
||||
.value = 0x00000a00,
|
||||
.num_devices = 13,
|
||||
.device_list = (enum ppc_sys_devices[])
|
||||
{
|
||||
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
|
||||
MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
|
||||
MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
|
||||
MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
|
||||
MPC82xx_CPM_I2C,
|
||||
},
|
||||
},
|
||||
{
|
||||
/* default match */
|
||||
.ppc_sys_name = "",
|
||||
.mask = 0x00000000,
|
||||
.value = 0x00000000,
|
||||
},
|
||||
};
|
|
@ -337,6 +337,7 @@ static __inline__ int irq_canonicalize(int irq)
|
|||
#define SIU_INT_IDMA3 ((uint)0x08 + CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_IDMA4 ((uint)0x09 + CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_SDMA ((uint)0x0a + CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_USB ((uint)0x0b + CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_TIMER1 ((uint)0x0c + CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_TIMER2 ((uint)0x0d + CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_TIMER3 ((uint)0x0e + CPM_IRQ_OFFSET)
|
||||
|
|
|
@ -67,6 +67,24 @@
|
|||
#define IO_VIRT_ADDR IO_PHYS_ADDR
|
||||
#endif
|
||||
|
||||
enum ppc_sys_devices {
|
||||
MPC82xx_CPM_FCC1,
|
||||
MPC82xx_CPM_FCC2,
|
||||
MPC82xx_CPM_FCC3,
|
||||
MPC82xx_CPM_I2C,
|
||||
MPC82xx_CPM_SCC1,
|
||||
MPC82xx_CPM_SCC2,
|
||||
MPC82xx_CPM_SCC3,
|
||||
MPC82xx_CPM_SCC4,
|
||||
MPC82xx_CPM_SPI,
|
||||
MPC82xx_CPM_MCC1,
|
||||
MPC82xx_CPM_MCC2,
|
||||
MPC82xx_CPM_SMC1,
|
||||
MPC82xx_CPM_SMC2,
|
||||
MPC82xx_CPM_USB,
|
||||
MPC82xx_SEC1,
|
||||
};
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/* The "residual" data board information structure the boot loader
|
||||
* hands to us.
|
||||
|
|
|
@ -21,7 +21,9 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#if defined(CONFIG_83xx)
|
||||
#if defined(CONFIG_8260)
|
||||
#include <asm/mpc8260.h>
|
||||
#elif defined(CONFIG_83xx)
|
||||
#include <asm/mpc83xx.h>
|
||||
#elif defined(CONFIG_85xx)
|
||||
#include <asm/mpc85xx.h>
|
||||
|
|
Loading…
Reference in a new issue