adulau/aha
1
0
Fork 0
mirror of https://github.com/adulau/aha.git synced 2024-12-27 19:26:25 +00:00
Code Issues Projects Releases Packages Wiki Activity

hwmon: (it87) Verify the VID pin usage

Browse source 
The VID input pins can alternatively be used as GPIOs. Make sure we
have at least 4 pins used for VID, otherwise don't bother reading and
exposing VID.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Tested-by: Adam Nielsen <a.nielsen@shikadi.net>
This commit is contained in:
Jean Delvare 2009-12-09 20:35:47 +01:00
parent f7290e24e3
commit 895ff26768
2 changed files with 16 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
Documentation/hwmon/it87
View file

@ -86,7 +86,6 @@ The IT8712F and IT8716F additionally feature VID inputs, used to report
the Vcore voltage of the processor. The early IT8712F have 5 VID pins, the Vcore voltage of the processor. The early IT8712F have 5 VID pins,
the IT8716F and late IT8712F have 6. They are shared with other functions the IT8716F and late IT8712F have 6. They are shared with other functions
though, so the functionality may not be available on a given system. though, so the functionality may not be available on a given system.
The driver dumbly assume it is there.
The IT8718F and IT8720F also features VID inputs (up to 8 pins) but the value The IT8718F and IT8720F also features VID inputs (up to 8 pins) but the value
is stored in the Super-I/O configuration space. Due to technical limitations, is stored in the Super-I/O configuration space. Due to technical limitations,

20
drivers/hwmon/it87.c
View file

@ -124,6 +124,7 @@ superio_exit(void)
#define IT87_BASE_REG 0x60 #define IT87_BASE_REG 0x60
/* Logical device 7 registers (IT8712F and later) */ /* Logical device 7 registers (IT8712F and later) */
#define IT87_SIO_GPIO3_REG 0x27
#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
#define IT87_SIO_VID_REG 0xfc /* VID value */ #define IT87_SIO_VID_REG 0xfc /* VID value */
@ -244,6 +245,7 @@ struct it87_sio_data {
/* Values read from Super-I/O config space */ /* Values read from Super-I/O config space */
u8 revision; u8 revision;
u8 vid_value; u8 vid_value;
u8 skip_vid;
/* Values set based on DMI strings */ /* Values set based on DMI strings */
u8 skip_pwm; u8 skip_pwm;
}; };
@ -1028,11 +1030,22 @@ static int __init it87_find(unsigned short *address,
chip_type, *address, sio_data->revision); chip_type, *address, sio_data->revision);
/* Read GPIO config and VID value from LDN 7 (GPIO) */ /* Read GPIO config and VID value from LDN 7 (GPIO) */
if (sio_data->type != it87) { if (sio_data->type == it87) {
/* The IT8705F doesn't have VID pins at all */
sio_data->skip_vid = 1;
} else {
int reg; int reg;
superio_select(GPIO); superio_select(GPIO);
if (sio_data->type == it8718 || sio_data->type == it8720) /* We need at least 4 VID pins */
reg = superio_inb(IT87_SIO_GPIO3_REG);
if (reg & 0x0f) {
pr_info("it87: VID is disabled (pins used for GPIO)\n");
sio_data->skip_vid = 1;
}
if ((sio_data->type == it8718 || sio_data->type == it8720)
&& !(sio_data->skip_vid))
sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
reg = superio_inb(IT87_SIO_PINX2_REG); reg = superio_inb(IT87_SIO_PINX2_REG);
@ -1236,8 +1249,7 @@ static int __devinit it87_probe(struct platform_device *pdev)
} }
} }
if (data->type == it8712 || data->type == it8716 if (!sio_data->skip_vid) {
|| data->type == it8718 || data->type == it8720) {
data->vrm = vid_which_vrm(); data->vrm = vid_which_vrm();
/* VID reading from Super-I/O config space if available */ /* VID reading from Super-I/O config space if available */
data->vid = sio_data->vid_value; data->vid = sio_data->vid_value;