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[ARM] 4818/1: RealView: Add core-tile detection
This patch adds the core-tile detection and only enables devices if the corresponding tile is present. It currently detects the ARM11MPCore via the core_tile_eb11mp() macro. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Catalin Marinas
Russell King
parent
0fc2a1616f
commit
7dd19e755d
3 changed files with 80 additions and 44 deletions
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@ -18,6 +18,7 @@
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#include <asm/hardware/arm_scu.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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extern void realview_secondary_startup(void);
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@ -31,9 +32,13 @@ static unsigned int __init get_core_count(void)
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{
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unsigned int ncores;
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ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);
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if (machine_is_realview_eb() && core_tile_eb11mp()) {
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ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);
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ncores = (ncores & 0x03) + 1;
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} else
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ncores = 1;
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return (ncores & 0x03) + 1;
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return ncores;
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}
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static DEFINE_SPINLOCK(boot_lock);
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@ -193,7 +198,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
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* dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
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* realview_timer_init
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*/
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local_timer_setup(cpu);
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if (machine_is_realview_eb() && core_tile_eb11mp())
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local_timer_setup(cpu);
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#endif
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/*
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@ -59,26 +59,7 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
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.pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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#ifdef CONFIG_REALVIEW_MPCORE
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{
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.virtual = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_GIC1_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_MPCORE_L220_BASE),
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.pfn = __phys_to_pfn(REALVIEW_MPCORE_L220_BASE),
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.length = SZ_8K,
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.type = MT_DEVICE,
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},
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#endif
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{
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.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
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.length = SZ_4K,
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@ -104,9 +85,30 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
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#endif
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};
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static struct map_desc realview_eb11mp_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
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.length = SZ_8K,
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.type = MT_DEVICE,
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}
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};
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static void __init realview_eb_map_io(void)
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{
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iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
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if (core_tile_eb11mp())
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iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
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}
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/*
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@ -243,24 +245,33 @@ static struct platform_device realview_eb_smc91x_device = {
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static void __init gic_init_irq(void)
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{
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#ifdef CONFIG_REALVIEW_MPCORE
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unsigned int pldctrl;
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writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
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pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
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pldctrl |= 0x00800000; /* New irq mode */
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writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
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writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
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#endif
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gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
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gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
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#if defined(CONFIG_REALVIEW_MPCORE) && !defined(CONFIG_REALVIEW_MPCORE_REVB)
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gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
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gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
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gic_cascade_irq(1, IRQ_EB_IRQ1);
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if (core_tile_eb11mp()) {
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unsigned int pldctrl;
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/* new irq mode */
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writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
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pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
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pldctrl |= 0x00800000;
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writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
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writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
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/* core tile GIC, primary */
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gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
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gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
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#ifndef CONFIG_REALVIEW_MPCORE_REVB
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/* board GIC, secondary */
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gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64);
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gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
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gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
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#endif
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} else {
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/* board GIC, primary */
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gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
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gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
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}
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}
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#ifdef CONFIG_REALVIEW_MPCORE
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/*
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* Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
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*/
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@ -290,19 +301,19 @@ static void realview_eb11mp_fixup(void)
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realview_eb_smc91x_resources[1].start = IRQ_EB11MP_ETH;
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realview_eb_smc91x_resources[1].end = IRQ_EB11MP_ETH;
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}
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#endif
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static void __init realview_eb_init(void)
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{
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int i;
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#ifdef CONFIG_REALVIEW_MPCORE
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realview_eb11mp_fixup();
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if (core_tile_eb11mp()) {
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realview_eb11mp_fixup();
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/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
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* Bits: .... ...0 0111 1001 0000 .... .... .... */
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l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
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}
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/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
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* Bits: .... ...0 0111 1001 0000 .... .... .... */
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l2x0_init(__io_address(REALVIEW_MPCORE_L220_BASE), 0x00790000, 0xfe000fff);
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#endif
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clk_register(&realview_clcd_clk);
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platform_device_register(&realview_flash_device);
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@ -149,4 +149,23 @@
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#define MAX_GIC_NR NR_GIC_EB11MP
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#endif
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/*
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* Core tile identification (REALVIEW_SYS_PROCID)
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*/
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#define REALVIEW_EB_PROC_MASK 0xFF000000
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#define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
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#define REALVIEW_EB_PROC_ARM9 0x02000000
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#define REALVIEW_EB_PROC_ARM11 0x04000000
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#define REALVIEW_EB_PROC_ARM11MP 0x06000000
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#define check_eb_proc(proc_type) \
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((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
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== proc_type)
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#ifdef CONFIG_REALVIEW_MPCORE
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#define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
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#else
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#define core_tile_eb11mp() 0
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#endif
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#endif /* __ASM_ARCH_BOARD_EB_H */
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