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Add support for Seeq 8003 on Challenge S Mezz board.
Thanks to Jö Fahlke for donating hardware. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Forward porting of Ladis' 2.4 patch. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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18604c5485
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1 changed files with 25 additions and 3 deletions
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@ -624,7 +624,7 @@ static inline void setup_rx_ring(struct sgiseeq_rx_desc *buf, int nbufs)
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#define ALIGNED(x) ((((unsigned long)(x)) + 0xf) & ~(0xf))
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#define ALIGNED(x) ((((unsigned long)(x)) + 0xf) & ~(0xf))
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static int sgiseeq_init(struct hpc3_regs* hpcregs, int irq)
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static int sgiseeq_init(struct hpc3_regs* hpcregs, int irq, int has_eeprom)
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{
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{
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struct sgiseeq_init_block *sr;
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struct sgiseeq_init_block *sr;
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struct sgiseeq_private *sp;
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struct sgiseeq_private *sp;
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@ -650,7 +650,9 @@ static int sgiseeq_init(struct hpc3_regs* hpcregs, int irq)
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#define EADDR_NVOFS 250
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#define EADDR_NVOFS 250
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for (i = 0; i < 3; i++) {
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for (i = 0; i < 3; i++) {
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unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i);
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unsigned short tmp = has_eeprom ?
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ip22_eeprom_read(&hpcregs->eeprom, EADDR_NVOFS / 2+i) :
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ip22_nvram_read(EADDR_NVOFS / 2+i);
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dev->dev_addr[2 * i] = tmp >> 8;
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dev->dev_addr[2 * i] = tmp >> 8;
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dev->dev_addr[2 * i + 1] = tmp & 0xff;
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dev->dev_addr[2 * i + 1] = tmp & 0xff;
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@ -678,6 +680,11 @@ static int sgiseeq_init(struct hpc3_regs* hpcregs, int irq)
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setup_rx_ring(sp->rx_desc, SEEQ_RX_BUFFERS);
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setup_rx_ring(sp->rx_desc, SEEQ_RX_BUFFERS);
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setup_tx_ring(sp->tx_desc, SEEQ_TX_BUFFERS);
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setup_tx_ring(sp->tx_desc, SEEQ_TX_BUFFERS);
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/* Setup PIO and DMA transfer timing */
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sp->hregs->pconfig = 0x161;
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sp->hregs->dconfig = HPC3_EDCFG_FIRQ | HPC3_EDCFG_FEOP |
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HPC3_EDCFG_FRXDC | HPC3_EDCFG_PTO | 0x026;
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/* Setup PIO and DMA transfer timing */
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/* Setup PIO and DMA transfer timing */
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sp->hregs->pconfig = 0x161;
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sp->hregs->pconfig = 0x161;
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sp->hregs->dconfig = HPC3_EDCFG_FIRQ | HPC3_EDCFG_FEOP |
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sp->hregs->dconfig = HPC3_EDCFG_FIRQ | HPC3_EDCFG_FEOP |
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@ -729,8 +736,23 @@ err_out:
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static int __init sgiseeq_probe(void)
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static int __init sgiseeq_probe(void)
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{
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{
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unsigned int tmp, ret1, ret2 = 0;
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/* On board adapter on 1st HPC is always present */
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/* On board adapter on 1st HPC is always present */
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return sgiseeq_init(hpc3c0, SGI_ENET_IRQ);
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ret1 = sgiseeq_init(hpc3c0, SGI_ENET_IRQ, 0);
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/* Let's see if second HPC is there */
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if (!(ip22_is_fullhouse()) &&
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get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1]) == 0) {
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sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 |
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SGIMC_GIOPAR_EXP164 |
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SGIMC_GIOPAR_HPC264;
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hpc3c1->pbus_piocfg[0][0] = 0x3ffff;
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/* interrupt/config register on Challenge S Mezz board */
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hpc3c1->pbus_extregs[0][0] = 0x30;
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ret2 = sgiseeq_init(hpc3c1, SGI_GIO_0_IRQ, 1);
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}
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return (ret1 & ret2) ? ret1 : 0;
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}
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}
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static void __exit sgiseeq_exit(void)
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static void __exit sgiseeq_exit(void)
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