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[PATCH] OMAP: Add Watchdog driver support
Add Texas Instruments (TI) OMAP1/2 (http://www.ti.com/omap) based processors, like OMAP1610/1710/242x. [akpm@osdl.org: cleanups] Cc: <gdavis@mvista.com> Cc: "Komal Shah" <komal_shah802003@yahoo.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Komal Shah
Linus Torvalds
parent
f1b7c5f459
commit
7768a13c25
4 changed files with 463 additions and 0 deletions
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@ -165,6 +165,13 @@ config EP93XX_WATCHDOG
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To compile this driver as a module, choose M here: the
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module will be called ep93xx_wdt.
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config OMAP_WATCHDOG
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tristate "OMAP Watchdog"
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depends on WATCHDOG && (ARCH_OMAP16XX || ARCH_OMAP24XX)
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help
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Support for TI OMAP1610/OMAP1710/OMAP2420 watchdog. Say 'Y' here to
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enable the OMAP1610/OMAP1710 watchdog timer.
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# X86 (i386 + ia64 + x86_64) Architecture
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config ACQUIRE_WDT
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@ -24,6 +24,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o
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# ARM Architecture
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obj-$(CONFIG_AT91_WATCHDOG) += at91_wdt.o
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obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
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obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
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obj-$(CONFIG_977_WATCHDOG) += wdt977.o
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obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o
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391
drivers/char/watchdog/omap_wdt.c
Normal file
391
drivers/char/watchdog/omap_wdt.c
Normal file
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@ -0,0 +1,391 @@
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/*
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* linux/drivers/char/watchdog/omap_wdt.c
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*
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* Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
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*
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* Author: MontaVista Software, Inc.
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* <gdavis@mvista.com> or <source@mvista.com>
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*
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* 2003 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* History:
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*
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* 20030527: George G. Davis <gdavis@mvista.com>
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* Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
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* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
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* Based on SoftDog driver by Alan Cox <alan@redhat.com>
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*
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* Copyright (c) 2004 Texas Instruments.
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* 1. Modified to support OMAP1610 32-KHz watchdog timer
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* 2. Ported to 2.6 kernel
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*
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* Copyright (c) 2005 David Brownell
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* Use the driver model and standard identifiers; handle bigger timeouts.
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*/
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#include <linux/module.h>
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/reboot.h>
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#include <linux/smp_lock.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/moduleparam.h>
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#include <linux/clk.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/hardware.h>
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#include <asm/bitops.h>
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#include <asm/arch/prcm.h>
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#include "omap_wdt.h"
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static unsigned timer_margin;
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module_param(timer_margin, uint, 0);
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MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
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static int omap_wdt_users;
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static struct clk *armwdt_ck = NULL;
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static struct clk *mpu_wdt_ick = NULL;
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static struct clk *mpu_wdt_fck = NULL;
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static unsigned int wdt_trgr_pattern = 0x1234;
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static void omap_wdt_ping(void)
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{
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/* wait for posted write to complete */
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while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
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cpu_relax();
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wdt_trgr_pattern = ~wdt_trgr_pattern;
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omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR));
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/* wait for posted write to complete */
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while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
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cpu_relax();
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/* reloaded WCRR from WLDR */
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}
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static void omap_wdt_enable(void)
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{
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/* Sequence to enable the watchdog */
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omap_writel(0xBBBB, OMAP_WATCHDOG_SPR);
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while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
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cpu_relax();
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omap_writel(0x4444, OMAP_WATCHDOG_SPR);
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while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
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cpu_relax();
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}
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static void omap_wdt_disable(void)
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{
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/* sequence required to disable watchdog */
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omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
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while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
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cpu_relax();
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omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
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while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
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cpu_relax();
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}
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static void omap_wdt_adjust_timeout(unsigned new_timeout)
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{
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if (new_timeout < TIMER_MARGIN_MIN)
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new_timeout = TIMER_MARGIN_DEFAULT;
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if (new_timeout > TIMER_MARGIN_MAX)
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new_timeout = TIMER_MARGIN_MAX;
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timer_margin = new_timeout;
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}
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static void omap_wdt_set_timeout(void)
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{
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u32 pre_margin = GET_WLDR_VAL(timer_margin);
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/* just count up at 32 KHz */
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while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
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cpu_relax();
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omap_writel(pre_margin, OMAP_WATCHDOG_LDR);
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while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
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cpu_relax();
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}
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/*
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* Allow only one task to hold it open
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*/
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static int omap_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users))
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return -EBUSY;
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if (cpu_is_omap16xx())
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clk_enable(armwdt_ck); /* Enable the clock */
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if (cpu_is_omap24xx()) {
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clk_enable(mpu_wdt_ick); /* Enable the interface clock */
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clk_enable(mpu_wdt_fck); /* Enable the functional clock */
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}
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/* initialize prescaler */
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while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
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cpu_relax();
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omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL);
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while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
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cpu_relax();
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omap_wdt_set_timeout();
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omap_wdt_enable();
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return 0;
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}
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static int omap_wdt_release(struct inode *inode, struct file *file)
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{
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/*
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* Shut off the timer unless NOWAYOUT is defined.
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*/
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#ifndef CONFIG_WATCHDOG_NOWAYOUT
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omap_wdt_disable();
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if (cpu_is_omap16xx()) {
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clk_disable(armwdt_ck); /* Disable the clock */
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clk_put(armwdt_ck);
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armwdt_ck = NULL;
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}
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if (cpu_is_omap24xx()) {
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clk_disable(mpu_wdt_ick); /* Disable the clock */
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clk_disable(mpu_wdt_fck); /* Disable the clock */
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clk_put(mpu_wdt_ick);
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clk_put(mpu_wdt_fck);
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mpu_wdt_ick = NULL;
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mpu_wdt_fck = NULL;
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}
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#else
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printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
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#endif
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omap_wdt_users = 0;
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return 0;
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}
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static ssize_t
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omap_wdt_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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/* Refresh LOAD_TIME. */
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if (len)
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omap_wdt_ping();
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return len;
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}
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static int
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omap_wdt_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int new_margin;
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static struct watchdog_info ident = {
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.identity = "OMAP Watchdog",
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.options = WDIOF_SETTIMEOUT,
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.firmware_version = 0,
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};
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switch (cmd) {
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default:
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return -ENOIOCTLCMD;
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case WDIOC_GETSUPPORT:
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return copy_to_user((struct watchdog_info __user *)arg, &ident,
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sizeof(ident));
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case WDIOC_GETSTATUS:
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return put_user(0, (int __user *)arg);
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case WDIOC_GETBOOTSTATUS:
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if (cpu_is_omap16xx())
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return put_user(omap_readw(ARM_SYSST),
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(int __user *)arg);
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if (cpu_is_omap24xx())
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return put_user(omap_prcm_get_reset_sources(),
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(int __user *)arg);
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case WDIOC_KEEPALIVE:
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omap_wdt_ping();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_margin, (int __user *)arg))
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return -EFAULT;
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omap_wdt_adjust_timeout(new_margin);
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omap_wdt_disable();
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omap_wdt_set_timeout();
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omap_wdt_enable();
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omap_wdt_ping();
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/* Fall */
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case WDIOC_GETTIMEOUT:
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return put_user(timer_margin, (int __user *)arg);
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}
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}
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static struct file_operations omap_wdt_fops = {
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.owner = THIS_MODULE,
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.write = omap_wdt_write,
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.ioctl = omap_wdt_ioctl,
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.open = omap_wdt_open,
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.release = omap_wdt_release,
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};
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static struct miscdevice omap_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &omap_wdt_fops
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};
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static int __init omap_wdt_probe(struct platform_device *pdev)
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{
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struct resource *res, *mem;
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int ret;
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/* reserve static register mappings */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENOENT;
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mem = request_mem_region(res->start, res->end - res->start + 1,
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pdev->name);
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if (mem == NULL)
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return -EBUSY;
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platform_set_drvdata(pdev, mem);
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omap_wdt_users = 0;
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if (cpu_is_omap16xx()) {
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armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
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if (IS_ERR(armwdt_ck)) {
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ret = PTR_ERR(armwdt_ck);
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armwdt_ck = NULL;
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goto fail;
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}
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}
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if (cpu_is_omap24xx()) {
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mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
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if (IS_ERR(mpu_wdt_ick)) {
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ret = PTR_ERR(mpu_wdt_ick);
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mpu_wdt_ick = NULL;
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goto fail;
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}
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mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
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if (IS_ERR(mpu_wdt_fck)) {
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ret = PTR_ERR(mpu_wdt_fck);
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mpu_wdt_fck = NULL;
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goto fail;
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}
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}
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omap_wdt_disable();
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omap_wdt_adjust_timeout(timer_margin);
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omap_wdt_miscdev.dev = &pdev->dev;
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ret = misc_register(&omap_wdt_miscdev);
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if (ret)
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goto fail;
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pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin);
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/* autogate OCP interface clock */
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omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG);
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return 0;
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fail:
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if (armwdt_ck)
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clk_put(armwdt_ck);
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if (mpu_wdt_ick)
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clk_put(mpu_wdt_ick);
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if (mpu_wdt_fck)
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clk_put(mpu_wdt_fck);
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release_resource(mem);
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return ret;
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}
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static void omap_wdt_shutdown(struct platform_device *pdev)
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{
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omap_wdt_disable();
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}
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static int omap_wdt_remove(struct platform_device *pdev)
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{
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struct resource *mem = platform_get_drvdata(pdev);
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misc_deregister(&omap_wdt_miscdev);
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release_resource(mem);
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if (armwdt_ck)
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clk_put(armwdt_ck);
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if (mpu_wdt_ick)
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clk_put(mpu_wdt_ick);
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if (mpu_wdt_fck)
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clk_put(mpu_wdt_fck);
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return 0;
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}
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#ifdef CONFIG_PM
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/* REVISIT ... not clear this is the best way to handle system suspend; and
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* it's very inappropriate for selective device suspend (e.g. suspending this
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* through sysfs rather than by stopping the watchdog daemon). Also, this
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* may not play well enough with NOWAYOUT...
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*/
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static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
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{
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if (omap_wdt_users)
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omap_wdt_disable();
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return 0;
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}
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static int omap_wdt_resume(struct platform_device *pdev)
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{
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if (omap_wdt_users) {
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omap_wdt_enable();
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omap_wdt_ping();
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}
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return 0;
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}
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#else
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#define omap_wdt_suspend NULL
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#define omap_wdt_resume NULL
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#endif
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static struct platform_driver omap_wdt_driver = {
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.probe = omap_wdt_probe,
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.remove = omap_wdt_remove,
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.shutdown = omap_wdt_shutdown,
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.suspend = omap_wdt_suspend,
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.resume = omap_wdt_resume,
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.driver = {
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.owner = THIS_MODULE,
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.name = "omap_wdt",
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},
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};
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static int __init omap_wdt_init(void)
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{
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return platform_driver_register(&omap_wdt_driver);
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}
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static void __exit omap_wdt_exit(void)
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{
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platform_driver_unregister(&omap_wdt_driver);
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}
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module_init(omap_wdt_init);
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module_exit(omap_wdt_exit);
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MODULE_AUTHOR("George G. Davis");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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64
drivers/char/watchdog/omap_wdt.h
Normal file
64
drivers/char/watchdog/omap_wdt.h
Normal file
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@ -0,0 +1,64 @@
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/*
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* linux/drivers/char/watchdog/omap_wdt.h
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*
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* BRIEF MODULE DESCRIPTION
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* OMAP Watchdog timer register definitions
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*
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* Copyright (C) 2004 Texas Instruments.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
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*
|
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* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef _OMAP_WATCHDOG_H
|
||||
#define _OMAP_WATCHDOG_H
|
||||
|
||||
#define OMAP1610_WATCHDOG_BASE 0xfffeb000
|
||||
#define OMAP2420_WATCHDOG_BASE 0x48022000 /*WDT Timer 2 */
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP24XX
|
||||
#define OMAP_WATCHDOG_BASE OMAP2420_WATCHDOG_BASE
|
||||
#else
|
||||
#define OMAP_WATCHDOG_BASE OMAP1610_WATCHDOG_BASE
|
||||
#define RM_RSTST_WKUP 0
|
||||
#endif
|
||||
|
||||
#define OMAP_WATCHDOG_REV (OMAP_WATCHDOG_BASE + 0x00)
|
||||
#define OMAP_WATCHDOG_SYS_CONFIG (OMAP_WATCHDOG_BASE + 0x10)
|
||||
#define OMAP_WATCHDOG_STATUS (OMAP_WATCHDOG_BASE + 0x14)
|
||||
#define OMAP_WATCHDOG_CNTRL (OMAP_WATCHDOG_BASE + 0x24)
|
||||
#define OMAP_WATCHDOG_CRR (OMAP_WATCHDOG_BASE + 0x28)
|
||||
#define OMAP_WATCHDOG_LDR (OMAP_WATCHDOG_BASE + 0x2c)
|
||||
#define OMAP_WATCHDOG_TGR (OMAP_WATCHDOG_BASE + 0x30)
|
||||
#define OMAP_WATCHDOG_WPS (OMAP_WATCHDOG_BASE + 0x34)
|
||||
#define OMAP_WATCHDOG_SPR (OMAP_WATCHDOG_BASE + 0x48)
|
||||
|
||||
/* Using the prescaler, the OMAP watchdog could go for many
|
||||
* months before firing. These limits work without scaling,
|
||||
* with the 60 second default assumed by most tools and docs.
|
||||
*/
|
||||
#define TIMER_MARGIN_MAX (24 * 60 * 60) /* 1 day */
|
||||
#define TIMER_MARGIN_DEFAULT 60 /* 60 secs */
|
||||
#define TIMER_MARGIN_MIN 1
|
||||
|
||||
#define PTV 0 /* prescale */
|
||||
#define GET_WLDR_VAL(secs) (0xffffffff - ((secs) * (32768/(1<<PTV))) + 1)
|
||||
|
||||
#endif /* _OMAP_WATCHDOG_H */
|
||||
Loading…
Reference in a new issue