mirror of
https://github.com/adulau/aha.git
synced 2024-12-27 19:26:25 +00:00
Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: sata_mv: remove pointless NULL test pata_hpt3x2n: fix clock turnaround libata: fix reporting of drained bytes when clearing DRQ sata_mv: add power management support for the PCI controllers. sata_mv: store the board_idx into the host private data pata_octeon_cf: use resource_size(), to fix resource sizing bug libata: use the WRITE_SAME_16 define sata_mv: move the PCI bar description initialization code sata_mv: add power management support for the platform driver sata_mv: support clkdev framework sata_mv: increase PIO IORDY timeout Fixed crazy mode-change in merge.
This commit is contained in:
Linus Torvalds
commit
70e66a5079
5 changed files with 163 additions and 51 deletions
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@ -3022,7 +3022,7 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd)
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case WRITE_16:
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return ata_scsi_rw_xlat;
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case 0x93 /*WRITE_SAME_16*/:
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case WRITE_SAME_16:
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return ata_scsi_write_same_xlat;
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case SYNCHRONIZE_CACHE:
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@ -2275,7 +2275,7 @@ void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
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ap = qc->ap;
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/* Drain up to 64K of data before we give up this recovery method */
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for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
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&& count < 32768; count++)
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&& count < 65536; count += 2)
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ioread16(ap->ioaddr.data_addr);
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/* Can become DEBUG later */
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@ -8,7 +8,7 @@
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* Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
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* Portions Copyright (C) 2001 Sun Microsystems, Inc.
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* Portions Copyright (C) 2003 Red Hat Inc
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* Portions Copyright (C) 2005-2007 MontaVista Software, Inc.
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* Portions Copyright (C) 2005-2009 MontaVista Software, Inc.
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*
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*
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* TODO
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@ -25,7 +25,7 @@
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#include <linux/libata.h>
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#define DRV_NAME "pata_hpt3x2n"
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#define DRV_VERSION "0.3.7"
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#define DRV_VERSION "0.3.8"
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enum {
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HPT_PCI_FAST = (1 << 31),
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@ -264,7 +264,7 @@ static void hpt3x2n_bmdma_stop(struct ata_queued_cmd *qc)
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static void hpt3x2n_set_clock(struct ata_port *ap, int source)
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{
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void __iomem *bmdma = ap->ioaddr.bmdma_addr;
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void __iomem *bmdma = ap->ioaddr.bmdma_addr - ap->port_no * 8;
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/* Tristate the bus */
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iowrite8(0x80, bmdma+0x73);
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@ -274,9 +274,9 @@ static void hpt3x2n_set_clock(struct ata_port *ap, int source)
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iowrite8(source, bmdma+0x7B);
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iowrite8(0xC0, bmdma+0x79);
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/* Reset state machines */
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iowrite8(0x37, bmdma+0x70);
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iowrite8(0x37, bmdma+0x74);
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/* Reset state machines, avoid enabling the disabled channels */
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iowrite8(ioread8(bmdma+0x70) | 0x32, bmdma+0x70);
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iowrite8(ioread8(bmdma+0x74) | 0x32, bmdma+0x74);
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/* Complete reset */
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iowrite8(0x00, bmdma+0x79);
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@ -286,21 +286,10 @@ static void hpt3x2n_set_clock(struct ata_port *ap, int source)
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iowrite8(0x00, bmdma+0x77);
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}
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/* Check if our partner interface is busy */
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static int hpt3x2n_pair_idle(struct ata_port *ap)
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{
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struct ata_host *host = ap->host;
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struct ata_port *pair = host->ports[ap->port_no ^ 1];
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if (pair->hsm_task_state == HSM_ST_IDLE)
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return 1;
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return 0;
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}
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static int hpt3x2n_use_dpll(struct ata_port *ap, int writing)
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{
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long flags = (long)ap->host->private_data;
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/* See if we should use the DPLL */
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if (writing)
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return USE_DPLL; /* Needed for write */
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@ -309,20 +298,35 @@ static int hpt3x2n_use_dpll(struct ata_port *ap, int writing)
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return 0;
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}
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static int hpt3x2n_qc_defer(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct ata_port *alt = ap->host->ports[ap->port_no ^ 1];
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int rc, flags = (long)ap->host->private_data;
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int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
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/* First apply the usual rules */
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rc = ata_std_qc_defer(qc);
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if (rc != 0)
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return rc;
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if ((flags & USE_DPLL) != dpll && alt->qc_active)
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return ATA_DEFER_PORT;
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return 0;
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}
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static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc)
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{
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struct ata_taskfile *tf = &qc->tf;
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struct ata_port *ap = qc->ap;
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int flags = (long)ap->host->private_data;
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int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
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if (hpt3x2n_pair_idle(ap)) {
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int dpll = hpt3x2n_use_dpll(ap, (tf->flags & ATA_TFLAG_WRITE));
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if ((flags & USE_DPLL) != dpll) {
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if (dpll == 1)
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hpt3x2n_set_clock(ap, 0x21);
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else
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hpt3x2n_set_clock(ap, 0x23);
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}
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flags &= ~USE_DPLL;
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flags |= dpll;
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ap->host->private_data = (void *)(long)flags;
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hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23);
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}
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return ata_sff_qc_issue(qc);
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}
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@ -339,6 +343,8 @@ static struct ata_port_operations hpt3x2n_port_ops = {
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.inherits = &ata_bmdma_port_ops,
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.bmdma_stop = hpt3x2n_bmdma_stop,
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.qc_defer = hpt3x2n_qc_defer,
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.qc_issue = hpt3x2n_qc_issue,
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.cable_detect = hpt3x2n_cable_detect,
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@ -454,7 +460,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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unsigned int f_low, f_high;
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int adjust;
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unsigned long iobase = pci_resource_start(dev, 4);
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void *hpriv = NULL;
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void *hpriv = (void *)USE_DPLL;
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int rc;
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rc = pcim_enable_device(dev);
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@ -539,7 +545,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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/* Set our private data up. We only need a few flags so we use
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it directly */
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if (pci_mhz > 60) {
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hpriv = (void *)PCI66;
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hpriv = (void *)(PCI66 | USE_DPLL);
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/*
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* On HPT371N, if ATA clock is 66 MHz we must set bit 2 in
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* the MISC. register to stretch the UltraDMA Tss timing.
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@ -853,7 +853,7 @@ static int __devinit octeon_cf_probe(struct platform_device *pdev)
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return -EINVAL;
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cs1 = devm_ioremap_nocache(&pdev->dev, res_cs1->start,
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res_cs0->end - res_cs1->start + 1);
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resource_size(res_cs1));
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if (!cs1)
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return -ENOMEM;
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@ -59,6 +59,7 @@
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#include <linux/dmapool.h>
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#include <linux/dma-mapping.h>
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#include <linux/device.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/ata_platform.h>
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#include <linux/mbus.h>
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@ -538,6 +539,7 @@ struct mv_port_signal {
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struct mv_host_priv {
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u32 hp_flags;
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unsigned int board_idx;
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u32 main_irq_mask;
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struct mv_port_signal signal[8];
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const struct mv_hw_ops *ops;
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@ -548,6 +550,10 @@ struct mv_host_priv {
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u32 irq_cause_offset;
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u32 irq_mask_offset;
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u32 unmask_all_irqs;
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#if defined(CONFIG_HAVE_CLK)
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struct clk *clk;
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#endif
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/*
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* These consistent DMA memory pools give us guaranteed
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* alignment for hardware-accessed data structures,
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@ -2775,7 +2781,7 @@ static void mv_port_intr(struct ata_port *ap, u32 port_cause)
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struct mv_port_priv *pp;
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int edma_was_enabled;
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if (!ap || (ap->flags & ATA_FLAG_DISABLED)) {
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if (ap->flags & ATA_FLAG_DISABLED) {
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mv_unexpected_intr(ap, 0);
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return;
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}
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@ -3393,7 +3399,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
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ZERO(0x024); /* respq outp */
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ZERO(0x020); /* respq inp */
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ZERO(0x02c); /* test control */
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writel(0xbc, port_mmio + EDMA_IORDY_TMOUT);
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writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
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}
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#undef ZERO
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@ -3854,7 +3860,6 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
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/**
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* mv_init_host - Perform some early initialization of the host.
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* @host: ATA host to initialize
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* @board_idx: controller index
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*
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* If possible, do an early global reset of the host. Then do
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* our port init and clear/unmask all/relevant host interrupts.
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@ -3862,13 +3867,13 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
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* LOCKING:
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* Inherited from caller.
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*/
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static int mv_init_host(struct ata_host *host, unsigned int board_idx)
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static int mv_init_host(struct ata_host *host)
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{
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int rc = 0, n_hc, port, hc;
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struct mv_host_priv *hpriv = host->private_data;
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void __iomem *mmio = hpriv->base;
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rc = mv_chip_id(host, board_idx);
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rc = mv_chip_id(host, hpriv->board_idx);
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if (rc)
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goto done;
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@ -3905,14 +3910,6 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
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void __iomem *port_mmio = mv_port_base(mmio, port);
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mv_port_init(&ap->ioaddr, port_mmio);
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#ifdef CONFIG_PCI
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if (!IS_SOC(hpriv)) {
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unsigned int offset = port_mmio - mmio;
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ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
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ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
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}
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#endif
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}
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for (hc = 0; hc < n_hc; hc++) {
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@ -4035,12 +4032,21 @@ static int mv_platform_probe(struct platform_device *pdev)
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return -ENOMEM;
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host->private_data = hpriv;
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hpriv->n_ports = n_ports;
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hpriv->board_idx = chip_soc;
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host->iomap = NULL;
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hpriv->base = devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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hpriv->base -= SATAHC0_REG_BASE;
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|
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#if defined(CONFIG_HAVE_CLK)
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hpriv->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(hpriv->clk))
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dev_notice(&pdev->dev, "cannot get clkdev\n");
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else
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clk_enable(hpriv->clk);
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#endif
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|
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/*
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* (Re-)program MBUS remapping windows if we are asked to.
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*/
|
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@ -4049,12 +4055,12 @@ static int mv_platform_probe(struct platform_device *pdev)
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|
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rc = mv_create_dma_pools(hpriv, &pdev->dev);
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if (rc)
|
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return rc;
|
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goto err;
|
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|
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/* initialize adapter */
|
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rc = mv_init_host(host, chip_soc);
|
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rc = mv_init_host(host);
|
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if (rc)
|
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return rc;
|
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goto err;
|
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|
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dev_printk(KERN_INFO, &pdev->dev,
|
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"slots %u ports %d\n", (unsigned)MV_MAX_Q_DEPTH,
|
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|
|
@ -4062,6 +4068,15 @@ static int mv_platform_probe(struct platform_device *pdev)
|
|||
|
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return ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt,
|
||||
IRQF_SHARED, &mv6_sht);
|
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err:
|
||||
#if defined(CONFIG_HAVE_CLK)
|
||||
if (!IS_ERR(hpriv->clk)) {
|
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clk_disable(hpriv->clk);
|
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clk_put(hpriv->clk);
|
||||
}
|
||||
#endif
|
||||
|
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return rc;
|
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}
|
||||
|
||||
/*
|
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|
|
@ -4076,14 +4091,66 @@ static int __devexit mv_platform_remove(struct platform_device *pdev)
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|||
{
|
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struct device *dev = &pdev->dev;
|
||||
struct ata_host *host = dev_get_drvdata(dev);
|
||||
|
||||
#if defined(CONFIG_HAVE_CLK)
|
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struct mv_host_priv *hpriv = host->private_data;
|
||||
#endif
|
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ata_host_detach(host);
|
||||
|
||||
#if defined(CONFIG_HAVE_CLK)
|
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if (!IS_ERR(hpriv->clk)) {
|
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clk_disable(hpriv->clk);
|
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clk_put(hpriv->clk);
|
||||
}
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
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static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state)
|
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{
|
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
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if (host)
|
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return ata_host_suspend(host, state);
|
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else
|
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return 0;
|
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}
|
||||
|
||||
static int mv_platform_resume(struct platform_device *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
int ret;
|
||||
|
||||
if (host) {
|
||||
struct mv_host_priv *hpriv = host->private_data;
|
||||
const struct mv_sata_platform_data *mv_platform_data = \
|
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pdev->dev.platform_data;
|
||||
/*
|
||||
* (Re-)program MBUS remapping windows if we are asked to.
|
||||
*/
|
||||
if (mv_platform_data->dram != NULL)
|
||||
mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
|
||||
|
||||
/* initialize adapter */
|
||||
ret = mv_init_host(host);
|
||||
if (ret) {
|
||||
printk(KERN_ERR DRV_NAME ": Error during HW init\n");
|
||||
return ret;
|
||||
}
|
||||
ata_host_resume(host);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define mv_platform_suspend NULL
|
||||
#define mv_platform_resume NULL
|
||||
#endif
|
||||
|
||||
static struct platform_driver mv_platform_driver = {
|
||||
.probe = mv_platform_probe,
|
||||
.remove = __devexit_p(mv_platform_remove),
|
||||
.suspend = mv_platform_suspend,
|
||||
.resume = mv_platform_resume,
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
|
|
@ -4094,6 +4161,9 @@ static struct platform_driver mv_platform_driver = {
|
|||
#ifdef CONFIG_PCI
|
||||
static int mv_pci_init_one(struct pci_dev *pdev,
|
||||
const struct pci_device_id *ent);
|
||||
#ifdef CONFIG_PM
|
||||
static int mv_pci_device_resume(struct pci_dev *pdev);
|
||||
#endif
|
||||
|
||||
|
||||
static struct pci_driver mv_pci_driver = {
|
||||
|
|
@ -4101,6 +4171,11 @@ static struct pci_driver mv_pci_driver = {
|
|||
.id_table = mv_pci_tbl,
|
||||
.probe = mv_pci_init_one,
|
||||
.remove = ata_pci_remove_one,
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = ata_pci_device_suspend,
|
||||
.resume = mv_pci_device_resume,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
/* move to PCI layer or libata core? */
|
||||
|
|
@ -4194,7 +4269,7 @@ static int mv_pci_init_one(struct pci_dev *pdev,
|
|||
const struct ata_port_info *ppi[] = { &mv_port_info[board_idx], NULL };
|
||||
struct ata_host *host;
|
||||
struct mv_host_priv *hpriv;
|
||||
int n_ports, rc;
|
||||
int n_ports, port, rc;
|
||||
|
||||
if (!printed_version++)
|
||||
dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
|
||||
|
|
@ -4208,6 +4283,7 @@ static int mv_pci_init_one(struct pci_dev *pdev,
|
|||
return -ENOMEM;
|
||||
host->private_data = hpriv;
|
||||
hpriv->n_ports = n_ports;
|
||||
hpriv->board_idx = board_idx;
|
||||
|
||||
/* acquire resources */
|
||||
rc = pcim_enable_device(pdev);
|
||||
|
|
@ -4230,8 +4306,17 @@ static int mv_pci_init_one(struct pci_dev *pdev,
|
|||
if (rc)
|
||||
return rc;
|
||||
|
||||
for (port = 0; port < host->n_ports; port++) {
|
||||
struct ata_port *ap = host->ports[port];
|
||||
void __iomem *port_mmio = mv_port_base(hpriv->base, port);
|
||||
unsigned int offset = port_mmio - hpriv->base;
|
||||
|
||||
ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
|
||||
ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
|
||||
}
|
||||
|
||||
/* initialize adapter */
|
||||
rc = mv_init_host(host, board_idx);
|
||||
rc = mv_init_host(host);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
|
|
@ -4247,6 +4332,27 @@ static int mv_pci_init_one(struct pci_dev *pdev,
|
|||
return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED,
|
||||
IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int mv_pci_device_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* initialize adapter */
|
||||
rc = mv_init_host(host);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
ata_host_resume(host);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static int mv_platform_probe(struct platform_device *pdev);
|
||||
|
|
|
|||
Loading…
Reference in a new issue