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b43/ssb: Add SPROM8 extraction and LP-PHY detection
This adds detection code for the LP-PHY and SPROM extraction code for version 8, which is needed by the LP-PHY and newer N-PHY. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
bb519bee07
commit
6b1c7c6760
4 changed files with 111 additions and 12 deletions
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@ -97,6 +97,7 @@ static const struct ssb_device_id b43_ssb_tbl[] = {
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SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10),
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SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 11),
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SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 13),
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SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 15),
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SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 16),
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SSB_DEVTABLE_END
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};
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@ -3755,6 +3756,12 @@ static int b43_phy_versioning(struct b43_wldev *dev)
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if (phy_rev > 4)
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unsupported = 1;
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break;
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#endif
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#ifdef CONFIG_B43_PHY_LP
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case B43_PHYTYPE_LP:
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if (phy_rev > 1)
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unsupported = 1;
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break;
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#endif
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default:
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unsupported = 1;
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@ -3808,6 +3815,10 @@ static int b43_phy_versioning(struct b43_wldev *dev)
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if (radio_ver != 0x2055 && radio_ver != 0x2056)
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unsupported = 1;
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break;
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case B43_PHYTYPE_LP:
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if (radio_ver != 0x2062)
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unsupported = 1;
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break;
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default:
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B43_WARN_ON(1);
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}
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@ -4402,6 +4413,7 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
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break;
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case B43_PHYTYPE_G:
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case B43_PHYTYPE_N:
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case B43_PHYTYPE_LP:
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have_2ghz_phy = 1;
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break;
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default:
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@ -21,6 +21,7 @@ static const struct pci_device_id b43_pci_bridge_tbl[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4307) },
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4311) },
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4312) },
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4315) },
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4318) },
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
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{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
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@ -467,6 +467,51 @@ static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
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/* TODO - get remaining rev 4 stuff needed */
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}
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static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
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{
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int i;
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u16 v;
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/* extract the MAC address */
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for (i = 0; i < 3; i++) {
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v = in[SPOFF(SSB_SPROM1_IL0MAC) + i];
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*(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
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}
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SPEX(country_code, SSB_SPROM8_CCODE, 0xFFFF, 0);
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SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
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SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
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SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
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SSB_SPROM8_ANTAVAIL_A_SHIFT);
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SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
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SSB_SPROM8_ANTAVAIL_BG_SHIFT);
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SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
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SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
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SSB_SPROM8_ITSSI_BG_SHIFT);
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SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
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SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
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SSB_SPROM8_ITSSI_A_SHIFT);
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SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
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SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
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SSB_SPROM8_GPIOA_P1_SHIFT);
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SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
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SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
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SSB_SPROM8_GPIOB_P3_SHIFT);
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/* Extract the antenna gain values. */
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SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01,
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SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
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SPEX(antenna_gain.ghz24.a1, SSB_SPROM8_AGAIN01,
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SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
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SPEX(antenna_gain.ghz24.a2, SSB_SPROM8_AGAIN23,
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SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
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SPEX(antenna_gain.ghz24.a3, SSB_SPROM8_AGAIN23,
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SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
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memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
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sizeof(out->antenna_gain.ghz5));
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/* TODO - get remaining rev 8 stuff needed */
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}
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static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
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const u16 *in, u16 size)
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{
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@ -487,15 +532,25 @@ static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
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out->revision = 4;
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sprom_extract_r45(out, in);
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} else {
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if (out->revision == 0)
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goto unsupported;
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if (out->revision >= 1 && out->revision <= 3) {
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switch (out->revision) {
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case 1:
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case 2:
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case 3:
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sprom_extract_r123(out, in);
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break;
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case 4:
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case 5:
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sprom_extract_r45(out, in);
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break;
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case 8:
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sprom_extract_r8(out, in);
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break;
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default:
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ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
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" revision %d detected. Will extract"
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" v1\n", out->revision);
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sprom_extract_r123(out, in);
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}
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if (out->revision == 4 || out->revision == 5)
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sprom_extract_r45(out, in);
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if (out->revision > 5)
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goto unsupported;
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}
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if (out->boardflags_lo == 0xFFFF)
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@ -504,11 +559,6 @@ static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
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out->boardflags_hi = 0; /* per specs */
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return 0;
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unsupported:
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ssb_printk(KERN_WARNING PFX "Unsupported SPROM revision %d "
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"detected. Will extract v1\n", out->revision);
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sprom_extract_r123(out, in);
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return 0;
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}
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static int ssb_pci_sprom_get(struct ssb_bus *bus,
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@ -326,6 +326,42 @@
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#define SSB_SPROM5_GPIOB_P3 0xFF00 /* Pin 3 */
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#define SSB_SPROM5_GPIOB_P3_SHIFT 8
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/* SPROM Revision 8 */
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#define SSB_SPROM8_BFLLO 0x1084 /* Boardflags (low 16 bits) */
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#define SSB_SPROM8_BFLHI 0x1086 /* Boardflags Hi */
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#define SSB_SPROM8_IL0MAC 0x108C /* 6 byte MAC address */
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#define SSB_SPROM8_CCODE 0x1092 /* 2 byte country code */
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#define SSB_SPROM8_ANTAVAIL 0x109C /* Antenna available bitfields*/
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#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
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#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
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#define SSB_SPROM8_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */
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#define SSB_SPROM8_ANTAVAIL_BG_SHIFT 0
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#define SSB_SPROM8_AGAIN01 0x109E /* Antenna Gain (in dBm Q5.2) */
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#define SSB_SPROM8_AGAIN0 0x00FF /* Antenna 0 */
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#define SSB_SPROM8_AGAIN0_SHIFT 0
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#define SSB_SPROM8_AGAIN1 0xFF00 /* Antenna 1 */
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#define SSB_SPROM8_AGAIN1_SHIFT 8
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#define SSB_SPROM8_AGAIN23 0x10A0
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#define SSB_SPROM8_AGAIN2 0x00FF /* Antenna 2 */
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#define SSB_SPROM8_AGAIN2_SHIFT 0
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#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
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#define SSB_SPROM8_AGAIN3_SHIFT 8
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#define SSB_SPROM8_GPIOA 0x1096 /*Gen. Purpose IO # 0 and 1 */
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#define SSB_SPROM8_GPIOA_P0 0x00FF /* Pin 0 */
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#define SSB_SPROM8_GPIOA_P1 0xFF00 /* Pin 1 */
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#define SSB_SPROM8_GPIOA_P1_SHIFT 8
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#define SSB_SPROM8_GPIOB 0x1098 /* Gen. Purpose IO # 2 and 3 */
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#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
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#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
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#define SSB_SPROM8_GPIOB_P3_SHIFT 8
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#define SSB_SPROM8_MAXP_BG 0x10C0 /* Max Power BG in path 1 */
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#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
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#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
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#define SSB_SPROM8_ITSSI_BG_SHIFT 8
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#define SSB_SPROM8_MAXP_A 0x10C8 /* Max Power A in path 1 */
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#define SSB_SPROM8_MAXP_A_MASK 0x00FF /* Mask for Max Power A */
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#define SSB_SPROM8_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */
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#define SSB_SPROM8_ITSSI_A_SHIFT 8
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/* Values for SSB_SPROM1_BINF_CCODE */
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enum {
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