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MIPS: Modularize COP2 handling
Away with the daemons of ifdef; get ready for future COP2 users. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/708/
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parent
4dd92e15b3
commit
69f3a7de1f
6 changed files with 140 additions and 23 deletions
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@ -9,7 +9,7 @@
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# Copyright (C) 2005-2009 Cavium Networks
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#
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obj-y := setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o
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obj-y := cpu.o setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o
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obj-y += dma-octeon.o flash_setup.o
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obj-y += octeon-memcpy.o
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52
arch/mips/cavium-octeon/cpu.c
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52
arch/mips/cavium-octeon/cpu.c
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@ -0,0 +1,52 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2009 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/init.h>
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#include <linux/irqflags.h>
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#include <linux/notifier.h>
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#include <linux/prefetch.h>
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#include <linux/sched.h>
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#include <asm/cop2.h>
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#include <asm/current.h>
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#include <asm/mipsregs.h>
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#include <asm/page.h>
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#include <asm/octeon/octeon.h>
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static int cnmips_cu2_call(struct notifier_block *nfb, unsigned long action,
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void *data)
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{
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unsigned long flags;
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unsigned int status;
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switch (action) {
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case CU2_EXCEPTION:
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prefetch(¤t->thread.cp2);
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local_irq_save(flags);
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KSTK_STATUS(current) |= ST0_CU2;
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status = read_c0_status();
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write_c0_status(status | ST0_CU2);
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octeon_cop2_restore(&(current->thread.cp2));
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write_c0_status(status & ~ST0_CU2);
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local_irq_restore(flags);
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return NOTIFY_BAD; /* Don't call default notifier */
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}
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return NOTIFY_OK; /* Let default notifier send signals */
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}
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static struct notifier_block cnmips_cu2_notifier = {
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.notifier_call = cnmips_cu2_call,
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};
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static int cnmips_cu2_setup(void)
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{
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return register_cu2_notifier(&cnmips_cu2_notifier);
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}
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early_initcall(cnmips_cu2_setup);
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23
arch/mips/include/asm/cop2.h
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23
arch/mips/include/asm/cop2.h
Normal file
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@ -0,0 +1,23 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2009 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#ifndef __ASM_COP2_H
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#define __ASM_COP2_H
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enum cu2_ops {
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CU2_EXCEPTION,
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CU2_LWC2_OP,
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CU2_LDC2_OP,
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CU2_SWC2_OP,
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CU2_SDC2_OP,
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};
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extern int register_cu2_notifier(struct notifier_block *nb);
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extern int cu2_notifier_call_chain(unsigned long val, void *v);
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#endif /* __ASM_COP2_H */
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@ -47,6 +47,7 @@ struct octeon_cop2_state;
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extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *state);
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extern void octeon_crypto_disable(struct octeon_cop2_state *state,
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unsigned long flags);
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extern asmlinkage void octeon_cop2_restore(struct octeon_cop2_state *task);
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extern void octeon_init_cvmcount(void);
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@ -25,10 +25,12 @@
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#include <linux/ptrace.h>
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#include <linux/kgdb.h>
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#include <linux/kdebug.h>
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#include <linux/notifier.h>
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#include <asm/bootinfo.h>
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#include <asm/branch.h>
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#include <asm/break.h>
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#include <asm/cop2.h>
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#include <asm/cpu.h>
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#include <asm/dsp.h>
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#include <asm/fpu.h>
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@ -79,10 +81,6 @@ extern asmlinkage void handle_reserved(void);
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extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
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struct mips_fpu_struct *ctx, int has_fpu);
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#ifdef CONFIG_CPU_CAVIUM_OCTEON
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extern asmlinkage void octeon_cop2_restore(struct octeon_cop2_state *task);
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#endif
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void (*board_be_init)(void);
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int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
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void (*board_nmi_handler_setup)(void);
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@ -857,6 +855,44 @@ static void mt_ase_fp_affinity(void)
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#endif /* CONFIG_MIPS_MT_FPAFF */
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}
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/*
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* No lock; only written during early bootup by CPU 0.
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*/
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static RAW_NOTIFIER_HEAD(cu2_chain);
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int __ref register_cu2_notifier(struct notifier_block *nb)
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{
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return raw_notifier_chain_register(&cu2_chain, nb);
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}
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int cu2_notifier_call_chain(unsigned long val, void *v)
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{
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return raw_notifier_call_chain(&cu2_chain, val, v);
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}
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static int default_cu2_call(struct notifier_block *nfb, unsigned long action,
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void *data)
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{
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struct pt_regs *regs = data;
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switch (action) {
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default:
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die_if_kernel("Unhandled kernel unaligned access or invalid "
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"instruction", regs);
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/* Fall through */
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case CU2_EXCEPTION:
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force_sig(SIGILL, current);
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}
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return NOTIFY_OK;
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}
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static struct notifier_block default_cu2_notifier = {
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.notifier_call = default_cu2_call,
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.priority = 0x80000000, /* Run last */
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};
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asmlinkage void do_cpu(struct pt_regs *regs)
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{
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unsigned int __user *epc;
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return;
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case 2:
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#ifdef CONFIG_CPU_CAVIUM_OCTEON
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prefetch(¤t->thread.cp2);
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local_irq_save(flags);
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KSTK_STATUS(current) |= ST0_CU2;
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status = read_c0_status();
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write_c0_status(status | ST0_CU2);
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octeon_cop2_restore(&(current->thread.cp2));
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write_c0_status(status & ~ST0_CU2);
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local_irq_restore(flags);
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return;
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#endif
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raw_notifier_call_chain(&cu2_chain, CU2_EXCEPTION, regs);
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break;
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case 3:
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break;
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}
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flush_tlb_handlers();
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sort_extable(__start___dbe_table, __stop___dbe_table);
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register_cu2_notifier(&default_cu2_notifier);
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}
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#include <asm/asm.h>
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#include <asm/branch.h>
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#include <asm/byteorder.h>
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#include <asm/cop2.h>
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#include <asm/inst.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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*/
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goto sigbus;
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/*
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* COP2 is available to implementor for application specific use.
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* It's up to applications to register a notifier chain and do
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* whatever they have to do, including possible sending of signals.
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*/
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case lwc2_op:
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cu2_notifier_call_chain(CU2_LWC2_OP, regs);
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break;
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case ldc2_op:
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cu2_notifier_call_chain(CU2_LDC2_OP, regs);
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break;
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case swc2_op:
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cu2_notifier_call_chain(CU2_SWC2_OP, regs);
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break;
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case sdc2_op:
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/*
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* These are the coprocessor 2 load/stores. The current
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* implementations don't use cp2 and cp2 should always be
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* disabled in c0_status. So send SIGILL.
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* (No longer true: The Sony Praystation uses cp2 for
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* 3D matrix operations. Dunno if that thingy has a MMU ...)
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*/
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cu2_notifier_call_chain(CU2_SDC2_OP, regs);
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break;
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default:
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/*
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* Pheeee... We encountered an yet unknown instruction or
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