mirror of
https://github.com/adulau/aha.git
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC]: Fix link errors with gcc-4.3
sparc64: replace remaining __FUNCTION__ occurances
sparc: replace remaining __FUNCTION__ occurances
[SPARC]: Add reboot_command[] extern decl to asm/system.h
[SPARC]: Mark linux_sparc_{fpu,chips} static.
This commit is contained in:
Linus Torvalds
commit
665c1ef836
12 changed files with 215 additions and 219 deletions
|
|
@ -1,4 +1,4 @@
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# $Id: Makefile,v 1.62 2000/12/15 00:41:17 davem Exp $
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#
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# Makefile for the linux kernel.
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#
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@ -12,7 +12,8 @@ obj-y := entry.o wof.o wuf.o etrap.o rtrap.o traps.o $(IRQ_OBJS) \
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sys_sparc.o sunos_asm.o systbls.o \
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time.o windows.o cpu.o devices.o sclow.o \
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tadpole.o tick14.o ptrace.o sys_solaris.o \
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unaligned.o muldiv.o semaphore.o prom.o of_device.o devres.o
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unaligned.o una_asm.o muldiv.o semaphore.o \
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prom.o of_device.o devres.o
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devres-y = ../../../kernel/irq/devres.o
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|
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@ -32,7 +32,7 @@ struct cpu_fp_info {
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/* In order to get the fpu type correct, you need to take the IDPROM's
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* machine type value into consideration too. I will fix this.
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*/
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struct cpu_fp_info linux_sparc_fpu[] = {
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static struct cpu_fp_info linux_sparc_fpu[] = {
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{ 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"},
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{ 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"},
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{ 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"},
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@ -76,7 +76,7 @@ struct cpu_fp_info linux_sparc_fpu[] = {
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#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
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struct cpu_iu_info linux_sparc_chips[] = {
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static struct cpu_iu_info linux_sparc_chips[] = {
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/* Sun4/100, 4/200, SLC */
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{ 0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"},
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/* borned STP1012PGA */
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@ -101,7 +101,7 @@ void __init fill_ebus_child(struct device_node *dp,
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prom_printf("UGH: property for %s was %d, need < %d\n",
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dev->prom_node->name, len,
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dev->parent->num_addrs);
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panic(__FUNCTION__);
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panic(__func__);
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}
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/* XXX resource */
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@ -162,7 +162,7 @@ void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *d
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prom_printf("UGH: proplen for %s was %d, need multiple of %d\n",
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dev->prom_node->name, len,
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(int)sizeof(struct linux_prom_registers));
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panic(__FUNCTION__);
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panic(__func__);
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}
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dev->num_addrs = len / sizeof(struct linux_prom_registers);
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@ -324,7 +324,7 @@ void __init ebus_init(void)
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regs = of_get_property(dp, "reg", &len);
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if (!regs) {
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prom_printf("%s: can't find reg property\n",
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__FUNCTION__);
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__func__);
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prom_halt();
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}
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nreg = len / sizeof(struct linux_prom_pci_registers);
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|
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@ -139,8 +139,6 @@ void cpu_idle(void)
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#endif
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extern char reboot_command [];
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/* XXX cli/sti -> local_irq_xxx here, check this works once SMP is fixed. */
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void machine_halt(void)
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{
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|
|
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153
arch/sparc/kernel/una_asm.S
Normal file
153
arch/sparc/kernel/una_asm.S
Normal file
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@ -0,0 +1,153 @@
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/* una_asm.S: Kernel unaligned trap assembler helpers.
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*
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* Copyright (C) 1996,2005,2008 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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#include <linux/errno.h>
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.text
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retl_efault:
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retl
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mov -EFAULT, %o0
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/* int __do_int_store(unsigned long *dst_addr, int size,
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* unsigned long *src_val)
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*
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* %o0 = dest_addr
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* %o1 = size
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* %o2 = src_val
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*
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* Return '0' on success, -EFAULT on failure.
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*/
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.globl __do_int_store
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__do_int_store:
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ld [%o2], %g1
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cmp %1, 2
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be 2f
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cmp %1, 4
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be 1f
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srl %g1, 24, %g2
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srl %g1, 16, %g7
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4: stb %g2, [%o0]
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srl %g1, 8, %g2
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5: stb %g7, [%o0 + 1]
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ld [%o2 + 4], %g7
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6: stb %g2, [%o0 + 2]
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srl %g7, 24, %g2
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7: stb %g1, [%o0 + 3]
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srl %g7, 16, %g1
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8: stb %g2, [%o0 + 4]
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srl %g7, 8, %g2
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9: stb %g1, [%o0 + 5]
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10: stb %g2, [%o0 + 6]
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b 0f
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11: stb %g7, [%o0 + 7]
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1: srl %g1, 16, %g7
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12: stb %g2, [%o0]
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srl %g1, 8, %g2
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13: stb %g7, [%o0 + 1]
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14: stb %g2, [%o0 + 2]
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b 0f
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15: stb %g1, [%o0 + 3]
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2: srl %g1, 8, %g2
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16: stb %g2, [%o0]
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17: stb %g1, [%o0 + 1]
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0: retl
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mov 0, %o0
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.section __ex_table,#alloc
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.word 4b, retl_efault
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.word 5b, retl_efault
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.word 6b, retl_efault
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.word 7b, retl_efault
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.word 8b, retl_efault
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.word 9b, retl_efault
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.word 10b, retl_efault
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.word 11b, retl_efault
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.word 12b, retl_efault
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.word 13b, retl_efault
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.word 14b, retl_efault
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.word 15b, retl_efault
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.word 16b, retl_efault
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.word 17b, retl_efault
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.previous
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/* int do_int_load(unsigned long *dest_reg, int size,
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* unsigned long *saddr, int is_signed)
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*
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* %o0 = dest_reg
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* %o1 = size
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* %o2 = saddr
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* %o3 = is_signed
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*
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* Return '0' on success, -EFAULT on failure.
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*/
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.globl do_int_load
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do_int_load:
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cmp %o1, 8
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be 9f
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cmp %o1, 4
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be 6f
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4: ldub [%o2], %g1
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5: ldub [%o2 + 1], %g2
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sll %g1, 8, %g1
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tst %o3
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be 3f
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or %g1, %g2, %g1
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sll %g1, 16, %g1
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sra %g1, 16, %g1
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3: b 0f
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st %g1, [%o0]
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6: ldub [%o2 + 1], %g2
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sll %g1, 24, %g1
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7: ldub [%o2 + 2], %g7
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sll %g2, 16, %g2
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8: ldub [%o2 + 3], %g3
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sll %g7, 8, %g7
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or %g3, %g2, %g3
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or %g7, %g3, %g7
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or %g1, %g7, %g1
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b 0f
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st %g1, [%o0]
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9: ldub [%o2], %g1
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10: ldub [%o2 + 1], %g2
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sll %g1, 24, %g1
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11: ldub [%o2 + 2], %g7
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sll %g2, 16, %g2
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12: ldub [%o2 + 3], %g3
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sll %g7, 8, %g7
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or %g1, %g2, %g1
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or %g7, %g3, %g7
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or %g1, %g7, %g7
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13: ldub [%o2 + 4], %g1
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st %g7, [%o0]
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14: ldub [%o2 + 5], %g2
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sll %g1, 24, %g1
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15: ldub [%o2 + 6], %g7
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sll %g2, 16, %g2
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16: ldub [%o2 + 7], %g3
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sll %g7, 8, %g7
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or %g1, %g2, %g1
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or %g7, %g3, %g7
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or %g1, %g7, %g7
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st %g7, [%o0 + 4]
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0: retl
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mov 0, %o0
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.section __ex_table,#alloc
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.word 4b, retl_efault
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.word 5b, retl_efault
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.word 6b, retl_efault
|
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.word 7b, retl_efault
|
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.word 8b, retl_efault
|
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.word 9b, retl_efault
|
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.word 10b, retl_efault
|
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.word 11b, retl_efault
|
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.word 12b, retl_efault
|
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.word 13b, retl_efault
|
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.word 14b, retl_efault
|
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.word 15b, retl_efault
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.word 16b, retl_efault
|
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.previous
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|
|
@ -175,157 +175,31 @@ static void unaligned_panic(char *str)
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panic(str);
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}
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|
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#define do_integer_load(dest_reg, size, saddr, is_signed, errh) ({ \
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__asm__ __volatile__ ( \
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"cmp %1, 8\n\t" \
|
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"be 9f\n\t" \
|
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" cmp %1, 4\n\t" \
|
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"be 6f\n" \
|
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"4:\t" " ldub [%2], %%l1\n" \
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"5:\t" "ldub [%2 + 1], %%l2\n\t" \
|
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"sll %%l1, 8, %%l1\n\t" \
|
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"tst %3\n\t" \
|
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"be 3f\n\t" \
|
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" add %%l1, %%l2, %%l1\n\t" \
|
||||
"sll %%l1, 16, %%l1\n\t" \
|
||||
"sra %%l1, 16, %%l1\n" \
|
||||
"3:\t" "b 0f\n\t" \
|
||||
" st %%l1, [%0]\n" \
|
||||
"6:\t" "ldub [%2 + 1], %%l2\n\t" \
|
||||
"sll %%l1, 24, %%l1\n" \
|
||||
"7:\t" "ldub [%2 + 2], %%g7\n\t" \
|
||||
"sll %%l2, 16, %%l2\n" \
|
||||
"8:\t" "ldub [%2 + 3], %%g1\n\t" \
|
||||
"sll %%g7, 8, %%g7\n\t" \
|
||||
"or %%l1, %%l2, %%l1\n\t" \
|
||||
"or %%g7, %%g1, %%g7\n\t" \
|
||||
"or %%l1, %%g7, %%l1\n\t" \
|
||||
"b 0f\n\t" \
|
||||
" st %%l1, [%0]\n" \
|
||||
"9:\t" "ldub [%2], %%l1\n" \
|
||||
"10:\t" "ldub [%2 + 1], %%l2\n\t" \
|
||||
"sll %%l1, 24, %%l1\n" \
|
||||
"11:\t" "ldub [%2 + 2], %%g7\n\t" \
|
||||
"sll %%l2, 16, %%l2\n" \
|
||||
"12:\t" "ldub [%2 + 3], %%g1\n\t" \
|
||||
"sll %%g7, 8, %%g7\n\t" \
|
||||
"or %%l1, %%l2, %%l1\n\t" \
|
||||
"or %%g7, %%g1, %%g7\n\t" \
|
||||
"or %%l1, %%g7, %%g7\n" \
|
||||
"13:\t" "ldub [%2 + 4], %%l1\n\t" \
|
||||
"st %%g7, [%0]\n" \
|
||||
"14:\t" "ldub [%2 + 5], %%l2\n\t" \
|
||||
"sll %%l1, 24, %%l1\n" \
|
||||
"15:\t" "ldub [%2 + 6], %%g7\n\t" \
|
||||
"sll %%l2, 16, %%l2\n" \
|
||||
"16:\t" "ldub [%2 + 7], %%g1\n\t" \
|
||||
"sll %%g7, 8, %%g7\n\t" \
|
||||
"or %%l1, %%l2, %%l1\n\t" \
|
||||
"or %%g7, %%g1, %%g7\n\t" \
|
||||
"or %%l1, %%g7, %%g7\n\t" \
|
||||
"st %%g7, [%0 + 4]\n" \
|
||||
"0:\n\n\t" \
|
||||
".section __ex_table,#alloc\n\t" \
|
||||
".word 4b, " #errh "\n\t" \
|
||||
".word 5b, " #errh "\n\t" \
|
||||
".word 6b, " #errh "\n\t" \
|
||||
".word 7b, " #errh "\n\t" \
|
||||
".word 8b, " #errh "\n\t" \
|
||||
".word 9b, " #errh "\n\t" \
|
||||
".word 10b, " #errh "\n\t" \
|
||||
".word 11b, " #errh "\n\t" \
|
||||
".word 12b, " #errh "\n\t" \
|
||||
".word 13b, " #errh "\n\t" \
|
||||
".word 14b, " #errh "\n\t" \
|
||||
".word 15b, " #errh "\n\t" \
|
||||
".word 16b, " #errh "\n\n\t" \
|
||||
".previous\n\t" \
|
||||
: : "r" (dest_reg), "r" (size), "r" (saddr), "r" (is_signed) \
|
||||
: "l1", "l2", "g7", "g1", "cc"); \
|
||||
})
|
||||
|
||||
#define store_common(dst_addr, size, src_val, errh) ({ \
|
||||
__asm__ __volatile__ ( \
|
||||
"ld [%2], %%l1\n" \
|
||||
"cmp %1, 2\n\t" \
|
||||
"be 2f\n\t" \
|
||||
" cmp %1, 4\n\t" \
|
||||
"be 1f\n\t" \
|
||||
" srl %%l1, 24, %%l2\n\t" \
|
||||
"srl %%l1, 16, %%g7\n" \
|
||||
"4:\t" "stb %%l2, [%0]\n\t" \
|
||||
"srl %%l1, 8, %%l2\n" \
|
||||
"5:\t" "stb %%g7, [%0 + 1]\n\t" \
|
||||
"ld [%2 + 4], %%g7\n" \
|
||||
"6:\t" "stb %%l2, [%0 + 2]\n\t" \
|
||||
"srl %%g7, 24, %%l2\n" \
|
||||
"7:\t" "stb %%l1, [%0 + 3]\n\t" \
|
||||
"srl %%g7, 16, %%l1\n" \
|
||||
"8:\t" "stb %%l2, [%0 + 4]\n\t" \
|
||||
"srl %%g7, 8, %%l2\n" \
|
||||
"9:\t" "stb %%l1, [%0 + 5]\n" \
|
||||
"10:\t" "stb %%l2, [%0 + 6]\n\t" \
|
||||
"b 0f\n" \
|
||||
"11:\t" " stb %%g7, [%0 + 7]\n" \
|
||||
"1:\t" "srl %%l1, 16, %%g7\n" \
|
||||
"12:\t" "stb %%l2, [%0]\n\t" \
|
||||
"srl %%l1, 8, %%l2\n" \
|
||||
"13:\t" "stb %%g7, [%0 + 1]\n" \
|
||||
"14:\t" "stb %%l2, [%0 + 2]\n\t" \
|
||||
"b 0f\n" \
|
||||
"15:\t" " stb %%l1, [%0 + 3]\n" \
|
||||
"2:\t" "srl %%l1, 8, %%l2\n" \
|
||||
"16:\t" "stb %%l2, [%0]\n" \
|
||||
"17:\t" "stb %%l1, [%0 + 1]\n" \
|
||||
"0:\n\n\t" \
|
||||
".section __ex_table,#alloc\n\t" \
|
||||
".word 4b, " #errh "\n\t" \
|
||||
".word 5b, " #errh "\n\t" \
|
||||
".word 6b, " #errh "\n\t" \
|
||||
".word 7b, " #errh "\n\t" \
|
||||
".word 8b, " #errh "\n\t" \
|
||||
".word 9b, " #errh "\n\t" \
|
||||
".word 10b, " #errh "\n\t" \
|
||||
".word 11b, " #errh "\n\t" \
|
||||
".word 12b, " #errh "\n\t" \
|
||||
".word 13b, " #errh "\n\t" \
|
||||
".word 14b, " #errh "\n\t" \
|
||||
".word 15b, " #errh "\n\t" \
|
||||
".word 16b, " #errh "\n\t" \
|
||||
".word 17b, " #errh "\n\n\t" \
|
||||
".previous\n\t" \
|
||||
: : "r" (dst_addr), "r" (size), "r" (src_val) \
|
||||
: "l1", "l2", "g7", "g1", "cc"); \
|
||||
})
|
||||
/* una_asm.S */
|
||||
extern int do_int_load(unsigned long *dest_reg, int size,
|
||||
unsigned long *saddr, int is_signed);
|
||||
extern int __do_int_store(unsigned long *dst_addr, int size,
|
||||
unsigned long *src_val);
|
||||
|
||||
#define do_integer_store(reg_num, size, dst_addr, regs, errh) ({ \
|
||||
unsigned long *src_val; \
|
||||
static unsigned long zero[2] = { 0, }; \
|
||||
\
|
||||
if (reg_num) src_val = fetch_reg_addr(reg_num, regs); \
|
||||
else { \
|
||||
src_val = &zero[0]; \
|
||||
if (size == 8) \
|
||||
zero[1] = fetch_reg(1, regs); \
|
||||
} \
|
||||
store_common(dst_addr, size, src_val, errh); \
|
||||
})
|
||||
static int do_int_store(int reg_num, int size, unsigned long *dst_addr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
unsigned long zero[2] = { 0, 0 };
|
||||
unsigned long *src_val;
|
||||
|
||||
if (reg_num)
|
||||
src_val = fetch_reg_addr(reg_num, regs);
|
||||
else {
|
||||
src_val = &zero[0];
|
||||
if (size == 8)
|
||||
zero[1] = fetch_reg(1, regs);
|
||||
}
|
||||
return __do_int_store(dst_addr, size, src_val);
|
||||
}
|
||||
|
||||
extern void smp_capture(void);
|
||||
extern void smp_release(void);
|
||||
|
||||
#define do_atomic(srcdest_reg, mem, errh) ({ \
|
||||
unsigned long flags, tmp; \
|
||||
\
|
||||
smp_capture(); \
|
||||
local_irq_save(flags); \
|
||||
tmp = *srcdest_reg; \
|
||||
do_integer_load(srcdest_reg, 4, mem, 0, errh); \
|
||||
store_common(mem, 4, &tmp, errh); \
|
||||
local_irq_restore(flags); \
|
||||
smp_release(); \
|
||||
})
|
||||
|
||||
static inline void advance(struct pt_regs *regs)
|
||||
{
|
||||
regs->pc = regs->npc;
|
||||
|
|
@ -342,9 +216,7 @@ static inline int ok_for_kernel(unsigned int insn)
|
|||
return !floating_point_load_or_store_p(insn);
|
||||
}
|
||||
|
||||
void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn) __asm__ ("kernel_mna_trap_fault");
|
||||
|
||||
void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
|
||||
static void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
|
||||
{
|
||||
unsigned long g2 = regs->u_regs [UREG_G2];
|
||||
unsigned long fixup = search_extables_range(regs->pc, &g2);
|
||||
|
|
@ -379,48 +251,34 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
|
|||
printk("Unsupported unaligned load/store trap for kernel at <%08lx>.\n",
|
||||
regs->pc);
|
||||
unaligned_panic("Wheee. Kernel does fpu/atomic unaligned load/store.");
|
||||
|
||||
__asm__ __volatile__ ("\n"
|
||||
"kernel_unaligned_trap_fault:\n\t"
|
||||
"mov %0, %%o0\n\t"
|
||||
"call kernel_mna_trap_fault\n\t"
|
||||
" mov %1, %%o1\n\t"
|
||||
:
|
||||
: "r" (regs), "r" (insn)
|
||||
: "o0", "o1", "o2", "o3", "o4", "o5", "o7",
|
||||
"g1", "g2", "g3", "g4", "g5", "g7", "cc");
|
||||
} else {
|
||||
unsigned long addr = compute_effective_address(regs, insn);
|
||||
int err;
|
||||
|
||||
#ifdef DEBUG_MNA
|
||||
printk("KMNA: pc=%08lx [dir=%s addr=%08lx size=%d] retpc[%08lx]\n",
|
||||
regs->pc, dirstrings[dir], addr, size, regs->u_regs[UREG_RETPC]);
|
||||
#endif
|
||||
switch(dir) {
|
||||
switch (dir) {
|
||||
case load:
|
||||
do_integer_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
||||
size, (unsigned long *) addr,
|
||||
decode_signedness(insn),
|
||||
kernel_unaligned_trap_fault);
|
||||
err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f),
|
||||
regs),
|
||||
size, (unsigned long *) addr,
|
||||
decode_signedness(insn));
|
||||
break;
|
||||
|
||||
case store:
|
||||
do_integer_store(((insn>>25)&0x1f), size,
|
||||
(unsigned long *) addr, regs,
|
||||
kernel_unaligned_trap_fault);
|
||||
err = do_int_store(((insn>>25)&0x1f), size,
|
||||
(unsigned long *) addr, regs);
|
||||
break;
|
||||
#if 0 /* unsupported */
|
||||
case both:
|
||||
do_atomic(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
||||
(unsigned long *) addr,
|
||||
kernel_unaligned_trap_fault);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
panic("Impossible kernel unaligned trap.");
|
||||
/* Not reached... */
|
||||
}
|
||||
advance(regs);
|
||||
if (err)
|
||||
kernel_mna_trap_fault(regs, insn);
|
||||
else
|
||||
advance(regs);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -459,9 +317,7 @@ static inline int ok_for_user(struct pt_regs *regs, unsigned int insn,
|
|||
return 0;
|
||||
}
|
||||
|
||||
void user_mna_trap_fault(struct pt_regs *regs, unsigned int insn) __asm__ ("user_mna_trap_fault");
|
||||
|
||||
void user_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
|
||||
static void user_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
|
||||
{
|
||||
siginfo_t info;
|
||||
|
||||
|
|
@ -485,7 +341,7 @@ asmlinkage void user_unaligned_trap(struct pt_regs *regs, unsigned int insn)
|
|||
if(!ok_for_user(regs, insn, dir)) {
|
||||
goto kill_user;
|
||||
} else {
|
||||
int size = decode_access_size(insn);
|
||||
int err, size = decode_access_size(insn);
|
||||
unsigned long addr;
|
||||
|
||||
if(floating_point_load_or_store_p(insn)) {
|
||||
|
|
@ -496,48 +352,34 @@ asmlinkage void user_unaligned_trap(struct pt_regs *regs, unsigned int insn)
|
|||
addr = compute_effective_address(regs, insn);
|
||||
switch(dir) {
|
||||
case load:
|
||||
do_integer_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
||||
size, (unsigned long *) addr,
|
||||
decode_signedness(insn),
|
||||
user_unaligned_trap_fault);
|
||||
err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f),
|
||||
regs),
|
||||
size, (unsigned long *) addr,
|
||||
decode_signedness(insn));
|
||||
break;
|
||||
|
||||
case store:
|
||||
do_integer_store(((insn>>25)&0x1f), size,
|
||||
(unsigned long *) addr, regs,
|
||||
user_unaligned_trap_fault);
|
||||
err = do_int_store(((insn>>25)&0x1f), size,
|
||||
(unsigned long *) addr, regs);
|
||||
break;
|
||||
|
||||
case both:
|
||||
#if 0 /* unsupported */
|
||||
do_atomic(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
||||
(unsigned long *) addr,
|
||||
user_unaligned_trap_fault);
|
||||
#else
|
||||
/*
|
||||
* This was supported in 2.4. However, we question
|
||||
* the value of SWAP instruction across word boundaries.
|
||||
*/
|
||||
printk("Unaligned SWAP unsupported.\n");
|
||||
goto kill_user;
|
||||
#endif
|
||||
err = -EFAULT;
|
||||
break;
|
||||
|
||||
default:
|
||||
unaligned_panic("Impossible user unaligned trap.");
|
||||
|
||||
__asm__ __volatile__ ("\n"
|
||||
"user_unaligned_trap_fault:\n\t"
|
||||
"mov %0, %%o0\n\t"
|
||||
"call user_mna_trap_fault\n\t"
|
||||
" mov %1, %%o1\n\t"
|
||||
:
|
||||
: "r" (regs), "r" (insn)
|
||||
: "o0", "o1", "o2", "o3", "o4", "o5", "o7",
|
||||
"g1", "g2", "g3", "g4", "g5", "g7", "cc");
|
||||
goto out;
|
||||
}
|
||||
advance(regs);
|
||||
if (err)
|
||||
goto kill_user;
|
||||
else
|
||||
advance(regs);
|
||||
goto out;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@ struct cpu_fp_info {
|
|||
char* fp_name;
|
||||
};
|
||||
|
||||
struct cpu_fp_info linux_sparc_fpu[] = {
|
||||
static struct cpu_fp_info linux_sparc_fpu[] = {
|
||||
{ 0x17, 0x10, 0, "UltraSparc I integrated FPU"},
|
||||
{ 0x22, 0x10, 0, "UltraSparc I integrated FPU"},
|
||||
{ 0x17, 0x11, 0, "UltraSparc II integrated FPU"},
|
||||
|
|
@ -46,7 +46,7 @@ struct cpu_fp_info linux_sparc_fpu[] = {
|
|||
|
||||
#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
|
||||
|
||||
struct cpu_iu_info linux_sparc_chips[] = {
|
||||
static struct cpu_iu_info linux_sparc_chips[] = {
|
||||
{ 0x17, 0x10, "TI UltraSparc I (SpitFire)"},
|
||||
{ 0x22, 0x10, "TI UltraSparc I (SpitFire)"},
|
||||
{ 0x17, 0x11, "TI UltraSparc II (BlackBird)"},
|
||||
|
|
|
|||
|
|
@ -114,8 +114,6 @@ void cpu_idle(void)
|
|||
}
|
||||
}
|
||||
|
||||
extern char reboot_command [];
|
||||
|
||||
void machine_halt(void)
|
||||
{
|
||||
sstate_halt();
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@ extern unsigned sunos_sys_table[];
|
|||
#define SUNOS(x) ((long)sunos_sys_table[x])
|
||||
|
||||
#ifdef DEBUG_SOLARIS
|
||||
#define SOLD(s) printk("%s,%d,%s(): %s\n",__FILE__,__LINE__,__FUNCTION__,(s))
|
||||
#define SOLD(s) printk("%s,%d,%s(): %s\n",__FILE__,__LINE__,__func__,(s))
|
||||
#define SOLDD(s) printk("solaris: "); printk s
|
||||
#else
|
||||
#define SOLD(s)
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@ void mykfree(void *p)
|
|||
#define MKCTL_MAGIC 0xDEADBABEBADC0DEDL
|
||||
#define PUT_MAGIC(a,m) do{(*(u64*)(a))=(m);}while(0)
|
||||
#define SCHECK_MAGIC(a,m) do{if((*(u64*)(a))!=(m))printk("%s,%u,%s(): magic %08x at %p corrupted!\n",\
|
||||
__FILE__,__LINE__,__FUNCTION__,(m),(a));}while(0)
|
||||
__FILE__,__LINE__,__func__,(m),(a));}while(0)
|
||||
#define BUF_OFFSET sizeof(u64)
|
||||
#define MKCTL_TRAILER sizeof(u64)
|
||||
|
||||
|
|
|
|||
|
|
@ -44,6 +44,8 @@ extern enum sparc_cpu sparc_cpu_model;
|
|||
|
||||
#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */
|
||||
|
||||
extern char reboot_command[];
|
||||
|
||||
extern struct thread_info *current_set[NR_CPUS];
|
||||
|
||||
extern unsigned long empty_bad_page;
|
||||
|
|
|
|||
|
|
@ -30,6 +30,8 @@ enum sparc_cpu {
|
|||
#define ARCH_SUN4C_SUN4 0
|
||||
#define ARCH_SUN4 0
|
||||
|
||||
extern char reboot_command[];
|
||||
|
||||
/* These are here in an effort to more fully work around Spitfire Errata
|
||||
* #51. Essentially, if a memory barrier occurs soon after a mispredicted
|
||||
* branch, the chip can stop executing instructions until a trap occurs.
|
||||
|
|
|
|||
Loading…
Reference in a new issue