mirror of
https://github.com/adulau/aha.git
synced 2024-12-29 12:16:20 +00:00
msm: make debugging UART (for DEBUG_LL) configurable
Provides options to select one of the three "lowspeed" UARTs on MSM7k SoCs for DEBUG_LL output from the zImage decompressor and kernel. Signed-off-by: Brian Swetland <swetland@google.com> Signed-off-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
This commit is contained in:
parent
333a07437c
commit
6339f6695f
5 changed files with 63 additions and 7 deletions
|
@ -3,6 +3,30 @@ if ARCH_MSM
|
||||||
comment "MSM Board Type"
|
comment "MSM Board Type"
|
||||||
depends on ARCH_MSM
|
depends on ARCH_MSM
|
||||||
|
|
||||||
|
config MSM_DEBUG_UART
|
||||||
|
int
|
||||||
|
default 1 if MSM_DEBUG_UART1
|
||||||
|
default 2 if MSM_DEBUG_UART2
|
||||||
|
default 3 if MSM_DEBUG_UART3
|
||||||
|
|
||||||
|
choice
|
||||||
|
prompt "Debug UART"
|
||||||
|
|
||||||
|
default MSM_DEBUG_UART_NONE
|
||||||
|
|
||||||
|
config MSM_DEBUG_UART_NONE
|
||||||
|
bool "None"
|
||||||
|
|
||||||
|
config MSM_DEBUG_UART1
|
||||||
|
bool "UART1"
|
||||||
|
|
||||||
|
config MSM_DEBUG_UART2
|
||||||
|
bool "UART2"
|
||||||
|
|
||||||
|
config MSM_DEBUG_UART3
|
||||||
|
bool "UART3"
|
||||||
|
endchoice
|
||||||
|
|
||||||
config MACH_HALIBUT
|
config MACH_HALIBUT
|
||||||
depends on ARCH_MSM
|
depends on ARCH_MSM
|
||||||
default y
|
default y
|
||||||
|
|
|
@ -14,15 +14,18 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#include <mach/hardware.h>
|
#include <mach/hardware.h>
|
||||||
#include <mach/msm_iomap.h>
|
#include <mach/msm_iomap.h>
|
||||||
|
|
||||||
|
#ifdef CONFIG_MSM_DEBUG_UART
|
||||||
.macro addruart,rx
|
.macro addruart,rx
|
||||||
@ see if the MMU is enabled and select appropriate base address
|
@ see if the MMU is enabled and select appropriate base address
|
||||||
mrc p15, 0, \rx, c1, c0
|
mrc p15, 0, \rx, c1, c0
|
||||||
tst \rx, #1
|
tst \rx, #1
|
||||||
ldreq \rx, =MSM_UART1_PHYS
|
ldreq \rx, =MSM_DEBUG_UART_PHYS
|
||||||
movne \rx, #0
|
ldrne \rx, =MSM_DEBUG_UART_BASE
|
||||||
.endm
|
.endm
|
||||||
|
|
||||||
.macro senduart,rd,rx
|
.macro senduart,rd,rx
|
||||||
|
@ -32,13 +35,20 @@
|
||||||
|
|
||||||
.macro waituart,rd,rx
|
.macro waituart,rd,rx
|
||||||
@ wait for TX_READY
|
@ wait for TX_READY
|
||||||
teq \rx, #0
|
1001: ldr \rd, [\rx, #0x08]
|
||||||
bne 2f
|
|
||||||
1: ldr \rd, [\rx, #0x08]
|
|
||||||
tst \rd, #0x04
|
tst \rd, #0x04
|
||||||
beq 1b
|
beq 1001b
|
||||||
2:
|
|
||||||
.endm
|
.endm
|
||||||
|
#else
|
||||||
|
.macro addruart,rx
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro senduart,rd,rx
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro waituart,rd,rx
|
||||||
|
.endm
|
||||||
|
#endif
|
||||||
|
|
||||||
.macro busyuart,rd,rx
|
.macro busyuart,rd,rx
|
||||||
.endm
|
.endm
|
||||||
|
|
|
@ -84,6 +84,18 @@
|
||||||
#define MSM_UART3_PHYS 0xA9C00000
|
#define MSM_UART3_PHYS 0xA9C00000
|
||||||
#define MSM_UART3_SIZE SZ_4K
|
#define MSM_UART3_SIZE SZ_4K
|
||||||
|
|
||||||
|
#ifdef CONFIG_MSM_DEBUG_UART
|
||||||
|
#define MSM_DEBUG_UART_BASE 0xE1000000
|
||||||
|
#if CONFIG_MSM_DEBUG_UART == 1
|
||||||
|
#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
|
||||||
|
#elif CONFIG_MSM_DEBUG_UART == 2
|
||||||
|
#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
|
||||||
|
#elif CONFIG_MSM_DEBUG_UART == 3
|
||||||
|
#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
|
||||||
|
#endif
|
||||||
|
#define MSM_DEBUG_UART_SIZE SZ_4K
|
||||||
|
#endif
|
||||||
|
|
||||||
#define MSM_SDC1_PHYS 0xA0400000
|
#define MSM_SDC1_PHYS 0xA0400000
|
||||||
#define MSM_SDC1_SIZE SZ_4K
|
#define MSM_SDC1_SIZE SZ_4K
|
||||||
|
|
||||||
|
|
|
@ -16,9 +16,16 @@
|
||||||
#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
|
#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
|
||||||
|
|
||||||
#include "hardware.h"
|
#include "hardware.h"
|
||||||
|
#include "linux/io.h"
|
||||||
|
#include "mach/msm_iomap.h"
|
||||||
|
|
||||||
static void putc(int c)
|
static void putc(int c)
|
||||||
{
|
{
|
||||||
|
#if defined(MSM_DEBUG_UART_PHYS)
|
||||||
|
unsigned base = MSM_DEBUG_UART_PHYS;
|
||||||
|
while (!(readl(base + 0x08) & 0x04)) ;
|
||||||
|
writel(c, base + 0x0c);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void flush(void)
|
static inline void flush(void)
|
||||||
|
|
|
@ -42,6 +42,9 @@ static struct map_desc msm_io_desc[] __initdata = {
|
||||||
MSM_DEVICE(GPIO1),
|
MSM_DEVICE(GPIO1),
|
||||||
MSM_DEVICE(GPIO2),
|
MSM_DEVICE(GPIO2),
|
||||||
MSM_DEVICE(CLK_CTL),
|
MSM_DEVICE(CLK_CTL),
|
||||||
|
#ifdef CONFIG_MSM_DEBUG_UART
|
||||||
|
MSM_DEVICE(DEBUG_UART),
|
||||||
|
#endif
|
||||||
{
|
{
|
||||||
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
|
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
|
||||||
.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
|
.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
|
||||||
|
|
Loading…
Reference in a new issue