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firewire: ohci: Make cycleMatch ISO transmission work
Calling the START_ISO ioctl with a nonnegative cycle paramater has never worked. Last night I got around to figuring out why. Most of this patch is a big comment explaining why we enable an interrupt source then don't actually do anything when we get one. As the comment says, we should do more, but we don't have a way to tell userspace what happened. . . Signed-off-by: Jay Fenlason <fenlason@redhat.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> (edited comment)
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1 changed files with 15 additions and 1 deletions
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@ -275,7 +275,7 @@ static void log_irqs(u32 evt)
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!(evt & OHCI1394_busReset))
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return;
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fw_notify("IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt,
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fw_notify("IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt,
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evt & OHCI1394_selfIDComplete ? " selfID" : "",
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evt & OHCI1394_RQPkt ? " AR_req" : "",
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evt & OHCI1394_RSPkt ? " AR_resp" : "",
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@ -286,6 +286,7 @@ static void log_irqs(u32 evt)
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evt & OHCI1394_postedWriteErr ? " postedWriteErr" : "",
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evt & OHCI1394_cycleTooLong ? " cycleTooLong" : "",
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evt & OHCI1394_cycle64Seconds ? " cycle64Seconds" : "",
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evt & OHCI1394_cycleInconsistent ? " cycleInconsistent" : "",
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evt & OHCI1394_regAccessFail ? " regAccessFail" : "",
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evt & OHCI1394_busReset ? " busReset" : "",
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evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt |
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@ -293,6 +294,7 @@ static void log_irqs(u32 evt)
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OHCI1394_respTxComplete | OHCI1394_isochRx |
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OHCI1394_isochTx | OHCI1394_postedWriteErr |
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OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds |
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OHCI1394_cycleInconsistent |
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OHCI1394_regAccessFail | OHCI1394_busReset)
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? " ?" : "");
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}
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@ -1439,6 +1441,17 @@ static irqreturn_t irq_handler(int irq, void *data)
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OHCI1394_LinkControl_cycleMaster);
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}
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if (unlikely(event & OHCI1394_cycleInconsistent)) {
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/*
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* We need to clear this event bit in order to make
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* cycleMatch isochronous I/O work. In theory we should
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* stop active cycleMatch iso contexts now and restart
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* them at least two cycles later. (FIXME?)
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*/
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if (printk_ratelimit())
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fw_notify("isochronous cycle inconsistent\n");
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}
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if (event & OHCI1394_cycle64Seconds) {
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cycle_time = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
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if ((cycle_time & 0x80000000) == 0)
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@ -1528,6 +1541,7 @@ static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
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OHCI1394_reqTxComplete | OHCI1394_respTxComplete |
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OHCI1394_isochRx | OHCI1394_isochTx |
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OHCI1394_postedWriteErr | OHCI1394_cycleTooLong |
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OHCI1394_cycleInconsistent |
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OHCI1394_cycle64Seconds | OHCI1394_regAccessFail |
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OHCI1394_masterIntEnable);
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if (param_debug & OHCI_PARAM_DEBUG_BUSRESETS)
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