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[POWERPC] Fix typos in booting-without-of.txt
Fix typos + some cosmetic changes. Signed-off-by: Domen Puncer <domen.puncer@telargo.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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1 changed files with 39 additions and 41 deletions
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@ -39,7 +39,7 @@
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and property data. The old style variable
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alignment would make it impossible to do
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"simple" insertion of properties using
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memove (thanks Milton for
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memmove (thanks Milton for
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noticing). Updated kernel patch as well
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- Correct a few more alignment constraints
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- Add a chapter about the device-tree
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@ -55,7 +55,7 @@
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ToDo:
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- Add some definitions of interrupt tree (simple/complex)
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- Add some definitions for pci host bridges
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- Add some definitions for PCI host bridges
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- Add some common address format examples
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- Add definitions for standard properties and "compatible"
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names for cells that are not already defined by the existing
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@ -114,7 +114,7 @@ it with special cases.
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forth words isn't required), you can enter the kernel with:
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r5 : OF callback pointer as defined by IEEE 1275
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bindings to powerpc. Only the 32 bit client interface
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bindings to powerpc. Only the 32-bit client interface
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is currently supported
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r3, r4 : address & length of an initrd if any or 0
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@ -194,7 +194,7 @@ it with special cases.
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for this is to keep kernels on embedded systems small and efficient;
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part of this is due to the fact the code is already that way. In the
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future, a kernel may support multiple platforms, but only if the
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platforms feature the same core architectire. A single kernel build
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platforms feature the same core architecture. A single kernel build
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cannot support both configurations with Book E and configurations
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with classic Powerpc architectures.
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@ -215,7 +215,7 @@ of the boot sequences.... someone speak up if this is wrong!
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enable another config option to select the specific board
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supported.
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NOTE: If ben doesn't merge the setup files, may need to change this to
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NOTE: If Ben doesn't merge the setup files, may need to change this to
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point to setup_32.c
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@ -256,7 +256,7 @@ struct boot_param_header {
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u32 off_dt_struct; /* offset to structure */
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u32 off_dt_strings; /* offset to strings */
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u32 off_mem_rsvmap; /* offset to memory reserve map
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*/
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*/
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u32 version; /* format version */
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u32 last_comp_version; /* last compatible version */
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@ -276,7 +276,7 @@ struct boot_param_header {
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#define OF_DT_HEADER 0xd00dfeed /* 4: version,
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4: total size */
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#define OF_DT_BEGIN_NODE 0x1 /* Start node: full name
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*/
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*/
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#define OF_DT_END_NODE 0x2 /* End node */
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#define OF_DT_PROP 0x3 /* Property: name off,
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size, content */
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@ -313,9 +313,8 @@ struct boot_param_header {
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- off_mem_rsvmap
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This is an offset from the beginning of the header to the start
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of the reserved memory map. This map is a list of pairs of 64
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of the reserved memory map. This map is a list of pairs of 64-
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bit integers. Each pair is a physical address and a size. The
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list is terminated by an entry of size 0. This map provides the
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kernel with a list of physical memory areas that are "reserved"
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and thus not to be used for memory allocations, especially during
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@ -328,7 +327,7 @@ struct boot_param_header {
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contain _at least_ this DT block itself (header,total_size). If
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you are passing an initrd to the kernel, you should reserve it as
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well. You do not need to reserve the kernel image itself. The map
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should be 64 bit aligned.
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should be 64-bit aligned.
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- version
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@ -478,7 +477,7 @@ referencing another node via "phandle" is when laying out the
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interrupt tree which will be described in a further version of this
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document.
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This "linux, phandle" property is a 32 bit value that uniquely
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This "linux, phandle" property is a 32-bit value that uniquely
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identifies a node. You are free to use whatever values or system of
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values, internal pointers, or whatever to generate these, the only
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requirement is that every node for which you provide that property has
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@ -488,7 +487,7 @@ Here is an example of a simple device-tree. In this example, an "o"
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designates a node followed by the node unit name. Properties are
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presented with their name followed by their content. "content"
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represents an ASCII string (zero terminated) value, while <content>
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represents a 32 bit hexadecimal value. The various nodes in this
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represents a 32-bit hexadecimal value. The various nodes in this
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example will be discussed in a later chapter. At this point, it is
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only meant to give you a idea of what a device-tree looks like. I have
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purposefully kept the "name" and "linux,phandle" properties which
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@ -560,15 +559,15 @@ Here's the basic structure of a single node:
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* [align gap to next 4 bytes boundary]
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* for each property:
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* token OF_DT_PROP (that is 0x00000003)
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* 32 bit value of property value size in bytes (or 0 of no
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* value)
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* 32 bit value of offset in string block of property name
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* 32-bit value of property value size in bytes (or 0 if no
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value)
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* 32-bit value of offset in string block of property name
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* property value data if any
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* [align gap to next 4 bytes boundary]
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* [child nodes if any]
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* token OF_DT_END_NODE (that is 0x00000002)
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So the node content can be summarised as a start token, a full path,
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So the node content can be summarized as a start token, a full path,
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a list of properties, a list of child nodes, and an end token. Every
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child node is a full node structure itself as defined above.
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@ -600,7 +599,7 @@ provide those properties yourself.
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----------------------------------------------
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The general rule is documented in the various Open Firmware
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documentations. If you chose to describe a bus with the device-tree
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documentations. If you choose to describe a bus with the device-tree
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and there exist an OF bus binding, then you should follow the
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specification. However, the kernel does not require every single
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device or bus to be described by the device tree.
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@ -613,9 +612,9 @@ those properties defining addresses format for devices directly mapped
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on the processor bus.
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Those 2 properties define 'cells' for representing an address and a
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size. A "cell" is a 32 bit number. For example, if both contain 2
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size. A "cell" is a 32-bit number. For example, if both contain 2
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like the example tree given above, then an address and a size are both
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composed of 2 cells, and each is a 64 bit number (cells are
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composed of 2 cells, and each is a 64-bit number (cells are
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concatenated and expected to be in big endian format). Another example
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is the way Apple firmware defines them, with 2 cells for an address
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and one cell for a size. Most 32-bit implementations should define
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@ -649,7 +648,7 @@ prom_parse.c file of the recent kernels for your bus type.
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The "reg" property only defines addresses and sizes (if #size-cells
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is non-0) within a given bus. In order to translate addresses upward
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(that is into parent bus addresses, and possibly into cpu physical
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(that is into parent bus addresses, and possibly into CPU physical
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addresses), all busses must contain a "ranges" property. If the
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"ranges" property is missing at a given level, it's assumed that
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translation isn't possible. The format of the "ranges" property for a
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@ -665,9 +664,9 @@ example, for a PCI host controller, that would be a CPU address. For a
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PCI<->ISA bridge, that would be a PCI address. It defines the base
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address in the parent bus where the beginning of that range is mapped.
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For a new 64 bit powerpc board, I recommend either the 2/2 format or
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For a new 64-bit powerpc board, I recommend either the 2/2 format or
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Apple's 2/1 format which is slightly more compact since sizes usually
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fit in a single 32 bit word. New 32 bit powerpc boards should use a
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fit in a single 32-bit word. New 32-bit powerpc boards should use a
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1/1 format, unless the processor supports physical addresses greater
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than 32-bits, in which case a 2/1 format is recommended.
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@ -781,7 +780,7 @@ address which can extend beyond that limit.
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Required properties:
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- device_type : has to be "cpu"
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- reg : This is the physical cpu number, it's a single 32 bit cell
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- reg : This is the physical CPU number, it's a single 32-bit cell
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and is also used as-is as the unit number for constructing the
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unit name in the full path. For example, with 2 CPUs, you would
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have the full path:
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@ -802,7 +801,7 @@ address which can extend beyond that limit.
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the kernel timebase/decrementer calibration based on this
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value.
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- clock-frequency : a cell indicating the CPU core clock frequency
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in Hz. A new property will be defined for 64 bit values, but if
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in Hz. A new property will be defined for 64-bit values, but if
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your frequency is < 4Ghz, one cell is enough. Here as well as
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for the above, the common code doesn't use that property, but
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you are welcome to re-use the pSeries or Maple one. A future
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@ -924,8 +923,7 @@ address which can extend beyond that limit.
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The SOC node may contain child nodes for each SOC device that the
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platform uses. Nodes should not be created for devices which exist
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on the SOC but are not used by a particular platform. See chapter VI
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for more information on how to specify devices that are part of an
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SOC.
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for more information on how to specify devices that are part of a SOC.
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Example SOC node for the MPC8540:
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@ -988,7 +986,7 @@ The syntax of the dtc tool is
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[-o output-filename] [-V output_version] input_filename
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The "output_version" defines what versio of the "blob" format will be
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The "output_version" defines what version of the "blob" format will be
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generated. Supported versions are 1,2,3 and 16. The default is
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currently version 3 but that may change in the future to version 16.
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@ -1010,12 +1008,12 @@ supported currently at the toplevel.
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*/
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property2 = <1234abcd>; /* define a property containing a
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* numerical 32 bits value (hexadecimal)
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* numerical 32-bit value (hexadecimal)
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*/
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property3 = <12345678 12345678 deadbeef>;
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/* define a property containing 3
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* numerical 32 bits values (cells) in
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* numerical 32-bit values (cells) in
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* hexadecimal
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*/
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property4 = [0a 0b 0c 0d de ea ad be ef];
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its usage in early_init_devtree(), and the corresponding various
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early_init_dt_scan_*() callbacks. That code can be re-used in a
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GPL bootloader, and as the author of that code, I would be happy
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to discuss possible free licencing to any vendor who wishes to
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to discuss possible free licensing to any vendor who wishes to
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integrate all or part of this code into a non-GPL bootloader.
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@ -1093,7 +1091,7 @@ VI - System-on-a-chip devices and nodes
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=======================================
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Many companies are now starting to develop system-on-a-chip
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processors, where the processor core (cpu) and many peripheral devices
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processors, where the processor core (CPU) and many peripheral devices
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exist on a single piece of silicon. For these SOCs, an SOC node
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should be used that defines child nodes for the devices that make
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up the SOC. While platforms are not required to use this model in
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@ -1300,10 +1298,10 @@ platforms are moved over to use the flattened-device-tree model.
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and additions :
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Required properties :
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- compatible : Should be "fsl-usb2-mph" for multi port host usb
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controllers, or "fsl-usb2-dr" for dual role usb controllers
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- phy_type : For multi port host usb controllers, should be one of
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"ulpi", or "serial". For dual role usb controllers, should be
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- compatible : Should be "fsl-usb2-mph" for multi port host USB
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controllers, or "fsl-usb2-dr" for dual role USB controllers
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- phy_type : For multi port host USB controllers, should be one of
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"ulpi", or "serial". For dual role USB controllers, should be
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one of "ulpi", "utmi", "utmi_wide", or "serial".
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- reg : Offset and length of the register set for the device
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- port0 : boolean; if defined, indicates port0 is connected for
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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Example multi port host usb controller device node :
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Example multi port host USB controller device node :
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usb@22000 {
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device_type = "usb";
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compatible = "fsl-usb2-mph";
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port1;
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};
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Example dual role usb controller device node :
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Example dual role USB controller device node :
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usb@23000 {
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device_type = "usb";
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compatible = "fsl-usb2-dr";
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- channel-fifo-len : An integer representing the number of
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descriptor pointers each channel fetch fifo can hold.
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- exec-units-mask : The bitmask representing what execution units
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(EUs) are available. It's a single 32 bit cell. EU information
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(EUs) are available. It's a single 32-bit cell. EU information
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should be encoded following the SEC's Descriptor Header Dword
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EU_SEL0 field documentation, i.e. as follows:
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bits 8 through 31 are reserved for future SEC EUs.
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- descriptor-types-mask : The bitmask representing what descriptors
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are available. It's a single 32 bit cell. Descriptor type
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are available. It's a single 32-bit cell. Descriptor type
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information should be encoded following the SEC's Descriptor
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Header Dword DESC_TYPE field documentation, i.e. as follows:
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Required properties:
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- device_type : should be "spi".
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- compatible : should be "fsl_spi".
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- mode : the spi operation mode, it can be "cpu" or "qe".
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- mode : the SPI operation mode, it can be "cpu" or "qe".
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- reg : Offset and length of the register set for the device
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- interrupts : <a b> where a is the interrupt number and b is a
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field that represents an encoding of the sense and level
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- partitions : Several pairs of 32-bit values where the first value is
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partition's offset from the start of the device and the second one is
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partition size in bytes with LSB used to signify a read only
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partition (so, the parition size should always be an even number).
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partition (so, the partition size should always be an even number).
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- partition-names : The list of concatenated zero terminated strings
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representing the partition names.
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- probe-type : The type of probe which should be done for the chip
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