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Staging: Lindent sxg.c
Lindent drivers/staging/sxg/sxg.c Signed-off by: J.R. Mauro <jrm8005@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
J.R. Mauro
Greg Kroah-Hartman
parent
f25fda728d
commit
5c7514e061
1 changed files with 81 additions and 65 deletions
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@ -80,9 +80,15 @@
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#include "sxgphycode.h"
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#include "saharadbgdownload.h"
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static int sxg_allocate_buffer_memory(p_adapter_t adapter, u32 Size, SXG_BUFFER_TYPE BufferType);
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static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, void * RcvBlock, dma_addr_t PhysicalAddress, u32 Length);
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static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter, PSXG_SCATTER_GATHER SxgSgl, dma_addr_t PhysicalAddress, u32 Length);
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static int sxg_allocate_buffer_memory(p_adapter_t adapter, u32 Size,
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SXG_BUFFER_TYPE BufferType);
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static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, void *RcvBlock,
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dma_addr_t PhysicalAddress,
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u32 Length);
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static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
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PSXG_SCATTER_GATHER SxgSgl,
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dma_addr_t PhysicalAddress,
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u32 Length);
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static void sxg_mcast_init_crc32(void);
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@ -100,13 +106,13 @@ static void sxg_complete_slow_send(p_adapter_t adapter);
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static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event);
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static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus);
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static bool sxg_mac_filter(p_adapter_t adapter,
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p_ether_header EtherHdr, ushort length);
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p_ether_header EtherHdr, ushort length);
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#if SLIC_GET_STATS_ENABLED
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static struct net_device_stats *sxg_get_stats(p_net_device dev);
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#endif
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static int sxg_mac_set_address(p_net_device dev, void * ptr);
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static int sxg_mac_set_address(p_net_device dev, void *ptr);
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static void sxg_adapter_set_hwaddr(p_adapter_t adapter);
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@ -115,20 +121,19 @@ static void sxg_mcast_set_mask(p_adapter_t adapter);
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static int sxg_initialize_adapter(p_adapter_t adapter);
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static void sxg_stock_rcv_buffers(p_adapter_t adapter);
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static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char Index);
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static void sxg_complete_descriptor_blocks(p_adapter_t adapter,
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unsigned char Index);
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static int sxg_initialize_link(p_adapter_t adapter);
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static int sxg_phy_init(p_adapter_t adapter);
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static void sxg_link_event(p_adapter_t adapter);
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static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter);
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static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState);
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static int sxg_write_mdio_reg(p_adapter_t adapter,
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u32 DevAddr, u32 RegAddr, u32 Value);
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u32 DevAddr, u32 RegAddr, u32 Value);
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static int sxg_read_mdio_reg(p_adapter_t adapter,
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u32 DevAddr, u32 RegAddr, u32 * pValue);
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u32 DevAddr, u32 RegAddr, u32 *pValue);
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static void sxg_mcast_set_list(p_net_device dev);
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#define XXXTODO 0
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static unsigned int sxg_first_init = 1;
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@ -164,6 +169,7 @@ static struct pci_device_id sxg_pci_tbl[] __devinitdata = {
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{PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)},
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{0,}
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};
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MODULE_DEVICE_TABLE(pci, sxg_pci_tbl);
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/***********************************************************************
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@ -242,7 +248,7 @@ static bool sxg_download_microcode(p_adapter_t adapter, SXG_UCODE_SEL UcodeSel)
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PSXG_HW_REGS HwRegs = adapter->HwRegs;
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u32 Section;
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u32 ThisSectionSize;
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u32 * Instruction = NULL;
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u32 *Instruction = NULL;
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u32 BaseAddress, AddressOffset, Address;
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// u32 Failure;
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u32 ValueRead;
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@ -606,7 +612,7 @@ static void sxg_config_pci(struct pci_dev *pcidev)
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PCI_COMMAND_MASTER | // Bus master enable
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PCI_COMMAND_INVALIDATE | // Memory write and invalidate
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PCI_COMMAND_PARITY | // Parity error response
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PCI_COMMAND_SERR | // System ERR
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PCI_COMMAND_SERR | // System ERR
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PCI_COMMAND_FAST_BACK); // Fast back-to-back
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if (pci_command != new_command) {
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DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n",
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@ -695,17 +701,19 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
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mmio_start, mmio_len);
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memmapped_ioaddr = ioremap(mmio_start, mmio_len);
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DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __FUNCTION__, memmapped_ioaddr);
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DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __FUNCTION__,
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memmapped_ioaddr);
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if (!memmapped_ioaddr) {
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DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
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__FUNCTION__, mmio_len, mmio_start);
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goto err_out_free_mmio_region;
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}
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DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] len[%lx], IRQ %d.\n",
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DBG_ERROR
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("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] len[%lx], IRQ %d.\n",
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__func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq);
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adapter->HwRegs = (void *) memmapped_ioaddr;
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adapter->HwRegs = (void *)memmapped_ioaddr;
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adapter->base_addr = memmapped_ioaddr;
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mmio_start = pci_resource_start(pcidev, 2);
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@ -715,7 +723,8 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
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mmio_start, mmio_len);
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memmapped_ioaddr = ioremap(mmio_start, mmio_len);
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DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, memmapped_ioaddr);
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DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__,
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memmapped_ioaddr);
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if (!memmapped_ioaddr) {
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DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
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__FUNCTION__, mmio_len, mmio_start);
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@ -845,7 +854,6 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
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return -ENODEV;
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}
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/***********************************************************************
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* LINE BASE Interrupt routines..
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***********************************************************************/
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@ -957,7 +965,8 @@ static irqreturn_t sxg_isr(int irq, void *dev_id)
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PSXG_EVENT_RING EventRing = &adapter->EventRings[i];
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PSXG_EVENT Event =
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&EventRing->Ring[adapter->NextEvent[i]];
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unsigned char Cpu = adapter->RssSystemInfo->RssIdToCpu[i];
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unsigned char Cpu =
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adapter->RssSystemInfo->RssIdToCpu[i];
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if (Event->Status & EVENT_STATUS_VALID) {
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adapter->IsrDpcsPending++;
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CpuMask |= (1 << Cpu);
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@ -1078,7 +1087,8 @@ static int sxg_process_isr(p_adapter_t adapter, u32 MessageId)
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if (Isr & SXG_ISR_DEAD) {
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// Set aside the crash info and set the adapter state to RESET
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adapter->CrashCpu =
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(unsigned char) ((Isr & SXG_ISR_CPU) >> SXG_ISR_CPU_SHIFT);
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(unsigned char)((Isr & SXG_ISR_CPU) >>
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SXG_ISR_CPU_SHIFT);
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adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH);
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adapter->Dead = TRUE;
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DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __FUNCTION__,
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@ -1286,7 +1296,7 @@ static void sxg_complete_slow_send(p_adapter_t adapter)
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{
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PSXG_XMT_RING XmtRing = &adapter->XmtRings[0];
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PSXG_RING_INFO XmtRingInfo = &adapter->XmtRingZeroInfo;
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u32 * ContextType;
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u32 *ContextType;
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PSXG_CMD XmtCmd;
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// NOTE - This lock is dropped and regrabbed in this loop.
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@ -1380,11 +1390,9 @@ static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event)
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError",
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Event, Event->Status, Event->HostHandle, 0);
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// XXXTODO - Remove this print later
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DBG_ERROR("SXG: Receive error %x\n",
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*(u32 *)
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DBG_ERROR("SXG: Receive error %x\n", *(u32 *)
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SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr));
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sxg_process_rcv_error(adapter,
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*(u32 *)
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sxg_process_rcv_error(adapter, *(u32 *)
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SXG_RECEIVE_DATA_LOCATION
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(RcvDataBufferHdr));
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goto drop;
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@ -1406,8 +1414,7 @@ static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event)
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//
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// Dumb-nic frame. See if it passes our mac filter and update stats
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//
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if (!sxg_mac_filter(adapter,
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(p_ether_header)
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if (!sxg_mac_filter(adapter, (p_ether_header)
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SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr),
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Event->Length)) {
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr",
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@ -1527,7 +1534,8 @@ static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus)
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* Return Value:
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* TRUE if the frame is to be allowed
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*/
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static bool sxg_mac_filter(p_adapter_t adapter, p_ether_header EtherHdr, ushort length)
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static bool sxg_mac_filter(p_adapter_t adapter, p_ether_header EtherHdr,
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ushort length)
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{
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bool EqualAddr;
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@ -1600,7 +1608,8 @@ static int sxg_register_interrupt(p_adapter_t adapter)
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("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n",
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__FUNCTION__, adapter, adapter->netdev->irq, NR_IRQS);
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spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags);
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spin_unlock_irqrestore(&sxg_global.driver_lock,
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sxg_global.flags);
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retval = request_irq(adapter->netdev->irq,
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&sxg_isr,
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@ -1729,7 +1738,6 @@ static int sxg_entry_open(p_net_device dev)
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sxg_global.num_sxg_ports_active++;
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adapter->activated = 1;
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}
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// Initialize the adapter
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DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __FUNCTION__);
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status = sxg_initialize_adapter(adapter);
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@ -1786,7 +1794,7 @@ static void __devexit sxg_entry_remove(struct pci_dev *pcidev)
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release_mem_region(mmio_start, mmio_len);
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DBG_ERROR("sxg: %s iounmap dev->base_addr[%x]\n", __FUNCTION__,
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(unsigned int) dev->base_addr);
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(unsigned int)dev->base_addr);
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iounmap((char *)dev->base_addr);
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DBG_ERROR("sxg: %s deallocate device\n", __FUNCTION__);
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@ -1929,7 +1937,7 @@ static int sxg_transmit_packet(p_adapter_t adapter, struct sk_buff *skb)
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{
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PSCATTER_GATHER_LIST pSgl;
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PSXG_SCATTER_GATHER SxgSgl;
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void * SglBuffer;
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void *SglBuffer;
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u32 SglBufferLength;
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// The vast majority of work is done in the shared
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@ -2038,7 +2046,9 @@ static void sxg_dumb_sgl(PSCATTER_GATHER_LIST pSgl, PSXG_SCATTER_GATHER SxgSgl)
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#endif
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// Fill in the command
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// Copy out the first SGE to the command and adjust for offset
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phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, PCI_DMA_TODEVICE);
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phys_addr =
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pci_map_single(adapter->pcidev, skb->data, skb->len,
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PCI_DMA_TODEVICE);
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XmtCmd->Buffer.FirstSgeAddress = SXG_GET_ADDR_HIGH(phys_addr);
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XmtCmd->Buffer.FirstSgeAddress = XmtCmd->Buffer.FirstSgeAddress << 32;
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XmtCmd->Buffer.FirstSgeAddress =
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@ -2422,7 +2432,8 @@ static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter)
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return (SXG_LINK_DOWN);
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}
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static void sxg_indicate_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState)
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static void sxg_indicate_link_state(p_adapter_t adapter,
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SXG_LINK_STATE LinkState)
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{
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if (adapter->LinkState == SXG_LINK_UP) {
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DBG_ERROR("%s: LINK now UP, call netif_start_queue\n",
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@ -2487,11 +2498,11 @@ static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState)
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* status
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*/
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static int sxg_write_mdio_reg(p_adapter_t adapter,
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u32 DevAddr, u32 RegAddr, u32 Value)
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u32 DevAddr, u32 RegAddr, u32 Value)
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{
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PSXG_HW_REGS HwRegs = adapter->HwRegs;
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u32 AddrOp; // Address operation (written to MIIM field reg)
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u32 WriteOp; // Write operation (written to MIIM field reg)
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u32 WriteOp; // Write operation (written to MIIM field reg)
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u32 Cmd; // Command (written to MIIM command reg)
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u32 ValueRead;
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u32 Timeout;
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@ -2577,7 +2588,7 @@ static int sxg_write_mdio_reg(p_adapter_t adapter,
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* status
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*/
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static int sxg_read_mdio_reg(p_adapter_t adapter,
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u32 DevAddr, u32 RegAddr, u32 * pValue)
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u32 DevAddr, u32 RegAddr, u32 *pValue)
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{
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PSXG_HW_REGS HwRegs = adapter->HwRegs;
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u32 AddrOp; // Address operation (written to MIIM field reg)
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@ -2698,7 +2709,7 @@ static int sxg_mcast_add_list(p_adapter_t adapter, char *address)
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* we must then transpose the value and return bits 30-23.
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*
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*/
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static u32 sxg_crc_table[256]; /* Table of CRC's for all possible byte values */
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static u32 sxg_crc_table[256]; /* Table of CRC's for all possible byte values */
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static u32 sxg_crc_init; /* Is table initialized */
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/*
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@ -2706,7 +2717,7 @@ static u32 sxg_crc_init; /* Is table initialized */
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*/
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static void sxg_mcast_init_crc32(void)
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{
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u32 c; /* CRC shit reg */
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u32 c; /* CRC shit reg */
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u32 e = 0; /* Poly X-or pattern */
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int i; /* counter */
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int k; /* byte being shifted into crc */
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@ -2783,7 +2794,7 @@ static void sxg_mcast_set_list(p_net_device dev)
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ASSERT(adapter);
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for (i = 1; i <= mc_count; i++) {
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addresses = (char *) & mc_list->dmi_addr;
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addresses = (char *)&mc_list->dmi_addr;
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if (mc_list->dmi_addrlen == 6) {
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status = sxg_mcast_add_list(adapter, addresses);
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if (status != STATUS_SUCCESS) {
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@ -2833,7 +2844,7 @@ static void sxg_mcast_set_mask(p_adapter_t adapter)
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PSXG_UCODE_REGS sxg_regs = adapter->UcodeRegs;
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DBG_ERROR("%s ENTER (%s) macopts[%x] mask[%llx]\n", __FUNCTION__,
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adapter->netdev->name, (unsigned int) adapter->MacFilter,
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adapter->netdev->name, (unsigned int)adapter->MacFilter,
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adapter->MulticastMask);
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if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) {
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@ -2857,12 +2868,10 @@ static void sxg_mcast_set_mask(p_adapter_t adapter)
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((adapter->MulticastMask >> 32) & 0xFFFFFFFF)));
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WRITE_REG(sxg_regs->McastLow,
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(u32) (adapter->MulticastMask & 0xFFFFFFFF),
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FLUSH);
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(u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH);
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WRITE_REG(sxg_regs->McastHigh,
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(u32) ((adapter->
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MulticastMask >> 32) & 0xFFFFFFFF),
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FLUSH);
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MulticastMask >> 32) & 0xFFFFFFFF), FLUSH);
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}
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}
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@ -2991,9 +3000,9 @@ void SxgFreeResources(p_adapter_t adapter)
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* None.
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*/
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static void sxg_allocate_complete(p_adapter_t adapter,
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void *VirtualAddress,
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dma_addr_t PhysicalAddress,
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u32 Length, SXG_BUFFER_TYPE Context)
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void *VirtualAddress,
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dma_addr_t PhysicalAddress,
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u32 Length, SXG_BUFFER_TYPE Context)
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{
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SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp",
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adapter, VirtualAddress, Length, Context);
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@ -3008,8 +3017,7 @@ static void sxg_allocate_complete(p_adapter_t adapter,
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PhysicalAddress, Length);
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break;
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case SXG_BUFFER_TYPE_SGL:
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sxg_allocate_sgl_buffer_complete(adapter,
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(PSXG_SCATTER_GATHER)
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sxg_allocate_sgl_buffer_complete(adapter, (PSXG_SCATTER_GATHER)
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VirtualAddress,
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PhysicalAddress, Length);
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break;
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@ -3031,10 +3039,10 @@ static void sxg_allocate_complete(p_adapter_t adapter,
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* int
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*/
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static int sxg_allocate_buffer_memory(p_adapter_t adapter,
|
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u32 Size, SXG_BUFFER_TYPE BufferType)
|
||||
u32 Size, SXG_BUFFER_TYPE BufferType)
|
||||
{
|
||||
int status;
|
||||
void * Buffer;
|
||||
void *Buffer;
|
||||
dma_addr_t pBuffer;
|
||||
|
||||
SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem",
|
||||
|
|
@ -3083,8 +3091,9 @@ static int sxg_allocate_buffer_memory(p_adapter_t adapter,
|
|||
*
|
||||
*/
|
||||
static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
|
||||
void * RcvBlock,
|
||||
dma_addr_t PhysicalAddress, u32 Length)
|
||||
void *RcvBlock,
|
||||
dma_addr_t PhysicalAddress,
|
||||
u32 Length)
|
||||
{
|
||||
u32 i;
|
||||
u32 BufferSize = adapter->ReceiveBufferSize;
|
||||
|
|
@ -3160,9 +3169,10 @@ static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
|
|||
}
|
||||
|
||||
// Locate the descriptor block and put it on a separate free queue
|
||||
RcvDescriptorBlock = (PSXG_RCV_DESCRIPTOR_BLOCK) ((unsigned char *)RcvBlock +
|
||||
SXG_RCV_DESCRIPTOR_BLOCK_OFFSET
|
||||
(BufferSize));
|
||||
RcvDescriptorBlock =
|
||||
(PSXG_RCV_DESCRIPTOR_BLOCK) ((unsigned char *)RcvBlock +
|
||||
SXG_RCV_DESCRIPTOR_BLOCK_OFFSET
|
||||
(BufferSize));
|
||||
RcvDescriptorBlockHdr =
|
||||
(PSXG_RCV_DESCRIPTOR_BLOCK_HDR) ((unsigned char *)RcvBlock +
|
||||
SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET
|
||||
|
|
@ -3210,8 +3220,9 @@ static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
|
|||
*
|
||||
*/
|
||||
static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
|
||||
PSXG_SCATTER_GATHER SxgSgl,
|
||||
dma_addr_t PhysicalAddress, u32 Length)
|
||||
PSXG_SCATTER_GATHER SxgSgl,
|
||||
dma_addr_t PhysicalAddress,
|
||||
u32 Length)
|
||||
{
|
||||
SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp",
|
||||
adapter, SxgSgl, Length, 0);
|
||||
|
|
@ -3228,7 +3239,8 @@ static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
|
|||
adapter, SxgSgl, Length, 0);
|
||||
}
|
||||
|
||||
static unsigned char temp_mac_address[6] = { 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 };
|
||||
static unsigned char temp_mac_address[6] =
|
||||
{ 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 };
|
||||
|
||||
static void sxg_adapter_set_hwaddr(p_adapter_t adapter)
|
||||
{
|
||||
|
|
@ -3255,7 +3267,7 @@ static void sxg_adapter_set_hwaddr(p_adapter_t adapter)
|
|||
|
||||
}
|
||||
|
||||
static int sxg_mac_set_address(p_net_device dev, void * ptr)
|
||||
static int sxg_mac_set_address(p_net_device dev, void *ptr)
|
||||
{
|
||||
#if XXXTODO
|
||||
p_adapter_t adapter = (p_adapter_t) netdev_priv(dev);
|
||||
|
|
@ -3400,7 +3412,8 @@ static int sxg_initialize_adapter(p_adapter_t adapter)
|
|||
* status
|
||||
*/
|
||||
static int sxg_fill_descriptor_block(p_adapter_t adapter,
|
||||
PSXG_RCV_DESCRIPTOR_BLOCK_HDR RcvDescriptorBlockHdr)
|
||||
PSXG_RCV_DESCRIPTOR_BLOCK_HDR
|
||||
RcvDescriptorBlockHdr)
|
||||
{
|
||||
u32 i;
|
||||
PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo;
|
||||
|
|
@ -3436,7 +3449,8 @@ static int sxg_fill_descriptor_block(p_adapter_t adapter,
|
|||
ASSERT(RcvDataBufferHdr);
|
||||
SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket);
|
||||
RcvDataBufferHdr->State = SXG_BUFFER_ONCARD;
|
||||
RcvDescriptorBlock->Descriptors[i].VirtualAddress = (void *)RcvDataBufferHdr;
|
||||
RcvDescriptorBlock->Descriptors[i].VirtualAddress =
|
||||
(void *)RcvDataBufferHdr;
|
||||
RcvDescriptorBlock->Descriptors[i].PhysicalAddress =
|
||||
RcvDataBufferHdr->PhysicalAddress;
|
||||
}
|
||||
|
|
@ -3497,7 +3511,9 @@ static void sxg_stock_rcv_buffers(p_adapter_t adapter)
|
|||
RcvDescriptorBlockHdr = NULL;
|
||||
if (adapter->FreeRcvBlockCount) {
|
||||
_ple = RemoveHeadList(&adapter->FreeRcvBlocks);
|
||||
RcvDescriptorBlockHdr = container_of(_ple, SXG_RCV_DESCRIPTOR_BLOCK_HDR, FreeList);
|
||||
RcvDescriptorBlockHdr =
|
||||
container_of(_ple, SXG_RCV_DESCRIPTOR_BLOCK_HDR,
|
||||
FreeList);
|
||||
adapter->FreeRcvBlockCount--;
|
||||
RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY;
|
||||
}
|
||||
|
|
@ -3533,7 +3549,8 @@ static void sxg_stock_rcv_buffers(p_adapter_t adapter)
|
|||
* Return
|
||||
* None
|
||||
*/
|
||||
static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char Index)
|
||||
static void sxg_complete_descriptor_blocks(p_adapter_t adapter,
|
||||
unsigned char Index)
|
||||
{
|
||||
PSXG_RCV_RING RingZero = &adapter->RcvRings[0];
|
||||
PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo;
|
||||
|
|
@ -3576,7 +3593,6 @@ static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char In
|
|||
adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail);
|
||||
}
|
||||
|
||||
|
||||
static struct pci_driver sxg_driver = {
|
||||
.name = DRV_NAME,
|
||||
.id_table = sxg_pci_tbl,
|
||||
|
|
|
|||
Loading…
Reference in a new issue