ide: do not access ide_drive_t 'drive_data' field directly

Change ide_drive_t 'drive_data' field from 'unsigned int' type to 'void *'
type, allowing a wider range of values/types to be stored in this field.

Added 'ide_get_drivedata' and 'ide_set_drivedata' helpers to get and set
the 'drive_data' field.

Fixed all host drivers to maintain coherency with the change in the
'drive_data' field type.

Signed-off-by: Joao Ramos <joao.ramos@inov.pt>
[bart: fix qd65xx build, cast to 'unsigned long', minor Coding Style fixups]
Acked-by: Sergei Shtylyov <sshtylyov@ru.montavista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
Joao Ramos 2009-06-15 22:13:44 +02:00 committed by Bartlomiej Zolnierkiewicz
parent 3779f818a4
commit 5bfb151f1f
9 changed files with 94 additions and 40 deletions

View file

@ -118,8 +118,9 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
ide_hwif_t *hwif = drive->hwif; ide_hwif_t *hwif = drive->hwif;
struct pci_dev *dev = to_pci_dev(hwif->dev); struct pci_dev *dev = to_pci_dev(hwif->dev);
struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
unsigned long setup_count;
unsigned int cycle_time; unsigned int cycle_time;
u8 setup_count, arttim = 0; u8 arttim = 0;
static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0}; static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23}; static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
@ -140,10 +141,11 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
if (hwif->channel) { if (hwif->channel) {
ide_drive_t *pair = ide_get_pair_dev(drive); ide_drive_t *pair = ide_get_pair_dev(drive);
drive->drive_data = setup_count; ide_set_drivedata(drive, (void *)setup_count);
if (pair) if (pair)
setup_count = max_t(u8, setup_count, pair->drive_data); setup_count = max_t(u8, setup_count,
(unsigned long)ide_get_drivedata(pair));
} }
if (setup_count > 5) /* shouldn't actually happen... */ if (setup_count > 5) /* shouldn't actually happen... */

View file

@ -146,14 +146,16 @@ static void cs5536_set_pio_mode(ide_drive_t *drive, const u8 pio)
struct pci_dev *pdev = to_pci_dev(drive->hwif->dev); struct pci_dev *pdev = to_pci_dev(drive->hwif->dev);
ide_drive_t *pair = ide_get_pair_dev(drive); ide_drive_t *pair = ide_get_pair_dev(drive);
int cshift = (drive->dn & 1) ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT; int cshift = (drive->dn & 1) ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u32 cast; u32 cast;
u8 cmd_pio = pio; u8 cmd_pio = pio;
if (pair) if (pair)
cmd_pio = min(pio, ide_get_best_pio_mode(pair, 255, 4)); cmd_pio = min(pio, ide_get_best_pio_mode(pair, 255, 4));
drive->drive_data &= (IDE_DRV_MASK << 8); timings &= (IDE_DRV_MASK << 8);
drive->drive_data |= drv_timings[pio]; timings |= drv_timings[pio];
ide_set_drivedata(drive, (void *)timings);
cs5536_program_dtc(drive, drv_timings[pio]); cs5536_program_dtc(drive, drv_timings[pio]);
@ -186,6 +188,7 @@ static void cs5536_set_dma_mode(ide_drive_t *drive, const u8 mode)
struct pci_dev *pdev = to_pci_dev(drive->hwif->dev); struct pci_dev *pdev = to_pci_dev(drive->hwif->dev);
int dshift = (drive->dn & 1) ? IDE_D1_SHIFT : IDE_D0_SHIFT; int dshift = (drive->dn & 1) ? IDE_D1_SHIFT : IDE_D0_SHIFT;
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u32 etc; u32 etc;
cs5536_read(pdev, ETC, &etc); cs5536_read(pdev, ETC, &etc);
@ -195,8 +198,9 @@ static void cs5536_set_dma_mode(ide_drive_t *drive, const u8 mode)
etc |= udma_timings[mode - XFER_UDMA_0] << dshift; etc |= udma_timings[mode - XFER_UDMA_0] << dshift;
} else { /* MWDMA */ } else { /* MWDMA */
etc &= ~(IDE_ETC_UDMA_MASK << dshift); etc &= ~(IDE_ETC_UDMA_MASK << dshift);
drive->drive_data &= IDE_DRV_MASK; timings &= IDE_DRV_MASK;
drive->drive_data |= mwdma_timings[mode - XFER_MW_DMA_0] << 8; timings |= mwdma_timings[mode - XFER_MW_DMA_0] << 8;
ide_set_drivedata(drive, (void *)timings);
} }
cs5536_write(pdev, ETC, etc); cs5536_write(pdev, ETC, etc);
@ -204,9 +208,11 @@ static void cs5536_set_dma_mode(ide_drive_t *drive, const u8 mode)
static void cs5536_dma_start(ide_drive_t *drive) static void cs5536_dma_start(ide_drive_t *drive)
{ {
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
if (drive->current_speed < XFER_UDMA_0 && if (drive->current_speed < XFER_UDMA_0 &&
(drive->drive_data >> 8) != (drive->drive_data & IDE_DRV_MASK)) (timings >> 8) != (timings & IDE_DRV_MASK))
cs5536_program_dtc(drive, drive->drive_data >> 8); cs5536_program_dtc(drive, timings >> 8);
ide_dma_start(drive); ide_dma_start(drive);
} }
@ -214,10 +220,11 @@ static void cs5536_dma_start(ide_drive_t *drive)
static int cs5536_dma_end(ide_drive_t *drive) static int cs5536_dma_end(ide_drive_t *drive)
{ {
int ret = ide_dma_end(drive); int ret = ide_dma_end(drive);
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
if (drive->current_speed < XFER_UDMA_0 && if (drive->current_speed < XFER_UDMA_0 &&
(drive->drive_data >> 8) != (drive->drive_data & IDE_DRV_MASK)) (timings >> 8) != (timings & IDE_DRV_MASK))
cs5536_program_dtc(drive, drive->drive_data & IDE_DRV_MASK); cs5536_program_dtc(drive, timings & IDE_DRV_MASK);
return ret; return ret;
} }

View file

@ -44,7 +44,12 @@
* bit3 (0x08): "1" 3 cycle time, "0" 2 cycle time (?) * bit3 (0x08): "1" 3 cycle time, "0" 2 cycle time (?)
*/ */
#define HT_CONFIG_PORT 0x3e6 #define HT_CONFIG_PORT 0x3e6
#define HT_CONFIG(drivea) (u8)(((drivea)->drive_data & 0xff00) >> 8)
static inline u8 HT_CONFIG(ide_drive_t *drive)
{
return ((unsigned long)ide_get_drivedata(drive) & 0xff00) >> 8;
}
/* /*
* FIFO + PREFETCH (both a/b-model) * FIFO + PREFETCH (both a/b-model)
*/ */
@ -90,7 +95,11 @@
* Active Time for each drive. Smaller value gives higher speed. * Active Time for each drive. Smaller value gives higher speed.
* In case of failures you should probably fall back to a higher value. * In case of failures you should probably fall back to a higher value.
*/ */
#define HT_TIMING(drivea) (u8)((drivea)->drive_data & 0x00ff) static inline u8 HT_TIMING(ide_drive_t *drive)
{
return (unsigned long)ide_get_drivedata(drive) & 0x00ff;
}
#define HT_TIMING_DEFAULT 0xff #define HT_TIMING_DEFAULT 0xff
/* /*
@ -242,23 +251,27 @@ static DEFINE_SPINLOCK(ht6560b_lock);
*/ */
static void ht_set_prefetch(ide_drive_t *drive, u8 state) static void ht_set_prefetch(ide_drive_t *drive, u8 state)
{ {
unsigned long flags; unsigned long flags, config;
int t = HT_PREFETCH_MODE << 8; int t = HT_PREFETCH_MODE << 8;
spin_lock_irqsave(&ht6560b_lock, flags); spin_lock_irqsave(&ht6560b_lock, flags);
config = (unsigned long)ide_get_drivedata(drive);
/* /*
* Prefetch mode and unmask irq seems to conflict * Prefetch mode and unmask irq seems to conflict
*/ */
if (state) { if (state) {
drive->drive_data |= t; /* enable prefetch mode */ config |= t; /* enable prefetch mode */
drive->dev_flags |= IDE_DFLAG_NO_UNMASK; drive->dev_flags |= IDE_DFLAG_NO_UNMASK;
drive->dev_flags &= ~IDE_DFLAG_UNMASK; drive->dev_flags &= ~IDE_DFLAG_UNMASK;
} else { } else {
drive->drive_data &= ~t; /* disable prefetch mode */ config &= ~t; /* disable prefetch mode */
drive->dev_flags &= ~IDE_DFLAG_NO_UNMASK; drive->dev_flags &= ~IDE_DFLAG_NO_UNMASK;
} }
ide_set_drivedata(drive, (void *)config);
spin_unlock_irqrestore(&ht6560b_lock, flags); spin_unlock_irqrestore(&ht6560b_lock, flags);
#ifdef DEBUG #ifdef DEBUG
@ -268,7 +281,7 @@ static void ht_set_prefetch(ide_drive_t *drive, u8 state)
static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio) static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio)
{ {
unsigned long flags; unsigned long flags, config;
u8 timing; u8 timing;
switch (pio) { switch (pio) {
@ -281,8 +294,10 @@ static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio)
timing = ht_pio2timings(drive, pio); timing = ht_pio2timings(drive, pio);
spin_lock_irqsave(&ht6560b_lock, flags); spin_lock_irqsave(&ht6560b_lock, flags);
drive->drive_data &= 0xff00; config = (unsigned long)ide_get_drivedata(drive);
drive->drive_data |= timing; config &= 0xff00;
config |= timing;
ide_set_drivedata(drive, (void *)config);
spin_unlock_irqrestore(&ht6560b_lock, flags); spin_unlock_irqrestore(&ht6560b_lock, flags);
#ifdef DEBUG #ifdef DEBUG
@ -299,7 +314,7 @@ static void __init ht6560b_init_dev(ide_drive_t *drive)
if (hwif->channel) if (hwif->channel)
t |= (HT_SECONDARY_IF << 8); t |= (HT_SECONDARY_IF << 8);
drive->drive_data = t; ide_set_drivedata(drive, (void *)t);
} }
static int probe_ht6560b; static int probe_ht6560b;

View file

@ -187,7 +187,8 @@ static const expansioncard_ops_t icside_ops_arcin_v6 = {
*/ */
static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode) static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
{ {
int cycle_time, use_dma_info = 0; unsigned long cycle_time;
int use_dma_info = 0;
switch (xfer_mode) { switch (xfer_mode) {
case XFER_MW_DMA_2: case XFER_MW_DMA_2:
@ -218,10 +219,11 @@ static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
if (use_dma_info && drive->id[ATA_ID_EIDE_DMA_TIME] > cycle_time) if (use_dma_info && drive->id[ATA_ID_EIDE_DMA_TIME] > cycle_time)
cycle_time = drive->id[ATA_ID_EIDE_DMA_TIME]; cycle_time = drive->id[ATA_ID_EIDE_DMA_TIME];
drive->drive_data = cycle_time; ide_set_drivedata(drive, (void *)cycle_time);
printk("%s: %s selected (peak %dMB/s)\n", drive->name, printk("%s: %s selected (peak %dMB/s)\n", drive->name,
ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data); ide_xfer_verbose(xfer_mode),
2000 / (unsigned long)ide_get_drivedata(drive));
} }
static const struct ide_port_ops icside_v6_port_ops = { static const struct ide_port_ops icside_v6_port_ops = {
@ -277,7 +279,7 @@ static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
/* /*
* Select the correct timing for this drive. * Select the correct timing for this drive.
*/ */
set_dma_speed(ec->dma, drive->drive_data); set_dma_speed(ec->dma, (unsigned long)ide_get_drivedata(drive));
/* /*
* Tell the DMA engine about the SG table and * Tell the DMA engine about the SG table and

View file

@ -138,6 +138,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
ide_hwif_t *hwif = drive->hwif; ide_hwif_t *hwif = drive->hwif;
ide_drive_t *pair = ide_get_pair_dev(drive); ide_drive_t *pair = ide_get_pair_dev(drive);
unsigned long flags; unsigned long flags;
unsigned long mode = XFER_PIO_0 + pio, pair_mode;
u8 tim, misc, addr_pio = pio, clk; u8 tim, misc, addr_pio = pio, clk;
/* DRDY is default 2 (by OPTi Databook) */ /* DRDY is default 2 (by OPTi Databook) */
@ -150,11 +151,12 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
{ 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */ { 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */
}; };
drive->drive_data = XFER_PIO_0 + pio; ide_set_drivedata(drive, (void *)mode);
if (pair) { if (pair) {
if (pair->drive_data && pair->drive_data < drive->drive_data) pair_mode = (unsigned long)ide_get_drivedata(pair);
addr_pio = pair->drive_data - XFER_PIO_0; if (pair_mode && pair_mode < mode)
addr_pio = pair_mode - XFER_PIO_0;
} }
spin_lock_irqsave(&opti621_lock, flags); spin_lock_irqsave(&opti621_lock, flags);

View file

@ -180,8 +180,11 @@ static int qd_find_disk_type (ide_drive_t *drive,
static void qd_set_timing (ide_drive_t *drive, u8 timing) static void qd_set_timing (ide_drive_t *drive, u8 timing)
{ {
drive->drive_data &= 0xff00; unsigned long data = (unsigned long)ide_get_drivedata(drive);
drive->drive_data |= timing;
data &= 0xff00;
data |= timing;
ide_set_drivedata(drive, (void *)data);
printk(KERN_DEBUG "%s: %#x\n", drive->name, timing); printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
} }
@ -292,7 +295,7 @@ static void __init qd6500_init_dev(ide_drive_t *drive)
u8 base = (hwif->config_data & 0xff00) >> 8; u8 base = (hwif->config_data & 0xff00) >> 8;
u8 config = QD_CONFIG(hwif); u8 config = QD_CONFIG(hwif);
drive->drive_data = QD6500_DEF_DATA; ide_set_drivedata(drive, (void *)QD6500_DEF_DATA);
} }
static void __init qd6580_init_dev(ide_drive_t *drive) static void __init qd6580_init_dev(ide_drive_t *drive)
@ -308,7 +311,7 @@ static void __init qd6580_init_dev(ide_drive_t *drive)
} else } else
t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA; t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
drive->drive_data = (drive->dn & 1) ? t2 : t1; ide_set_drivedata(drive, (void *)((drive->dn & 1) ? t2 : t1));
} }
static const struct ide_tp_ops qd65xx_tp_ops = { static const struct ide_tp_ops qd65xx_tp_ops = {

View file

@ -31,8 +31,15 @@
#define QD_CONFIG(hwif) ((hwif)->config_data & 0x00ff) #define QD_CONFIG(hwif) ((hwif)->config_data & 0x00ff)
#define QD_TIMING(drive) (u8)(((drive)->drive_data) & 0x00ff) static inline u8 QD_TIMING(ide_drive_t *drive)
#define QD_TIMREG(drive) (u8)((((drive)->drive_data) & 0xff00) >> 8) {
return (unsigned long)ide_get_drivedata(drive) & 0x00ff;
}
static inline u8 QD_TIMREG(ide_drive_t *drive)
{
return ((unsigned long)ide_get_drivedata(drive) & 0xff00) >> 8;
}
#define QD6500_DEF_DATA ((QD_TIM1_PORT<<8) | (QD_ID3 ? 0x0c : 0x08)) #define QD6500_DEF_DATA ((QD_TIM1_PORT<<8) | (QD_ID3 ? 0x0c : 0x08))
#define QD6580_DEF_DATA ((QD_TIM1_PORT<<8) | (QD_ID3 ? 0x0a : 0x00)) #define QD6580_DEF_DATA ((QD_TIM1_PORT<<8) | (QD_ID3 ? 0x0a : 0x00))

View file

@ -73,6 +73,7 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio) static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
{ {
struct pci_dev *dev = to_pci_dev(drive->hwif->dev); struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
int reg = 0x44 + drive->dn * 4; int reg = 0x44 + drive->dn * 4;
u16 drv_ctrl; u16 drv_ctrl;
@ -82,8 +83,9 @@ static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
* Store the PIO timings so that we can restore them * Store the PIO timings so that we can restore them
* in case DMA will be turned off... * in case DMA will be turned off...
*/ */
drive->drive_data &= 0xffff0000; timings &= 0xffff0000;
drive->drive_data |= drv_ctrl; timings |= drv_ctrl;
ide_set_drivedata(drive, (void *)timings);
pci_write_config_word(dev, reg, drv_ctrl); pci_write_config_word(dev, reg, drv_ctrl);
pci_read_config_word (dev, reg, &drv_ctrl); pci_read_config_word (dev, reg, &drv_ctrl);
@ -99,6 +101,7 @@ static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed) static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
{ {
static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200}; static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
unsigned long timings = (unsigned long)ide_get_drivedata(drive);
u16 drv_ctrl; u16 drv_ctrl;
DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n", DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
@ -110,8 +113,9 @@ static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
* Store the DMA timings so that we can actually program * Store the DMA timings so that we can actually program
* them when DMA will be turned on... * them when DMA will be turned on...
*/ */
drive->drive_data &= 0x0000ffff; timings &= 0x0000ffff;
drive->drive_data |= (unsigned long)drv_ctrl << 16; timings |= (unsigned long)drv_ctrl << 16;
ide_set_drivedata(drive, (void *)timings);
} }
static int sl82c105_test_irq(ide_hwif_t *hwif) static int sl82c105_test_irq(ide_hwif_t *hwif)
@ -194,7 +198,8 @@ static void sl82c105_dma_start(ide_drive_t *drive)
DBG(("%s(drive:%s)\n", __func__, drive->name)); DBG(("%s(drive:%s)\n", __func__, drive->name));
pci_write_config_word(dev, reg, drive->drive_data >> 16); pci_write_config_word(dev, reg,
(unsigned long)ide_get_drivedata(drive) >> 16);
sl82c105_reset_host(dev); sl82c105_reset_host(dev);
ide_dma_start(drive); ide_dma_start(drive);
@ -219,7 +224,8 @@ static int sl82c105_dma_end(ide_drive_t *drive)
ret = ide_dma_end(drive); ret = ide_dma_end(drive);
pci_write_config_word(dev, reg, drive->drive_data); pci_write_config_word(dev, reg,
(unsigned long)ide_get_drivedata(drive));
return ret; return ret;
} }

View file

@ -532,7 +532,7 @@ struct ide_drive_s {
unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
unsigned int cyl; /* "real" number of cyls */ unsigned int cyl; /* "real" number of cyls */
unsigned int drive_data; /* used by set_pio_mode/dev_select() */ void *drive_data; /* used by set_pio_mode/dev_select() */
unsigned int failures; /* current failure count */ unsigned int failures; /* current failure count */
unsigned int max_failures; /* maximum allowed failure count */ unsigned int max_failures; /* maximum allowed failure count */
u64 probed_capacity;/* initial/native media capacity */ u64 probed_capacity;/* initial/native media capacity */
@ -1550,6 +1550,16 @@ static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL; return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
} }
static inline void *ide_get_drivedata(ide_drive_t *drive)
{
return drive->drive_data;
}
static inline void ide_set_drivedata(ide_drive_t *drive, void *data)
{
drive->drive_data = data;
}
#define ide_port_for_each_dev(i, dev, port) \ #define ide_port_for_each_dev(i, dev, port) \
for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)