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i2c-omap: OMAP3: Fix I2C lockup during timeout/error cases
Current OMAP3 I2C driver code does not follow the correct sequence for soft reset. Due to this, lock up issues are reported during timeout/error cases. This patch fixes above issue by disabling I2C controller as per OMAP3430 TRM for soft reset. As per TRM, I2C controller needs to be disabled as a first step during soft reset. Here is correct soft reset sequence: a. Ensure that the module is disabled (clear the I2Ci.I2C_CON[15] I2C_EN bit to 0). b. Set the I2Ci.I2C_SYSC[1] SRST bit to 1. c. Enable the module by setting I2Ci.I2C_CON[15] I2C_EN bit to 1. d. Check the I2Ci.I2C_SYSS[0] RDONE bit until it is set to 1 to indicate the software reset is complete. Tested on Zoom2, Zoom3, 3430SDP and 3630SDP Signed-off-by: Manjunatha GK <manjugk@ti.com> Signed-off-by: George, Harith<harith@ti.com> Acked-by: Varadarajan, Charu Latha<charu@ti.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -286,6 +286,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
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unsigned long internal_clk = 0;
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unsigned long internal_clk = 0;
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if (dev->rev >= OMAP_I2C_REV_2) {
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if (dev->rev >= OMAP_I2C_REV_2) {
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/* Disable I2C controller before soft reset */
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omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
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omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) &
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~(OMAP_I2C_CON_EN));
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omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK);
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omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK);
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/* For some reason we need to set the EN bit before the
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/* For some reason we need to set the EN bit before the
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* reset done bit gets set. */
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* reset done bit gets set. */
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