mirror of
https://github.com/adulau/aha.git
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Merge branch 'pm-upstream/debug' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into for-next
This commit is contained in:
Tony Lindgren
commit
5567fa1f54
9 changed files with 607 additions and 15 deletions
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@ -1043,5 +1043,7 @@ void omap2_clk_disable_unused(struct clk *clk)
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omap2_clk_disable(clk);
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} else
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_omap2_clk_disable(clk);
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if (clk->clkdm != NULL)
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pwrdm_clkdm_state_switch(clk->clkdm);
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}
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#endif
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@ -299,7 +299,8 @@ struct clockdomain *clkdm_lookup(const char *name)
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* anything else to indicate failure; or -EINVAL if the function pointer
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* is null.
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*/
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int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
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int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
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void *user)
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{
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struct clockdomain *clkdm;
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int ret = 0;
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@ -309,7 +310,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
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mutex_lock(&clkdm_mutex);
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list_for_each_entry(clkdm, &clkdm_list, node) {
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ret = (*fn)(clkdm);
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ret = (*fn)(clkdm, user);
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if (ret)
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break;
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}
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@ -484,6 +485,8 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
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v << __ffs(clkdm->clktrctrl_mask),
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clkdm->pwrdm.ptr->prcm_offs,
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CM_CLKSTCTRL);
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pwrdm_clkdm_state_switch(clkdm);
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}
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/**
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@ -572,6 +575,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
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omap2_clkdm_wakeup(clkdm);
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pwrdm_wait_transition(clkdm->pwrdm.ptr);
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pwrdm_clkdm_state_switch(clkdm);
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return 0;
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}
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@ -624,6 +628,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
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else
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omap2_clkdm_sleep(clkdm);
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pwrdm_clkdm_state_switch(clkdm);
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return 0;
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}
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@ -20,13 +20,16 @@
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*/
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#include <linux/kernel.h>
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#include <linux/timer.h>
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#include <linux/sched.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <mach/clock.h>
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#include <mach/board.h>
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#include <mach/powerdomain.h>
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#include <mach/clockdomain.h>
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#include "prm.h"
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#include "cm.h"
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@ -50,6 +53,8 @@ int omap2_pm_debug;
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regs[reg_count].name = #reg; \
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regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off)))
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static int __init pm_dbg_init(void);
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void omap2_pm_dump(int mode, int resume, unsigned int us)
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{
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struct reg {
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@ -150,3 +155,425 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
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for (i = 0; i < reg_count; i++)
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printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
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}
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#ifdef CONFIG_DEBUG_FS
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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static void pm_dbg_regset_store(u32 *ptr);
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struct dentry *pm_dbg_dir;
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static int pm_dbg_init_done;
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enum {
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DEBUG_FILE_COUNTERS = 0,
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DEBUG_FILE_TIMERS,
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};
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struct pm_module_def {
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char name[8]; /* Name of the module */
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short type; /* CM or PRM */
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unsigned short offset;
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int low; /* First register address on this module */
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int high; /* Last register address on this module */
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};
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#define MOD_CM 0
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#define MOD_PRM 1
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static const struct pm_module_def *pm_dbg_reg_modules;
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static const struct pm_module_def omap3_pm_reg_modules[] = {
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{ "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
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{ "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
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{ "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
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{ "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
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{ "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
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{ "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
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{ "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
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{ "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
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{ "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
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{ "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
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{ "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
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{ "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
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{ "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
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{ "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
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{ "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
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{ "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
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{ "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
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{ "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
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{ "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
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{ "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
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{ "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
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{ "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
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{ "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
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{ "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
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{ "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
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{ "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
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{ "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
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{ "", 0, 0, 0, 0 },
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};
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#define PM_DBG_MAX_REG_SETS 4
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static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
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static int pm_dbg_get_regset_size(void)
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{
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static int regset_size;
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if (regset_size == 0) {
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int i = 0;
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while (pm_dbg_reg_modules[i].name[0] != 0) {
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regset_size += pm_dbg_reg_modules[i].high +
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4 - pm_dbg_reg_modules[i].low;
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i++;
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}
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}
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return regset_size;
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}
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static int pm_dbg_show_regs(struct seq_file *s, void *unused)
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{
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int i, j;
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unsigned long val;
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int reg_set = (int)s->private;
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u32 *ptr;
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void *store = NULL;
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int regs;
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int linefeed;
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if (reg_set == 0) {
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store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
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ptr = store;
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pm_dbg_regset_store(ptr);
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} else {
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ptr = pm_dbg_reg_set[reg_set - 1];
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}
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i = 0;
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while (pm_dbg_reg_modules[i].name[0] != 0) {
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regs = 0;
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linefeed = 0;
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if (pm_dbg_reg_modules[i].type == MOD_CM)
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seq_printf(s, "MOD: CM_%s (%08x)\n",
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pm_dbg_reg_modules[i].name,
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(u32)(OMAP3430_CM_BASE +
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pm_dbg_reg_modules[i].offset));
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else
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seq_printf(s, "MOD: PRM_%s (%08x)\n",
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pm_dbg_reg_modules[i].name,
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(u32)(OMAP3430_PRM_BASE +
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pm_dbg_reg_modules[i].offset));
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for (j = pm_dbg_reg_modules[i].low;
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j <= pm_dbg_reg_modules[i].high; j += 4) {
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val = *(ptr++);
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if (val != 0) {
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regs++;
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if (linefeed) {
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seq_printf(s, "\n");
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linefeed = 0;
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}
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seq_printf(s, " %02x => %08lx", j, val);
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if (regs % 4 == 0)
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linefeed = 1;
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}
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}
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seq_printf(s, "\n");
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i++;
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}
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if (store != NULL)
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kfree(store);
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return 0;
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}
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static void pm_dbg_regset_store(u32 *ptr)
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{
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int i, j;
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u32 val;
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i = 0;
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while (pm_dbg_reg_modules[i].name[0] != 0) {
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for (j = pm_dbg_reg_modules[i].low;
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j <= pm_dbg_reg_modules[i].high; j += 4) {
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if (pm_dbg_reg_modules[i].type == MOD_CM)
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val = cm_read_mod_reg(
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pm_dbg_reg_modules[i].offset, j);
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else
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val = prm_read_mod_reg(
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pm_dbg_reg_modules[i].offset, j);
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*(ptr++) = val;
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}
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i++;
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}
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}
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int pm_dbg_regset_save(int reg_set)
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{
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if (pm_dbg_reg_set[reg_set-1] == NULL)
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return -EINVAL;
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pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);
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return 0;
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}
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static const char pwrdm_state_names[][4] = {
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"OFF",
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"RET",
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"INA",
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"ON"
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};
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void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
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{
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s64 t;
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if (!pm_dbg_init_done)
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return ;
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/* Update timer for previous state */
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t = sched_clock();
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pwrdm->state_timer[prev] += t - pwrdm->timer;
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pwrdm->timer = t;
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}
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static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
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{
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struct seq_file *s = (struct seq_file *)user;
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if (strcmp(clkdm->name, "emu_clkdm") == 0 ||
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strcmp(clkdm->name, "wkup_clkdm") == 0 ||
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strncmp(clkdm->name, "dpll", 4) == 0)
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return 0;
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seq_printf(s, "%s->%s (%d)", clkdm->name,
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clkdm->pwrdm.ptr->name,
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atomic_read(&clkdm->usecount));
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seq_printf(s, "\n");
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return 0;
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}
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static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
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{
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struct seq_file *s = (struct seq_file *)user;
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int i;
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if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
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strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
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strncmp(pwrdm->name, "dpll", 4) == 0)
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return 0;
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if (pwrdm->state != pwrdm_read_pwrst(pwrdm))
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printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n",
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pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm));
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seq_printf(s, "%s (%s)", pwrdm->name,
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pwrdm_state_names[pwrdm->state]);
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for (i = 0; i < 4; i++)
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seq_printf(s, ",%s:%d", pwrdm_state_names[i],
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pwrdm->state_counter[i]);
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seq_printf(s, "\n");
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return 0;
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}
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static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user)
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{
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struct seq_file *s = (struct seq_file *)user;
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int i;
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if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
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strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
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strncmp(pwrdm->name, "dpll", 4) == 0)
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return 0;
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pwrdm_state_switch(pwrdm);
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seq_printf(s, "%s (%s)", pwrdm->name,
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pwrdm_state_names[pwrdm->state]);
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for (i = 0; i < 4; i++)
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seq_printf(s, ",%s:%lld", pwrdm_state_names[i],
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pwrdm->state_timer[i]);
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seq_printf(s, "\n");
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return 0;
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}
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static int pm_dbg_show_counters(struct seq_file *s, void *unused)
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{
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pwrdm_for_each(pwrdm_dbg_show_counter, s);
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clkdm_for_each(clkdm_dbg_show_counter, s);
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return 0;
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}
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static int pm_dbg_show_timers(struct seq_file *s, void *unused)
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{
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pwrdm_for_each(pwrdm_dbg_show_timer, s);
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return 0;
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}
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static int pm_dbg_open(struct inode *inode, struct file *file)
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{
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switch ((int)inode->i_private) {
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case DEBUG_FILE_COUNTERS:
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return single_open(file, pm_dbg_show_counters,
|
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&inode->i_private);
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case DEBUG_FILE_TIMERS:
|
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default:
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return single_open(file, pm_dbg_show_timers,
|
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&inode->i_private);
|
||||
};
|
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}
|
||||
|
||||
static int pm_dbg_reg_open(struct inode *inode, struct file *file)
|
||||
{
|
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return single_open(file, pm_dbg_show_regs, inode->i_private);
|
||||
}
|
||||
|
||||
static const struct file_operations debug_fops = {
|
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.open = pm_dbg_open,
|
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.read = seq_read,
|
||||
.llseek = seq_lseek,
|
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.release = single_release,
|
||||
};
|
||||
|
||||
static const struct file_operations debug_reg_fops = {
|
||||
.open = pm_dbg_reg_open,
|
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.read = seq_read,
|
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.llseek = seq_lseek,
|
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.release = single_release,
|
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};
|
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|
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int pm_dbg_regset_init(int reg_set)
|
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{
|
||||
char name[2];
|
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|
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if (!pm_dbg_init_done)
|
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pm_dbg_init();
|
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|
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if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS ||
|
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pm_dbg_reg_set[reg_set-1] != NULL)
|
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return -EINVAL;
|
||||
|
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pm_dbg_reg_set[reg_set-1] =
|
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kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
|
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|
||||
if (pm_dbg_reg_set[reg_set-1] == NULL)
|
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return -ENOMEM;
|
||||
|
||||
if (pm_dbg_dir != NULL) {
|
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sprintf(name, "%d", reg_set);
|
||||
|
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(void) debugfs_create_file(name, S_IRUGO,
|
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pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
|
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}
|
||||
|
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return 0;
|
||||
}
|
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|
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static int pwrdm_suspend_get(void *data, u64 *val)
|
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{
|
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*val = omap3_pm_get_suspend_state((struct powerdomain *)data);
|
||||
|
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if (*val >= 0)
|
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return 0;
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return *val;
|
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}
|
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|
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static int pwrdm_suspend_set(void *data, u64 val)
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{
|
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return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val);
|
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}
|
||||
|
||||
DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get,
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pwrdm_suspend_set, "%llu\n");
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|
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static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir)
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{
|
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int i;
|
||||
s64 t;
|
||||
struct dentry *d;
|
||||
|
||||
t = sched_clock();
|
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|
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for (i = 0; i < 4; i++)
|
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pwrdm->state_timer[i] = 0;
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|
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pwrdm->timer = t;
|
||||
|
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if (strncmp(pwrdm->name, "dpll", 4) == 0)
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return 0;
|
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|
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d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir);
|
||||
|
||||
(void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d,
|
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(void *)pwrdm, &pwrdm_suspend_fops);
|
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return 0;
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}
|
||||
|
||||
static int __init pm_dbg_init(void)
|
||||
{
|
||||
int i;
|
||||
struct dentry *d;
|
||||
char name[2];
|
||||
|
||||
if (pm_dbg_init_done)
|
||||
return 0;
|
||||
|
||||
if (cpu_is_omap34xx())
|
||||
pm_dbg_reg_modules = omap3_pm_reg_modules;
|
||||
else {
|
||||
printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
d = debugfs_create_dir("pm_debug", NULL);
|
||||
if (IS_ERR(d))
|
||||
return PTR_ERR(d);
|
||||
|
||||
(void) debugfs_create_file("count", S_IRUGO,
|
||||
d, (void *)DEBUG_FILE_COUNTERS, &debug_fops);
|
||||
(void) debugfs_create_file("time", S_IRUGO,
|
||||
d, (void *)DEBUG_FILE_TIMERS, &debug_fops);
|
||||
|
||||
pwrdm_for_each(pwrdms_setup, (void *)d);
|
||||
|
||||
pm_dbg_dir = debugfs_create_dir("registers", d);
|
||||
if (IS_ERR(pm_dbg_dir))
|
||||
return PTR_ERR(pm_dbg_dir);
|
||||
|
||||
(void) debugfs_create_file("current", S_IRUGO,
|
||||
pm_dbg_dir, (void *)0, &debug_reg_fops);
|
||||
|
||||
for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
|
||||
if (pm_dbg_reg_set[i] != NULL) {
|
||||
sprintf(name, "%d", i+1);
|
||||
(void) debugfs_create_file(name, S_IRUGO,
|
||||
pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
|
||||
|
||||
}
|
||||
|
||||
pm_dbg_init_done = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(pm_dbg_init);
|
||||
|
||||
#else
|
||||
void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -11,12 +11,23 @@
|
|||
#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
|
||||
#define __ARCH_ARM_MACH_OMAP2_PM_H
|
||||
|
||||
#include <mach/powerdomain.h>
|
||||
|
||||
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
|
||||
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
|
||||
|
||||
#ifdef CONFIG_PM_DEBUG
|
||||
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
|
||||
extern int omap2_pm_debug;
|
||||
extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
|
||||
extern int pm_dbg_regset_save(int reg_set);
|
||||
extern int pm_dbg_regset_init(int reg_set);
|
||||
#else
|
||||
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
#define omap2_pm_debug 0
|
||||
#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
|
||||
#define pm_dbg_regset_save(reg_set) do {} while (0);
|
||||
#define pm_dbg_regset_init(reg_set) do {} while (0);
|
||||
#endif /* CONFIG_PM_DEBUG */
|
||||
|
||||
extern void omap24xx_idle_loop_suspend(void);
|
||||
|
|
|
|||
|
|
@ -333,7 +333,7 @@ static struct platform_suspend_ops omap_pm_ops = {
|
|||
.valid = suspend_valid_only_mem,
|
||||
};
|
||||
|
||||
static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm)
|
||||
static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm, void *unused)
|
||||
{
|
||||
omap2_clkdm_allow_idle(clkdm);
|
||||
return 0;
|
||||
|
|
@ -385,7 +385,7 @@ static void __init prcm_setup_regs(void)
|
|||
omap2_clkdm_sleep(gfx_clkdm);
|
||||
|
||||
/* Enable clockdomain hardware-supervised control for all clkdms */
|
||||
clkdm_for_each(_pm_clkdm_enable_hwsup);
|
||||
clkdm_for_each(_pm_clkdm_enable_hwsup, NULL);
|
||||
|
||||
/* Enable clock autoidle for all domains */
|
||||
cm_write_mod_reg(OMAP24XX_AUTO_CAM |
|
||||
|
|
|
|||
|
|
@ -170,6 +170,8 @@ static void omap_sram_idle(void)
|
|||
printk(KERN_ERR "Invalid mpu state in sram_idle\n");
|
||||
return;
|
||||
}
|
||||
pwrdm_pre_transition();
|
||||
|
||||
omap2_gpio_prepare_for_retention();
|
||||
omap_uart_prepare_idle(0);
|
||||
omap_uart_prepare_idle(1);
|
||||
|
|
@ -182,6 +184,9 @@ static void omap_sram_idle(void)
|
|||
omap_uart_resume_idle(1);
|
||||
omap_uart_resume_idle(0);
|
||||
omap2_gpio_resume_after_retention();
|
||||
|
||||
pwrdm_post_transition();
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -271,6 +276,7 @@ static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
|
|||
if (sleep_switch) {
|
||||
omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
|
||||
pwrdm_wait_transition(pwrdm);
|
||||
pwrdm_state_switch(pwrdm);
|
||||
}
|
||||
|
||||
err:
|
||||
|
|
@ -658,7 +664,31 @@ static void __init prcm_setup_regs(void)
|
|||
omap3_d2d_idle();
|
||||
}
|
||||
|
||||
static int __init pwrdms_setup(struct powerdomain *pwrdm)
|
||||
int omap3_pm_get_suspend_state(struct powerdomain *pwrdm)
|
||||
{
|
||||
struct power_state *pwrst;
|
||||
|
||||
list_for_each_entry(pwrst, &pwrst_list, node) {
|
||||
if (pwrst->pwrdm == pwrdm)
|
||||
return pwrst->next_state;
|
||||
}
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state)
|
||||
{
|
||||
struct power_state *pwrst;
|
||||
|
||||
list_for_each_entry(pwrst, &pwrst_list, node) {
|
||||
if (pwrst->pwrdm == pwrdm) {
|
||||
pwrst->next_state = state;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
|
||||
{
|
||||
struct power_state *pwrst;
|
||||
|
||||
|
|
@ -683,7 +713,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
|
|||
* supported. Initiate sleep transition for other clockdomains, if
|
||||
* they are not used
|
||||
*/
|
||||
static int __init clkdms_setup(struct clockdomain *clkdm)
|
||||
static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
|
||||
{
|
||||
if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
|
||||
omap2_clkdm_allow_idle(clkdm);
|
||||
|
|
@ -716,13 +746,13 @@ static int __init omap3_pm_init(void)
|
|||
goto err1;
|
||||
}
|
||||
|
||||
ret = pwrdm_for_each(pwrdms_setup);
|
||||
ret = pwrdm_for_each(pwrdms_setup, NULL);
|
||||
if (ret) {
|
||||
printk(KERN_ERR "Failed to setup powerdomains\n");
|
||||
goto err2;
|
||||
}
|
||||
|
||||
(void) clkdm_for_each(clkdms_setup);
|
||||
(void) clkdm_for_each(clkdms_setup, NULL);
|
||||
|
||||
mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
|
||||
if (mpu_pwrdm == NULL) {
|
||||
|
|
|
|||
|
|
@ -35,6 +35,13 @@
|
|||
#include <mach/powerdomain.h>
|
||||
#include <mach/clockdomain.h>
|
||||
|
||||
#include "pm.h"
|
||||
|
||||
enum {
|
||||
PWRDM_STATE_NOW = 0,
|
||||
PWRDM_STATE_PREV,
|
||||
};
|
||||
|
||||
/* pwrdm_list contains all registered struct powerdomains */
|
||||
static LIST_HEAD(pwrdm_list);
|
||||
|
||||
|
|
@ -102,6 +109,65 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
|
|||
return pd->pwrdm;
|
||||
}
|
||||
|
||||
static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
|
||||
{
|
||||
|
||||
int prev;
|
||||
int state;
|
||||
|
||||
if (pwrdm == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
state = pwrdm_read_pwrst(pwrdm);
|
||||
|
||||
switch (flag) {
|
||||
case PWRDM_STATE_NOW:
|
||||
prev = pwrdm->state;
|
||||
break;
|
||||
case PWRDM_STATE_PREV:
|
||||
prev = pwrdm_read_prev_pwrst(pwrdm);
|
||||
if (pwrdm->state != prev)
|
||||
pwrdm->state_counter[prev]++;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (state != prev)
|
||||
pwrdm->state_counter[state]++;
|
||||
|
||||
pm_dbg_update_time(pwrdm, prev);
|
||||
|
||||
pwrdm->state = state;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
|
||||
{
|
||||
pwrdm_clear_all_prev_pwrst(pwrdm);
|
||||
_pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
|
||||
{
|
||||
_pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static __init void _pwrdm_setup(struct powerdomain *pwrdm)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
pwrdm->state_counter[i] = 0;
|
||||
|
||||
pwrdm_wait_transition(pwrdm);
|
||||
pwrdm->state = pwrdm_read_pwrst(pwrdm);
|
||||
pwrdm->state_counter[pwrdm->state] = 1;
|
||||
|
||||
}
|
||||
|
||||
/* Public functions */
|
||||
|
||||
|
|
@ -117,9 +183,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
|
|||
{
|
||||
struct powerdomain **p = NULL;
|
||||
|
||||
if (pwrdm_list)
|
||||
for (p = pwrdm_list; *p; p++)
|
||||
if (pwrdm_list) {
|
||||
for (p = pwrdm_list; *p; p++) {
|
||||
pwrdm_register(*p);
|
||||
_pwrdm_setup(*p);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -217,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name)
|
|||
* anything else to indicate failure; or -EINVAL if the function
|
||||
* pointer is null.
|
||||
*/
|
||||
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
|
||||
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
|
||||
void *user)
|
||||
{
|
||||
struct powerdomain *temp_pwrdm;
|
||||
unsigned long flags;
|
||||
|
|
@ -228,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
|
|||
|
||||
read_lock_irqsave(&pwrdm_rwlock, flags);
|
||||
list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
|
||||
ret = (*fn)(temp_pwrdm);
|
||||
ret = (*fn)(temp_pwrdm, user);
|
||||
if (ret)
|
||||
break;
|
||||
}
|
||||
|
|
@ -1110,4 +1180,36 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int pwrdm_state_switch(struct powerdomain *pwrdm)
|
||||
{
|
||||
return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
|
||||
}
|
||||
|
||||
int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
|
||||
{
|
||||
if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) {
|
||||
pwrdm_wait_transition(clkdm->pwrdm.ptr);
|
||||
return pwrdm_state_switch(clkdm->pwrdm.ptr);
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
int pwrdm_clk_state_switch(struct clk *clk)
|
||||
{
|
||||
if (clk != NULL && clk->clkdm != NULL)
|
||||
return pwrdm_clkdm_state_switch(clk->clkdm);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
int pwrdm_pre_transition(void)
|
||||
{
|
||||
pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int pwrdm_post_transition(void)
|
||||
{
|
||||
pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -95,7 +95,8 @@ int clkdm_register(struct clockdomain *clkdm);
|
|||
int clkdm_unregister(struct clockdomain *clkdm);
|
||||
struct clockdomain *clkdm_lookup(const char *name);
|
||||
|
||||
int clkdm_for_each(int (*fn)(struct clockdomain *clkdm));
|
||||
int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
|
||||
void *user);
|
||||
struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
|
||||
|
||||
void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
|
||||
|
|
|
|||
|
|
@ -117,6 +117,13 @@ struct powerdomain {
|
|||
|
||||
struct list_head node;
|
||||
|
||||
int state;
|
||||
unsigned state_counter[4];
|
||||
|
||||
#ifdef CONFIG_PM_DEBUG
|
||||
s64 timer;
|
||||
s64 state_timer[4];
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -126,7 +133,8 @@ int pwrdm_register(struct powerdomain *pwrdm);
|
|||
int pwrdm_unregister(struct powerdomain *pwrdm);
|
||||
struct powerdomain *pwrdm_lookup(const char *name);
|
||||
|
||||
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
|
||||
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
|
||||
void *user);
|
||||
|
||||
int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
|
||||
int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
|
||||
|
|
@ -164,4 +172,9 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
|
|||
|
||||
int pwrdm_wait_transition(struct powerdomain *pwrdm);
|
||||
|
||||
int pwrdm_state_switch(struct powerdomain *pwrdm);
|
||||
int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
|
||||
int pwrdm_pre_transition(void);
|
||||
int pwrdm_post_transition(void);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue