adulau/aha
1
0
Fork 0
mirror of https://github.com/adulau/aha.git synced 2024-12-28 11:46:19 +00:00
Code Issues Projects Releases Packages Wiki Activity

twl4030-regulator: expose VPLL2

Browse source 
Add VPLL2 to the set of twl4030-family regulators exposed for
use by various drivers.  It's commonly used to power the digital
video outputs (e.g. LCD or DVI displays) on OMAP3 systems.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
This commit is contained in:
David Brownell 2009-03-13 17:54:54 -07:00 committed by Liam Girdwood
parent cd94b50530
commit 52914eaa49
2 changed files with 1 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/mfd/twl4030-core.c
View file

@ -592,11 +592,9 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features)
/* maybe add LDOs that are omitted on cost-reduced parts */
if (twl_has_regulator() && !(features & TPS_SUBSET)) {
/*
child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2);
if (IS_ERR(child))
return PTR_ERR(child);
*/
child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2);
if (IS_ERR(child))

2
drivers/regulator/twl4030-regulator.c
View file

@ -396,8 +396,8 @@ static struct twlreg_info twl4030_regs[] = {
TWL_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
/*
TWL_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
TWL_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
*/
TWL_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
TWL_ADJUSTABLE_LDO(VSIM, 0x37, 9),
TWL_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
/*