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sh: pci: Rework SH7780 host controller detection.
This reworks how the host controller is probed, and makes it a bit more verbose in the event a new type of controller is detected. Additionally, we also log the revision information. This now uses the proper access sizes for the vendor/device registers, rather than relying on a larger access that encapsulated both of them. Not all devices support 32-bit read cycles for these registers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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0bbc9bc318
commit
4e7b7fdb12
2 changed files with 26 additions and 21 deletions
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@ -34,33 +34,39 @@
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int __init sh7780_pci_init(struct pci_channel *chan)
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{
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unsigned int id;
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int ret, match = 0;
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const char *type = NULL;
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int ret;
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pr_debug("PCI: Starting intialization.\n");
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printk(KERN_NOTICE "PCI: Starting intialization.\n");
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chan->reg_base = 0xfe040000;
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chan->io_base = 0xfe200000;
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ctrl_outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */
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/* Enable CPU access to the PCIC registers. */
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__raw_writel(PCIECR_ENBL, PCIECR);
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/* check for SH7780/SH7780R hardware */
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id = pci_read_reg(chan, SH7780_PCIVID);
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if ((id & 0xffff) == SH7780_VENDOR_ID) {
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switch ((id >> 16) & 0xffff) {
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case SH7763_DEVICE_ID:
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case SH7780_DEVICE_ID:
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case SH7781_DEVICE_ID:
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case SH7785_DEVICE_ID:
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match = 1;
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break;
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}
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}
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if (unlikely(!match)) {
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printk(KERN_ERR "PCI: This is not an SH7780 (%x)\n", id);
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id = __raw_readw(chan->reg_base + SH7780_PCIVID);
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if (id != SH7780_VENDOR_ID) {
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printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id);
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return -ENODEV;
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}
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id = __raw_readw(chan->reg_base + SH7780_PCIDID);
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type = (id == SH7763_DEVICE_ID) ? "SH7763" :
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(id == SH7780_DEVICE_ID) ? "SH7780" :
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(id == SH7781_DEVICE_ID) ? "SH7781" :
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(id == SH7785_DEVICE_ID) ? "SH7785" :
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NULL;
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if (unlikely(!type)) {
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printk(KERN_ERR "PCI: Found an unsupported Renesas host "
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"controller, device id 0x%04x.\n", id);
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return -EINVAL;
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}
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printk(KERN_NOTICE "PCI: Found a Renesas %s host "
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"controller, revision %d.\n", type,
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__raw_readb(chan->reg_base + SH7780_PCIRID));
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if ((ret = sh4_pci_check_direct(chan)) != 0)
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return ret;
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@ -20,9 +20,8 @@
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#define SH7785_DEVICE_ID 0x0007
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/* SH7780 Control Registers */
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#define SH7780_PCI_VCR0 0xFE000000
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#define SH7780_PCI_VCR1 0xFE000004
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#define SH7780_PCI_VCR2 0xFE000008
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#define PCIECR 0xFE000008
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#define PCIECR_ENBL 0x01
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/* SH7780 Specific Values */
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#define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */
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