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Staging: et131x: extract the eeprom setup logic from initpci
This puts all the eeprom handling in one place and cleans up the interfaces Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Alan Cox
Greg Kroah-Hartman
parent
b802ce0c70
commit
4e02b4b57d
3 changed files with 73 additions and 72 deletions
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@ -132,7 +132,7 @@ static int eeprom_wait_ready(struct pci_dev *pdev, u32 *status)
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*
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* Returns 1 for a successful write.
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*/
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int eeprom_write(struct et131x_adapter *etdev, u32 addr, u8 data)
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static int eeprom_write(struct et131x_adapter *etdev, u32 addr, u8 data)
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{
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struct pci_dev *pdev = etdev->pdev;
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int index = 0;
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@ -264,7 +264,7 @@ int eeprom_write(struct et131x_adapter *etdev, u32 addr, u8 data)
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*
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* Returns 1 for a successful read
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*/
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int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata)
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static int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata)
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{
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struct pci_dev *pdev = etdev->pdev;
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int err;
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@ -312,3 +312,72 @@ int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata)
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*/
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return (status & LBCIF_STATUS_ACK_ERROR) ? -EIO : 0;
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}
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int et131x_init_eeprom(struct et131x_adapter *etdev)
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{
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struct pci_dev *pdev = etdev->pdev;
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u8 eestatus;
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/* We first need to check the EEPROM Status code located at offset
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* 0xB2 of config space
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*/
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pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
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&eestatus);
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/* THIS IS A WORKAROUND:
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* I need to call this function twice to get my card in a
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* LG M1 Express Dual running. I tried also a msleep before this
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* function, because I thougth there could be some time condidions
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* but it didn't work. Call the whole function twice also work.
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*/
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if (pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, &eestatus)) {
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dev_err(&pdev->dev,
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"Could not read PCI config space for EEPROM Status\n");
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return -EIO;
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}
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/* Determine if the error(s) we care about are present. If they are
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* present we need to fail.
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*/
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if (eestatus & 0x4C) {
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int write_failed = 0;
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if (pdev->revision == 0x01) {
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int i;
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static const u8 eedata[4] = { 0xFE, 0x13, 0x10, 0xFF };
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/* Re-write the first 4 bytes if we have an eeprom
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* present and the revision id is 1, this fixes the
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* corruption seen with 1310 B Silicon
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*/
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for (i = 0; i < 3; i++)
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if (eeprom_write(etdev, i, eedata[i]) < 0)
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write_failed = 1;
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}
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if (pdev->revision != 0x01 || write_failed) {
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dev_err(&pdev->dev,
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"Fatal EEPROM Status Error - 0x%04x\n", eestatus);
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/* This error could mean that there was an error
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* reading the eeprom or that the eeprom doesn't exist.
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* We will treat each case the same and not try to gather
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* additional information that normally would come from the
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* eeprom, like MAC Address
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*/
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etdev->has_eeprom = 0;
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return -EIO;
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}
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}
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etdev->has_eeprom = 1;
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/* Read the EEPROM for information regarding LED behavior. Refer to
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* ET1310_phy.c, et131x_xcvr_init(), for its use.
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*/
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eeprom_read(etdev, 0x70, &etdev->eepromData[0]);
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eeprom_read(etdev, 0x71, &etdev->eepromData[1]);
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if (etdev->eepromData[0] != 0xcd)
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/* Disable all optional features */
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etdev->eepromData[1] = 0x00;
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return 0;
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}
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@ -98,9 +98,6 @@
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/* Forward declaration of the private adapter structure */
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struct et131x_adapter;
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int eeprom_write(struct et131x_adapter *adapter, u32 unAddress,
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u8 bData);
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int eeprom_read(struct et131x_adapter *adapter, u32 unAddress,
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u8 *pbData);
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int et131x_init_eeprom(struct et131x_adapter *etdev);
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#endif /* _ET1310_EEPROM_H_ */
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@ -140,10 +140,8 @@ MODULE_PARM_DESC(et131x_speed_set,
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int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
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{
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int result;
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uint8_t eepromStat;
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uint8_t maxPayload = 0;
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uint8_t read_size_reg;
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u8 rev;
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/* Allow disabling of Non-Maskable Interrupts in I/O space, to
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* support validation.
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@ -160,71 +158,8 @@ int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
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outb(ET1310_NMI_DISABLE, RegisterVal);
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}
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/* We first need to check the EEPROM Status code located at offset
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* 0xB2 of config space
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*/
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result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
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&eepromStat);
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/* THIS IS A WORKAROUND:
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* I need to call this function twice to get my card in a
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* LG M1 Express Dual running. I tried also a msleep before this
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* function, because I thougth there could be some time condidions
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* but it didn't work. Call the whole function twice also work.
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*/
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result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
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&eepromStat);
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if (result != PCIBIOS_SUCCESSFUL) {
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dev_err(&pdev->dev, "Could not read PCI config space for "
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"EEPROM Status\n");
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if (et131x_init_eeprom(adapter) < 0)
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return -EIO;
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}
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/* Determine if the error(s) we care about are present. If they are
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* present, we need to fail.
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*/
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if (eepromStat & 0x4C) {
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result = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
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if (result != PCIBIOS_SUCCESSFUL) {
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dev_err(&pdev->dev,
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"Could not read PCI config space for "
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"Revision ID\n");
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return -EIO;
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} else if (rev == 0x01) {
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int32_t nLoop;
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uint8_t temp[4] = { 0xFE, 0x13, 0x10, 0xFF };
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/* Re-write the first 4 bytes if we have an eeprom
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* present and the revision id is 1, this fixes the
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* corruption seen with 1310 B Silicon
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*/
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for (nLoop = 0; nLoop < 3; nLoop++) {
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eeprom_write(adapter, nLoop, temp[nLoop]);
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}
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}
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dev_err(&pdev->dev, "Fatal EEPROM Status Error - 0x%04x\n", eepromStat);
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/* This error could mean that there was an error reading the
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* eeprom or that the eeprom doesn't exist. We will treat
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* each case the same and not try to gather additional
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* information that normally would come from the eeprom, like
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* MAC Address
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*/
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adapter->has_eeprom = 0;
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return -EIO;
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} else
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adapter->has_eeprom = 1;
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/* Read the EEPROM for information regarding LED behavior. Refer to
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* ET1310_phy.c, et131x_xcvr_init(), for its use.
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*/
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eeprom_read(adapter, 0x70, &adapter->eepromData[0]);
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eeprom_read(adapter, 0x71, &adapter->eepromData[1]);
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if (adapter->eepromData[0] != 0xcd)
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/* Disable all optional features */
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adapter->eepromData[1] = 0x00;
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/* Let's set up the PORT LOGIC Register. First we need to know what
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* the max_payload_size is
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