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[IA64] pvops: paravirtualize entry.S
paravirtualize ia64_swtich_to, ia64_leave_syscall and ia64_leave_kernel. They include sensitive or performance critical privileged instructions so that they need paravirtualization. To paravirtualize them by single source and multi compile they are converted into indirect jump. And define each pv instances. Cc: Keith Owens <kaos@ocs.com.au> Cc: "Dong, Eddie" <eddie.dong@intel.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Isaku Yamahata
Tony Luck
parent
498c517047
commit
4df8d22bbb
6 changed files with 183 additions and 44 deletions
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@ -36,7 +36,7 @@ obj-$(CONFIG_PCI_MSI) += msi_ia64.o
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mca_recovery-y += mca_drv.o mca_drv_asm.o
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obj-$(CONFIG_IA64_MC_ERR_INJECT)+= err_inject.o
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obj-$(CONFIG_PARAVIRT) += paravirt.o
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obj-$(CONFIG_PARAVIRT) += paravirt.o paravirtentry.o
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obj-$(CONFIG_IA64_ESI) += esi.o
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ifneq ($(CONFIG_IA64_ESI),)
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@ -22,6 +22,11 @@
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* Patrick O'Rourke <orourke@missioncriticallinux.com>
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* 11/07/2000
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*/
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/*
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* Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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* pv_ops.
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*/
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/*
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* Global (preserved) predicate usage on syscall entry/exit path:
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*
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@ -45,6 +50,7 @@
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#include "minstate.h"
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#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
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/*
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* execve() is special because in case of success, we need to
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* setup a null register window frame.
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@ -173,6 +179,7 @@ GLOBAL_ENTRY(sys_clone)
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mov rp=loc0
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br.ret.sptk.many rp
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END(sys_clone)
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#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
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/*
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* prev_task <- ia64_switch_to(struct task_struct *next)
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@ -180,7 +187,7 @@ END(sys_clone)
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* called. The code starting at .map relies on this. The rest of the code
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* doesn't care about the interrupt masking status.
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*/
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GLOBAL_ENTRY(ia64_switch_to)
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GLOBAL_ENTRY(__paravirt_switch_to)
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.prologue
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alloc r16=ar.pfs,1,0,0,0
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DO_SAVE_SWITCH_STACK
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@ -204,7 +211,7 @@ GLOBAL_ENTRY(ia64_switch_to)
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;;
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.done:
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ld8 sp=[r21] // load kernel stack pointer of new task
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mov IA64_KR(CURRENT)=in0 // update "current" application register
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MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register
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mov r8=r13 // return pointer to previously running task
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mov r13=in0 // set "current" pointer
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;;
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@ -216,26 +223,25 @@ GLOBAL_ENTRY(ia64_switch_to)
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br.ret.sptk.many rp // boogie on out in new context
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.map:
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rsm psr.ic // interrupts (psr.i) are already disabled here
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RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
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movl r25=PAGE_KERNEL
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;;
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srlz.d
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or r23=r25,r20 // construct PA | page properties
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mov r25=IA64_GRANULE_SHIFT<<2
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;;
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mov cr.itir=r25
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mov cr.ifa=in0 // VA of next task...
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MOV_TO_ITIR(p0, r25, r8)
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MOV_TO_IFA(in0, r8) // VA of next task...
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;;
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mov r25=IA64_TR_CURRENT_STACK
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mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
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MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped...
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;;
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itr.d dtr[r25]=r23 // wire in new mapping...
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ssm psr.ic // reenable the psr.ic bit
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;;
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srlz.d
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SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit
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br.cond.sptk .done
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END(ia64_switch_to)
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END(__paravirt_switch_to)
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#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
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/*
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* Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
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* means that we may get an interrupt with "sp" pointing to the new kernel stack while
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@ -375,7 +381,7 @@ END(save_switch_stack)
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* - b7 holds address to return to
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* - must not touch r8-r11
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*/
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ENTRY(load_switch_stack)
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GLOBAL_ENTRY(load_switch_stack)
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.prologue
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.altrp b7
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@ -571,7 +577,7 @@ GLOBAL_ENTRY(ia64_trace_syscall)
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.ret3:
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(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
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(pUStk) rsm psr.i // disable interrupts
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br.cond.sptk .work_pending_syscall_end
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br.cond.sptk ia64_work_pending_syscall_end
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strace_error:
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ld8 r3=[r2] // load pt_regs.r8
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@ -636,8 +642,17 @@ GLOBAL_ENTRY(ia64_ret_from_syscall)
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adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
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mov r10=r0 // clear error indication in r10
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(p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
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#ifdef CONFIG_PARAVIRT
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;;
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br.cond.sptk.few ia64_leave_syscall
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;;
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#endif /* CONFIG_PARAVIRT */
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END(ia64_ret_from_syscall)
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#ifndef CONFIG_PARAVIRT
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// fall through
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#endif
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#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
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/*
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* ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
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* need to switch to bank 0 and doesn't restore the scratch registers.
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@ -682,7 +697,7 @@ END(ia64_ret_from_syscall)
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* ar.csd: cleared
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* ar.ssd: cleared
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*/
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ENTRY(ia64_leave_syscall)
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GLOBAL_ENTRY(__paravirt_leave_syscall)
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PT_REGS_UNWIND_INFO(0)
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/*
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* work.need_resched etc. mustn't get changed by this CPU before it returns to
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@ -692,11 +707,11 @@ ENTRY(ia64_leave_syscall)
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* extra work. We always check for extra work when returning to user-level.
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* With CONFIG_PREEMPT, we also check for extra work when the preempt_count
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* is 0. After extra work processing has been completed, execution
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* resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
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* resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
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* needs to be redone.
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*/
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#ifdef CONFIG_PREEMPT
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rsm psr.i // disable interrupts
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RSM_PSR_I(p0, r2, r18) // disable interrupts
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cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
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(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
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;;
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@ -706,11 +721,12 @@ ENTRY(ia64_leave_syscall)
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;;
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cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
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#else /* !CONFIG_PREEMPT */
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(pUStk) rsm psr.i
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RSM_PSR_I(pUStk, r2, r18)
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cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
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(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
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#endif
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.work_processed_syscall:
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.global __paravirt_work_processed_syscall;
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__paravirt_work_processed_syscall:
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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adds r2=PT(LOADRS)+16,r12
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(pUStk) mov.m r22=ar.itc // fetch time at leave
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@ -744,7 +760,7 @@ ENTRY(ia64_leave_syscall)
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(pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
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;;
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invala // M0|1 invalidate ALAT
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rsm psr.i | psr.ic // M2 turn off interrupts and interruption collection
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RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
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cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
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ld8 r29=[r2],16 // M0|1 load cr.ipsr
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@ -765,7 +781,7 @@ ENTRY(ia64_leave_syscall)
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;;
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#endif
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ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
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(pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
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MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
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nop 0
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;;
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ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
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@ -798,7 +814,7 @@ ENTRY(ia64_leave_syscall)
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srlz.d // M0 ensure interruption collection is off (for cover)
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shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
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cover // B add current frame into dirty partition & set cr.ifs
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COVER // B add current frame into dirty partition & set cr.ifs
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;;
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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mov r19=ar.bsp // M2 get new backing store pointer
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@ -823,8 +839,9 @@ ENTRY(ia64_leave_syscall)
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mov.m ar.ssd=r0 // M2 clear ar.ssd
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mov f11=f0 // F clear f11
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br.cond.sptk.many rbs_switch // B
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END(ia64_leave_syscall)
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END(__paravirt_leave_syscall)
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#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
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#ifdef CONFIG_IA32_SUPPORT
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GLOBAL_ENTRY(ia64_ret_from_ia32_execve)
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PT_REGS_UNWIND_INFO(0)
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@ -835,10 +852,20 @@ GLOBAL_ENTRY(ia64_ret_from_ia32_execve)
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st8.spill [r2]=r8 // store return value in slot for r8 and set unat bit
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.mem.offset 8,0
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st8.spill [r3]=r0 // clear error indication in slot for r10 and set unat bit
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#ifdef CONFIG_PARAVIRT
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;;
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// don't fall through, ia64_leave_kernel may be #define'd
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br.cond.sptk.few ia64_leave_kernel
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;;
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#endif /* CONFIG_PARAVIRT */
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END(ia64_ret_from_ia32_execve)
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#ifndef CONFIG_PARAVIRT
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// fall through
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#endif
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#endif /* CONFIG_IA32_SUPPORT */
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GLOBAL_ENTRY(ia64_leave_kernel)
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#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
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GLOBAL_ENTRY(__paravirt_leave_kernel)
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PT_REGS_UNWIND_INFO(0)
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/*
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* work.need_resched etc. mustn't get changed by this CPU before it returns to
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@ -852,7 +879,7 @@ GLOBAL_ENTRY(ia64_leave_kernel)
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* needs to be redone.
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*/
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#ifdef CONFIG_PREEMPT
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rsm psr.i // disable interrupts
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RSM_PSR_I(p0, r17, r31) // disable interrupts
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cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
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(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
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;;
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@ -862,7 +889,7 @@ GLOBAL_ENTRY(ia64_leave_kernel)
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;;
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cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
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#else
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(pUStk) rsm psr.i
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RSM_PSR_I(pUStk, r17, r31)
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cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
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(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
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#endif
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@ -910,7 +937,7 @@ GLOBAL_ENTRY(ia64_leave_kernel)
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mov ar.csd=r30
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mov ar.ssd=r31
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;;
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rsm psr.i | psr.ic // initiate turning off of interrupt and interruption collection
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RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
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invala // invalidate ALAT
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;;
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ld8.fill r22=[r2],24
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@ -942,7 +969,7 @@ GLOBAL_ENTRY(ia64_leave_kernel)
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mov ar.ccv=r15
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;;
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ldf.fill f11=[r2]
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bsw.0 // switch back to bank 0 (no stop bit required beforehand...)
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BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
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;;
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(pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
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adds r16=PT(CR_IPSR)+16,r12
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@ -950,12 +977,12 @@ GLOBAL_ENTRY(ia64_leave_kernel)
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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.pred.rel.mutex pUStk,pKStk
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(pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
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MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
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(pUStk) mov.m r22=ar.itc // M fetch time at leave
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nop.i 0
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;;
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#else
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(pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
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MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
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nop.i 0
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nop.i 0
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;;
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@ -1027,7 +1054,7 @@ GLOBAL_ENTRY(ia64_leave_kernel)
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* NOTE: alloc, loadrs, and cover can't be predicated.
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*/
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(pNonSys) br.cond.dpnt dont_preserve_current_frame
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cover // add current frame into dirty partition and set cr.ifs
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COVER // add current frame into dirty partition and set cr.ifs
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;;
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mov r19=ar.bsp // get new backing store pointer
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rbs_switch:
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@ -1130,16 +1157,16 @@ skip_rbs_switch:
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(pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
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(pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
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;;
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mov cr.ipsr=r29 // M2
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MOV_TO_IPSR(p0, r29, r25) // M2
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mov ar.pfs=r26 // I0
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(pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
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(p9) mov cr.ifs=r30 // M2
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MOV_TO_IFS(p9, r30, r25)// M2
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mov b0=r21 // I0
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(pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
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mov ar.fpsr=r20 // M2
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mov cr.iip=r28 // M2
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MOV_TO_IIP(r28, r25) // M2
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nop 0
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;;
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(pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
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@ -1148,7 +1175,7 @@ skip_rbs_switch:
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mov ar.rsc=r27 // M2
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mov pr=r31,-1 // I0
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rfi // B
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RFI // B
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/*
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* On entry:
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@ -1174,35 +1201,36 @@ skip_rbs_switch:
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;;
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(pKStk) st4 [r20]=r21
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#endif
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ssm psr.i // enable interrupts
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SSM_PSR_I(p0, p6, r2) // enable interrupts
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br.call.spnt.many rp=schedule
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.ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check)
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rsm psr.i // disable interrupts
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RSM_PSR_I(p0, r2, r20) // disable interrupts
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;;
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#ifdef CONFIG_PREEMPT
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(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
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;;
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(pKStk) st4 [r20]=r0 // preempt_count() <- 0
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#endif
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(pLvSys)br.cond.sptk.few .work_pending_syscall_end
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(pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
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br.cond.sptk.many .work_processed_kernel
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.notify:
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(pUStk) br.call.spnt.many rp=notify_resume_user
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.ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check)
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(pLvSys)br.cond.sptk.few .work_pending_syscall_end
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(pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
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br.cond.sptk.many .work_processed_kernel
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.work_pending_syscall_end:
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.global __paravirt_pending_syscall_end;
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__paravirt_pending_syscall_end:
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adds r2=PT(R8)+16,r12
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adds r3=PT(R10)+16,r12
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;;
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ld8 r8=[r2]
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ld8 r10=[r3]
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br.cond.sptk.many .work_processed_syscall
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END(ia64_leave_kernel)
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br.cond.sptk.many __paravirt_work_processed_syscall_target
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END(__paravirt_leave_kernel)
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#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
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ENTRY(handle_syscall_error)
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/*
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* Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
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@ -1244,7 +1272,7 @@ END(ia64_invoke_schedule_tail)
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* We declare 8 input registers so the system call args get preserved,
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* in case we need to restart a system call.
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*/
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ENTRY(notify_resume_user)
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GLOBAL_ENTRY(notify_resume_user)
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.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
|
||||
alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
|
||||
mov r9=ar.unat
|
||||
|
|
@ -1306,7 +1334,7 @@ ENTRY(sys_rt_sigreturn)
|
|||
adds sp=16,sp
|
||||
;;
|
||||
ld8 r9=[sp] // load new ar.unat
|
||||
mov.sptk b7=r8,ia64_leave_kernel
|
||||
mov.sptk b7=r8,ia64_native_leave_kernel
|
||||
;;
|
||||
mov ar.unat=r9
|
||||
br.many b7
|
||||
|
|
@ -1665,3 +1693,4 @@ sys_call_table:
|
|||
data8 sys_timerfd_gettime
|
||||
|
||||
.org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
|
||||
#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
|
||||
|
|
|
|||
|
|
@ -286,3 +286,22 @@ struct pv_cpu_ops pv_cpu_ops = {
|
|||
= ia64_native_intrin_local_irq_restore_func,
|
||||
};
|
||||
EXPORT_SYMBOL(pv_cpu_ops);
|
||||
|
||||
/******************************************************************************
|
||||
* replacement of hand written assembly codes.
|
||||
*/
|
||||
|
||||
void
|
||||
paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch)
|
||||
{
|
||||
extern unsigned long paravirt_switch_to_targ;
|
||||
extern unsigned long paravirt_leave_syscall_targ;
|
||||
extern unsigned long paravirt_work_processed_syscall_targ;
|
||||
extern unsigned long paravirt_leave_kernel_targ;
|
||||
|
||||
paravirt_switch_to_targ = cpu_asm_switch->switch_to;
|
||||
paravirt_leave_syscall_targ = cpu_asm_switch->leave_syscall;
|
||||
paravirt_work_processed_syscall_targ =
|
||||
cpu_asm_switch->work_processed_syscall;
|
||||
paravirt_leave_kernel_targ = cpu_asm_switch->leave_kernel;
|
||||
}
|
||||
|
|
|
|||
60
arch/ia64/kernel/paravirtentry.S
Normal file
60
arch/ia64/kernel/paravirtentry.S
Normal file
|
|
@ -0,0 +1,60 @@
|
|||
/******************************************************************************
|
||||
* linux/arch/ia64/xen/paravirtentry.S
|
||||
*
|
||||
* Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
|
||||
* VA Linux Systems Japan K.K.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <asm/asmmacro.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include "entry.h"
|
||||
|
||||
#define DATA8(sym, init_value) \
|
||||
.pushsection .data.read_mostly ; \
|
||||
.align 8 ; \
|
||||
.global sym ; \
|
||||
sym: ; \
|
||||
data8 init_value ; \
|
||||
.popsection
|
||||
|
||||
#define BRANCH(targ, reg, breg) \
|
||||
movl reg=targ ; \
|
||||
;; \
|
||||
ld8 reg=[reg] ; \
|
||||
;; \
|
||||
mov breg=reg ; \
|
||||
br.cond.sptk.many breg
|
||||
|
||||
#define BRANCH_PROC(sym, reg, breg) \
|
||||
DATA8(paravirt_ ## sym ## _targ, ia64_native_ ## sym) ; \
|
||||
GLOBAL_ENTRY(paravirt_ ## sym) ; \
|
||||
BRANCH(paravirt_ ## sym ## _targ, reg, breg) ; \
|
||||
END(paravirt_ ## sym)
|
||||
|
||||
#define BRANCH_PROC_UNWINFO(sym, reg, breg) \
|
||||
DATA8(paravirt_ ## sym ## _targ, ia64_native_ ## sym) ; \
|
||||
GLOBAL_ENTRY(paravirt_ ## sym) ; \
|
||||
PT_REGS_UNWIND_INFO(0) ; \
|
||||
BRANCH(paravirt_ ## sym ## _targ, reg, breg) ; \
|
||||
END(paravirt_ ## sym)
|
||||
|
||||
|
||||
BRANCH_PROC(switch_to, r22, b7)
|
||||
BRANCH_PROC_UNWINFO(leave_syscall, r22, b7)
|
||||
BRANCH_PROC(work_processed_syscall, r2, b7)
|
||||
BRANCH_PROC_UNWINFO(leave_kernel, r22, b7)
|
||||
|
|
@ -22,6 +22,14 @@
|
|||
|
||||
#define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN
|
||||
|
||||
#define __paravirt_switch_to ia64_native_switch_to
|
||||
#define __paravirt_leave_syscall ia64_native_leave_syscall
|
||||
#define __paravirt_work_processed_syscall ia64_native_work_processed_syscall
|
||||
#define __paravirt_leave_kernel ia64_native_leave_kernel
|
||||
#define __paravirt_pending_syscall_end ia64_work_pending_syscall_end
|
||||
#define __paravirt_work_processed_syscall_target \
|
||||
ia64_work_processed_syscall
|
||||
|
||||
#ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
|
||||
# define PARAVIRT_POISON 0xdeadbeefbaadf00d
|
||||
# define CLOBBER(clob) \
|
||||
|
|
|
|||
|
|
@ -80,12 +80,35 @@ extern unsigned long ia64_native_getreg_func(int regnum);
|
|||
ia64_native_rsm(mask); \
|
||||
} while (0)
|
||||
|
||||
/******************************************************************************
|
||||
* replacement of hand written assembly codes.
|
||||
*/
|
||||
struct pv_cpu_asm_switch {
|
||||
unsigned long switch_to;
|
||||
unsigned long leave_syscall;
|
||||
unsigned long work_processed_syscall;
|
||||
unsigned long leave_kernel;
|
||||
};
|
||||
void paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#define IA64_PARAVIRT_ASM_FUNC(name) paravirt_ ## name
|
||||
|
||||
#else
|
||||
|
||||
/* fallback for native case */
|
||||
#define IA64_PARAVIRT_ASM_FUNC(name) ia64_native_ ## name
|
||||
|
||||
#endif /* CONFIG_PARAVIRT */
|
||||
|
||||
/* these routines utilize privilege-sensitive or performance-sensitive
|
||||
* privileged instructions so the code must be replaced with
|
||||
* paravirtualized versions */
|
||||
#define ia64_switch_to IA64_PARAVIRT_ASM_FUNC(switch_to)
|
||||
#define ia64_leave_syscall IA64_PARAVIRT_ASM_FUNC(leave_syscall)
|
||||
#define ia64_work_processed_syscall \
|
||||
IA64_PARAVIRT_ASM_FUNC(work_processed_syscall)
|
||||
#define ia64_leave_kernel IA64_PARAVIRT_ASM_FUNC(leave_kernel)
|
||||
|
||||
#endif /* _ASM_IA64_PARAVIRT_PRIVOP_H */
|
||||
|
|
|
|||
Loading…
Reference in a new issue