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V4L/DVB (9811): Add support for the CX24113 DVB-S tuner driver
This commit adds support for the CX24113 DVB-S tuner driver and thus support for the Technisat Skystar2 revision 2.8. The driver was created with the help of Technisat. Thank you very much. Signed-off-by: Patrick Boettcher <pb@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Patrick Boettcher
Mauro Carvalho Chehab
parent
2bdd29cf3d
commit
4c48ae8e8a
5 changed files with 626 additions and 3 deletions
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@ -14,6 +14,7 @@ config DVB_B2C2_FLEXCOP
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select DVB_ISL6421 if !DVB_FE_CUSTOMISE
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select DVB_CX24123 if !DVB_FE_CUSTOMISE
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select MEDIA_TUNER_SIMPLE if !MEDIA_TUNER_CUSTOMIZE
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select DVB_TUNER_CX24113 if !DVB_FE_CUSTOMISE
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help
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Support for the digital TV receiver chip made by B2C2 Inc. included in
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Technisats PCI cards and USB boxes.
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@ -118,6 +118,14 @@ config DVB_TUNER_ITD1000
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help
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A DVB-S tuner module. Say Y when you want to support this frontend.
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config DVB_TUNER_CX24113
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tristate "Conexant CX24113/CX24128 tuner for DVB-S/DSS"
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depends on DVB_CORE && I2C
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default m if DVB_FE_CUSTOMISE
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help
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A DVB-S tuner module. Say Y when you want to support this frontend.
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config DVB_TDA826X
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tristate "Philips TDA826X silicon tuner"
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depends on DVB_CORE && I2C
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@ -54,6 +54,7 @@ obj-$(CONFIG_DVB_S5H1409) += s5h1409.o
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obj-$(CONFIG_DVB_TUNER_ITD1000) += itd1000.o
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obj-$(CONFIG_DVB_AU8522) += au8522.o
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obj-$(CONFIG_DVB_TDA10048) += tda10048.o
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obj-$(CONFIG_DVB_TUNER_CX24113) += cx24113.o
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obj-$(CONFIG_DVB_S5H1411) += s5h1411.o
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obj-$(CONFIG_DVB_LGS8GL5) += lgs8gl5.o
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obj-$(CONFIG_DVB_DUMMY_FE) += dvb_dummy_fe.o
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608
drivers/media/dvb/frontends/cx24113.c
Normal file
608
drivers/media/dvb/frontends/cx24113.c
Normal file
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@ -0,0 +1,608 @@
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/*
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* Driver for Conexant CX24113/CX24128 Tuner (Satelite)
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*
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* Copyright (C) 2007-8 Patrick Boettcher <pb@linuxtv.org>
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*
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* Developed for BBTI / Technisat
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/slab.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include "dvb_frontend.h"
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#include "cx24113.h"
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static int debug;
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#define info(args...) do { printk(KERN_INFO "CX24113: " args); } while (0)
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#define err(args...) do { printk(KERN_ERR "CX24113: " args); } while (0)
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#define dprintk(args...) \
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do { \
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if (debug) { \
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printk(KERN_DEBUG "CX24113: %s: ", __func__); \
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printk(args); \
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} \
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} while (0)
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struct cx24113_state {
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struct i2c_adapter *i2c;
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const struct cx24113_config *config;
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#define REV_CX24113 0x23
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u8 rev;
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u8 ver;
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u8 icp_mode:1;
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#define ICP_LEVEL1 0
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#define ICP_LEVEL2 1
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#define ICP_LEVEL3 2
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#define ICP_LEVEL4 3
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u8 icp_man:2;
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u8 icp_auto_low:2;
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u8 icp_auto_mlow:2;
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u8 icp_auto_mhi:2;
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u8 icp_auto_hi:2;
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u8 icp_dig;
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#define LNA_MIN_GAIN 0
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#define LNA_MID_GAIN 1
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#define LNA_MAX_GAIN 2
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u8 lna_gain:2;
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u8 acp_on:1;
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u8 vco_mode:2;
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u8 vco_shift:1;
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#define VCOBANDSEL_6 0x80
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#define VCOBANDSEL_5 0x01
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#define VCOBANDSEL_4 0x02
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#define VCOBANDSEL_3 0x04
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#define VCOBANDSEL_2 0x08
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#define VCOBANDSEL_1 0x10
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u8 vco_band;
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#define VCODIV4 4
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#define VCODIV2 2
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u8 vcodiv;
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u8 bs_delay:4;
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u16 bs_freqcnt:13;
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u16 bs_rdiv;
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u8 prescaler_mode:1;
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u8 rfvga_bias_ctrl;
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s16 tuner_gain_thres;
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u8 gain_level;
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u32 frequency;
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u8 refdiv;
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u8 Fwindow_enabled;
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};
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static int cx24113_writereg(struct cx24113_state *state, int reg, int data)
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{
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u8 buf[] = { reg, data };
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struct i2c_msg msg = { .addr = state->config->i2c_addr,
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.flags = 0, .buf = buf, .len = 2 };
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int err = i2c_transfer(state->i2c, &msg, 1);
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if (err != 1) {
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printk(KERN_DEBUG "%s: writereg error(err == %i, reg == 0x%02x,"
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" data == 0x%02x)\n", __func__, err, reg, data);
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return err;
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}
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return 0;
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}
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static int cx24113_readreg(struct cx24113_state *state, u8 reg)
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{
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int ret;
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u8 b;
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struct i2c_msg msg[] = {
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{ .addr = state->config->i2c_addr,
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.flags = 0, .buf = ®, .len = 1 },
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{ .addr = state->config->i2c_addr,
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.flags = I2C_M_RD, .buf = &b, .len = 1 }
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};
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ret = i2c_transfer(state->i2c, msg, 2);
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if (ret != 2) {
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printk(KERN_DEBUG "%s: reg=0x%x (error=%d)\n",
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__func__, reg, ret);
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return ret;
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}
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return b;
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}
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static void cx24113_set_parameters(struct cx24113_state *state)
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{
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u8 r;
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r = cx24113_readreg(state, 0x10) & 0x82;
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r |= state->icp_mode;
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r |= state->icp_man << 4;
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r |= state->icp_dig << 2;
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r |= state->prescaler_mode << 5;
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cx24113_writereg(state, 0x10, r);
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r = (state->icp_auto_low << 0) | (state->icp_auto_mlow << 2)
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| (state->icp_auto_mhi << 4) | (state->icp_auto_hi << 6);
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cx24113_writereg(state, 0x11, r);
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if (state->rev == REV_CX24113) {
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r = cx24113_readreg(state, 0x20) & 0xec;
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r |= state->lna_gain;
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r |= state->rfvga_bias_ctrl << 4;
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cx24113_writereg(state, 0x20, r);
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}
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r = cx24113_readreg(state, 0x12) & 0x03;
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r |= state->acp_on << 2;
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r |= state->bs_delay << 4;
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cx24113_writereg(state, 0x12, r);
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r = cx24113_readreg(state, 0x18) & 0x40;
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r |= state->vco_shift;
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if (state->vco_band == VCOBANDSEL_6)
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r |= (1 << 7);
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else
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r |= (state->vco_band << 1);
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cx24113_writereg(state, 0x18, r);
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r = cx24113_readreg(state, 0x14) & 0x20;
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r |= (state->vco_mode << 6) | ((state->bs_freqcnt >> 8) & 0x1f);
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cx24113_writereg(state, 0x14, r);
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cx24113_writereg(state, 0x15, (state->bs_freqcnt & 0xff));
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cx24113_writereg(state, 0x16, (state->bs_rdiv >> 4) & 0xff);
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r = (cx24113_readreg(state, 0x17) & 0x0f) |
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((state->bs_rdiv & 0x0f) << 4);
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cx24113_writereg(state, 0x17, r);
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}
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#define VGA_0 0x00
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#define VGA_1 0x04
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#define VGA_2 0x02
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#define VGA_3 0x06
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#define VGA_4 0x01
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#define VGA_5 0x05
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#define VGA_6 0x03
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#define VGA_7 0x07
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#define RFVGA_0 0x00
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#define RFVGA_1 0x01
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#define RFVGA_2 0x02
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#define RFVGA_3 0x03
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static int cx24113_set_gain_settings(struct cx24113_state *state,
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s16 power_estimation)
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{
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u8 ampout = cx24113_readreg(state, 0x1d) & 0xf0,
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vga = cx24113_readreg(state, 0x1f) & 0x3f,
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rfvga = cx24113_readreg(state, 0x20) & 0xf3;
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u8 gain_level = power_estimation >= state->tuner_gain_thres;
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dprintk("power estimation: %d, thres: %d, gain_level: %d/%d\n",
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power_estimation, state->tuner_gain_thres,
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state->gain_level, gain_level);
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if (gain_level == state->gain_level)
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return 0; /* nothing to be done */
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ampout |= 0xf;
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if (gain_level) {
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rfvga |= RFVGA_0 << 2;
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vga |= (VGA_7 << 3) | VGA_7;
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} else {
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rfvga |= RFVGA_2 << 2;
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vga |= (VGA_6 << 3) | VGA_2;
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}
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state->gain_level = gain_level;
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cx24113_writereg(state, 0x1d, ampout);
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cx24113_writereg(state, 0x1f, vga);
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cx24113_writereg(state, 0x20, rfvga);
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return 1; /* did something */
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}
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static int cx24113_set_Fref(struct cx24113_state *state, u8 high)
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{
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u8 xtal = cx24113_readreg(state, 0x02);
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if (state->rev == 0x43 && state->vcodiv == VCODIV4)
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high = 1;
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xtal &= ~0x2;
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if (high)
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xtal |= high << 1;
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return cx24113_writereg(state, 0x02, xtal);
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}
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static int cx24113_enable(struct cx24113_state *state, u8 enable)
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{
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u8 r21 = (cx24113_readreg(state, 0x21) & 0xc0) | enable;
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if (state->rev == REV_CX24113)
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r21 |= (1 << 1);
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return cx24113_writereg(state, 0x21, r21);
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}
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static int cx24113_set_bandwidth(struct cx24113_state *state, u32 bandwidth_khz)
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{
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u8 r;
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if (bandwidth_khz <= 19000)
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r = 0x03 << 6;
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else if (bandwidth_khz <= 25000)
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r = 0x02 << 6;
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else
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r = 0x01 << 6;
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dprintk("bandwidth to be set: %d\n", bandwidth_khz);
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bandwidth_khz *= 10;
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bandwidth_khz -= 10000;
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bandwidth_khz /= 1000;
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bandwidth_khz += 5;
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bandwidth_khz /= 10;
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dprintk("bandwidth: %d %d\n", r >> 6, bandwidth_khz);
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r |= bandwidth_khz & 0x3f;
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return cx24113_writereg(state, 0x1e, r);
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}
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static int cx24113_set_clk_inversion(struct cx24113_state *state, u8 on)
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{
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u8 r = (cx24113_readreg(state, 0x10) & 0x7f) | ((on & 0x1) << 7);
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return cx24113_writereg(state, 0x10, r);
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}
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static int cx24113_get_status(struct dvb_frontend *fe, u32 *status)
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{
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struct cx24113_state *state = fe->tuner_priv;
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u8 r = (cx24113_readreg(state, 0x10) & 0x02) >> 1;
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if (r)
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*status |= TUNER_STATUS_LOCKED;
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dprintk("PLL locked: %d\n", r);
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return 0;
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}
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static u8 cx24113_set_ref_div(struct cx24113_state *state, u8 refdiv)
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{
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if (state->rev == 0x43 && state->vcodiv == VCODIV4)
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refdiv = 2;
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return state->refdiv = refdiv;
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}
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static void cx24113_calc_pll_nf(struct cx24113_state *state, u16 *n, s32 *f)
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{
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s32 N;
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s64 F;
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u8 R, r;
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u8 vcodiv;
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u8 factor;
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s32 freq_hz = state->frequency * 1000;
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if (state->config->xtal_khz < 20000)
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factor = 1;
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else
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factor = 2;
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if (state->rev == REV_CX24113) {
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if (state->frequency >= 1100000)
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vcodiv = VCODIV2;
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else
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vcodiv = VCODIV4;
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} else {
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if (state->frequency >= 1165000)
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vcodiv = VCODIV2;
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else
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vcodiv = VCODIV4;
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}
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state->vcodiv = vcodiv;
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dprintk("calculating N/F for %dHz with vcodiv %d\n", freq_hz, vcodiv);
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R = 0;
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do {
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R = cx24113_set_ref_div(state, R + 1);
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/* calculate tuner PLL settings: */
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N = (freq_hz / 100 * vcodiv) * R;
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N /= (state->config->xtal_khz) * factor * 2;
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N += 5; /* For round up. */
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N /= 10;
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N -= 32;
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} while (N < 6 && R < 3);
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if (N < 6) {
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err("strange frequency: N < 6\n");
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return;
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}
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F = freq_hz;
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F *= (u64) (R * vcodiv * 262144);
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dprintk("1 N: %d, F: %lld, R: %d\n", N, F, R);
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do_div(F, state->config->xtal_khz*1000 * factor * 2);
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dprintk("2 N: %d, F: %lld, R: %d\n", N, F, R);
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F -= (N + 32) * 262144;
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dprintk("3 N: %d, F: %lld, R: %d\n", N, F, R);
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if (state->Fwindow_enabled) {
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if (F > (262144 / 2 - 1638))
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F = 262144 / 2 - 1638;
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if (F < (-262144 / 2 + 1638))
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F = -262144 / 2 + 1638;
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if ((F < 3277 && F > 0) || (F > -3277 && F < 0)) {
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F = 0;
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r = cx24113_readreg(state, 0x10);
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cx24113_writereg(state, 0x10, r | (1 << 6));
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}
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}
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dprintk("4 N: %d, F: %lld, R: %d\n", N, F, R);
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*n = (u16) N;
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*f = (s32) F;
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}
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static void cx24113_set_nfr(struct cx24113_state *state, u16 n, s32 f, u8 r)
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{
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u8 reg;
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cx24113_writereg(state, 0x19, (n >> 1) & 0xff);
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reg = ((n & 0x1) << 7) | ((f >> 11) & 0x7f);
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cx24113_writereg(state, 0x1a, reg);
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cx24113_writereg(state, 0x1b, (f >> 3) & 0xff);
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reg = cx24113_readreg(state, 0x1c) & 0x1f;
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cx24113_writereg(state, 0x1c, reg | ((f & 0x7) << 5));
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cx24113_set_Fref(state, r - 1);
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}
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static int cx24113_set_frequency(struct cx24113_state *state, u32 frequency)
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{
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u8 r = 1; /* or 2 */
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u16 n = 6;
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s32 f = 0;
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r = cx24113_readreg(state, 0x14);
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cx24113_writereg(state, 0x14, r & 0x3f);
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r = cx24113_readreg(state, 0x10);
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cx24113_writereg(state, 0x10, r & 0xbf);
|
||||
|
||||
state->frequency = frequency;
|
||||
|
||||
dprintk("tuning to frequency: %d\n", frequency);
|
||||
|
||||
cx24113_calc_pll_nf(state, &n, &f);
|
||||
cx24113_set_nfr(state, n, f, state->refdiv);
|
||||
|
||||
r = cx24113_readreg(state, 0x18) & 0xbf;
|
||||
if (state->vcodiv != VCODIV2)
|
||||
r |= 1 << 6;
|
||||
cx24113_writereg(state, 0x18, r);
|
||||
|
||||
/* The need for this sleep is not clear. But helps in some cases */
|
||||
msleep(5);
|
||||
|
||||
r = cx24113_readreg(state, 0x1c) & 0xef;
|
||||
cx24113_writereg(state, 0x1c, r | (1 << 4));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cx24113_init(struct dvb_frontend *fe)
|
||||
{
|
||||
struct cx24113_state *state = fe->tuner_priv;
|
||||
int ret;
|
||||
|
||||
state->tuner_gain_thres = -50;
|
||||
state->gain_level = 255; /* to force a gain-setting initialization */
|
||||
state->icp_mode = 0;
|
||||
|
||||
if (state->config->xtal_khz < 11000) {
|
||||
state->icp_auto_hi = ICP_LEVEL4;
|
||||
state->icp_auto_mhi = ICP_LEVEL4;
|
||||
state->icp_auto_mlow = ICP_LEVEL3;
|
||||
state->icp_auto_low = ICP_LEVEL3;
|
||||
} else {
|
||||
state->icp_auto_hi = ICP_LEVEL4;
|
||||
state->icp_auto_mhi = ICP_LEVEL4;
|
||||
state->icp_auto_mlow = ICP_LEVEL3;
|
||||
state->icp_auto_low = ICP_LEVEL2;
|
||||
}
|
||||
|
||||
state->icp_dig = ICP_LEVEL3;
|
||||
state->icp_man = ICP_LEVEL1;
|
||||
state->acp_on = 1;
|
||||
state->vco_mode = 0;
|
||||
state->vco_shift = 0;
|
||||
state->vco_band = VCOBANDSEL_1;
|
||||
state->bs_delay = 8;
|
||||
state->bs_freqcnt = 0x0fff;
|
||||
state->bs_rdiv = 0x0fff;
|
||||
state->prescaler_mode = 0;
|
||||
state->lna_gain = LNA_MAX_GAIN;
|
||||
state->rfvga_bias_ctrl = 1;
|
||||
state->Fwindow_enabled = 1;
|
||||
|
||||
cx24113_set_Fref(state, 0);
|
||||
cx24113_enable(state, 0x3d);
|
||||
cx24113_set_parameters(state);
|
||||
|
||||
cx24113_set_gain_settings(state, -30);
|
||||
|
||||
cx24113_set_bandwidth(state, 18025);
|
||||
cx24113_set_clk_inversion(state, 1);
|
||||
|
||||
if (state->config->xtal_khz >= 40000)
|
||||
ret = cx24113_writereg(state, 0x02,
|
||||
(cx24113_readreg(state, 0x02) & 0xfb) | (1 << 2));
|
||||
else
|
||||
ret = cx24113_writereg(state, 0x02,
|
||||
(cx24113_readreg(state, 0x02) & 0xfb) | (0 << 2));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int cx24113_set_params(struct dvb_frontend *fe,
|
||||
struct dvb_frontend_parameters *p)
|
||||
{
|
||||
struct cx24113_state *state = fe->tuner_priv;
|
||||
/* for a ROLL-OFF factor of 0.35, 0.2: 600, 0.25: 625 */
|
||||
u32 roll_off = 675;
|
||||
u32 bw;
|
||||
|
||||
bw = ((p->u.qpsk.symbol_rate/100) * roll_off) / 1000;
|
||||
bw += (10000000/100) + 5;
|
||||
bw /= 10;
|
||||
bw += 1000;
|
||||
cx24113_set_bandwidth(state, bw);
|
||||
|
||||
cx24113_set_frequency(state, p->frequency);
|
||||
msleep(5);
|
||||
return cx24113_get_status(fe, &bw);
|
||||
}
|
||||
|
||||
static s8 cx24113_agc_table[2][10] = {
|
||||
{-54, -41, -35, -30, -25, -21, -16, -10, -6, -2},
|
||||
{-39, -35, -30, -25, -19, -15, -11, -5, 1, 9},
|
||||
};
|
||||
|
||||
void cx24113_agc_callback(struct dvb_frontend *fe)
|
||||
{
|
||||
struct cx24113_state *state = fe->tuner_priv;
|
||||
s16 s, i;
|
||||
if (!fe->ops.read_signal_strength)
|
||||
return;
|
||||
|
||||
do {
|
||||
/* this only works with the current CX24123 implementation */
|
||||
fe->ops.read_signal_strength(fe, (u16 *) &s);
|
||||
s >>= 8;
|
||||
dprintk("signal strength: %d\n", s);
|
||||
for (i = 0; i < sizeof(cx24113_agc_table[0]); i++)
|
||||
if (cx24113_agc_table[state->gain_level][i] > s)
|
||||
break;
|
||||
s = -25 - i*5;
|
||||
} while (cx24113_set_gain_settings(state, s));
|
||||
}
|
||||
EXPORT_SYMBOL(cx24113_agc_callback);
|
||||
|
||||
static int cx24113_get_frequency(struct dvb_frontend *fe, u32 *frequency)
|
||||
{
|
||||
struct cx24113_state *state = fe->tuner_priv;
|
||||
*frequency = state->frequency;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cx24113_release(struct dvb_frontend *fe)
|
||||
{
|
||||
struct cx24113_state *state = fe->tuner_priv;
|
||||
dprintk("\n");
|
||||
fe->tuner_priv = NULL;
|
||||
kfree(state);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dvb_tuner_ops cx24113_tuner_ops = {
|
||||
.info = {
|
||||
.name = "Conexant CX24113",
|
||||
.frequency_min = 950000,
|
||||
.frequency_max = 2150000,
|
||||
.frequency_step = 125,
|
||||
},
|
||||
|
||||
.release = cx24113_release,
|
||||
|
||||
.init = cx24113_init,
|
||||
.sleep = NULL,
|
||||
|
||||
.set_params = cx24113_set_params,
|
||||
.get_frequency = cx24113_get_frequency,
|
||||
.get_bandwidth = NULL,
|
||||
.get_status = cx24113_get_status,
|
||||
};
|
||||
|
||||
struct dvb_frontend *cx24113_attach(struct dvb_frontend *fe,
|
||||
const struct cx24113_config *config, struct i2c_adapter *i2c)
|
||||
{
|
||||
/* allocate memory for the internal state */
|
||||
struct cx24113_state *state =
|
||||
kzalloc(sizeof(struct cx24113_state), GFP_KERNEL);
|
||||
if (state == NULL) {
|
||||
err("Unable to kmalloc\n");
|
||||
goto error;
|
||||
}
|
||||
|
||||
/* setup the state */
|
||||
state->config = config;
|
||||
state->i2c = i2c;
|
||||
|
||||
info("trying to detect myself\n");
|
||||
|
||||
/* making a dummy read, because of some expected troubles
|
||||
* after power on */
|
||||
cx24113_readreg(state, 0x00);
|
||||
|
||||
switch (state->rev = cx24113_readreg(state, 0x00)) {
|
||||
case 0x43:
|
||||
info("unknown device\n");
|
||||
break;
|
||||
case REV_CX24113:
|
||||
info("CX24113\n");
|
||||
break;
|
||||
default:
|
||||
err("unsupported revision: %x\n", state->rev);
|
||||
goto error;
|
||||
}
|
||||
state->ver = cx24113_readreg(state, 0x01);
|
||||
info("version: %x\n", state->ver);
|
||||
|
||||
/* create dvb_frontend */
|
||||
memcpy(&fe->ops.tuner_ops, &cx24113_tuner_ops,
|
||||
sizeof(struct dvb_tuner_ops));
|
||||
fe->tuner_priv = state;
|
||||
return fe;
|
||||
|
||||
error:
|
||||
kfree(state);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
EXPORT_SYMBOL(cx24113_attach);
|
||||
|
||||
module_param(debug, int, 0644);
|
||||
MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
|
||||
|
||||
MODULE_AUTHOR("Patrick Boettcher <pb@linuxtv.org>");
|
||||
MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24113/CX24128hardware");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
|
|
@ -16,7 +16,7 @@
|
|||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef CX24113_H
|
||||
|
|
@ -30,9 +30,13 @@ struct cx24113_config {
|
|||
u32 xtal_khz;
|
||||
};
|
||||
|
||||
/* TODO: #if defined(CONFIG_DVB_TUNER_CX24113) || \
|
||||
* (defined(CONFIG_DVB_TUNER_CX24113_MODULE) && defined(MODULE)) */
|
||||
#if defined(CONFIG_DVB_TUNER_CX24113) || \
|
||||
(defined(CONFIG_DVB_TUNER_CX24113_MODULE) && defined(MODULE))
|
||||
extern struct dvb_frontend *cx24113_attach(struct dvb_frontend *,
|
||||
const struct cx24113_config *config, struct i2c_adapter *i2c);
|
||||
|
||||
extern void cx24113_agc_callback(struct dvb_frontend *fe);
|
||||
#else
|
||||
static inline struct dvb_frontend *cx24113_attach(struct dvb_frontend *fe,
|
||||
const struct cx24113_config *config, struct i2c_adapter *i2c)
|
||||
{
|
||||
|
|
@ -44,5 +48,6 @@ static inline void cx24113_agc_callback(struct dvb_frontend *fe)
|
|||
{
|
||||
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CX24113_H */
|
||||
|
|
|
|||
Loading…
Reference in a new issue