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Merge branch 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: UV RTC: Always enable RTC clocksource x86: UV RTC: Rename generic_interrupt to x86_platform_ipi x86: UV RTC: Clean up error handling x86: UV RTC: Add clocksource only boot option x86: UV RTC: Fix early expiry handling
This commit is contained in:
commit
4646575daf
9 changed files with 69 additions and 51 deletions
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@ -34,7 +34,7 @@ BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
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smp_invalidate_interrupt)
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#endif
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BUILD_INTERRUPT(generic_interrupt, GENERIC_INTERRUPT_VECTOR)
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BUILD_INTERRUPT(x86_platform_ipi, X86_PLATFORM_IPI_VECTOR)
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/*
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* every pentium local APIC has two 'local interrupts', with a
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@ -12,7 +12,7 @@ typedef struct {
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unsigned int apic_timer_irqs; /* arch dependent */
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unsigned int irq_spurious_count;
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#endif
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unsigned int generic_irqs; /* arch dependent */
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unsigned int x86_platform_ipis; /* arch dependent */
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unsigned int apic_perf_irqs;
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unsigned int apic_pending_irqs;
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#ifdef CONFIG_SMP
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@ -27,7 +27,7 @@
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/* Interrupt handlers registered during init_IRQ */
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extern void apic_timer_interrupt(void);
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extern void generic_interrupt(void);
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extern void x86_platform_ipi(void);
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extern void error_interrupt(void);
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extern void perf_pending_interrupt(void);
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@ -119,7 +119,7 @@ extern void eisa_set_level_irq(unsigned int irq);
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/* SMP */
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extern void smp_apic_timer_interrupt(struct pt_regs *);
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extern void smp_spurious_interrupt(struct pt_regs *);
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extern void smp_generic_interrupt(struct pt_regs *);
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extern void smp_x86_platform_ipi(struct pt_regs *);
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extern void smp_error_interrupt(struct pt_regs *);
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#ifdef CONFIG_X86_IO_APIC
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extern asmlinkage void smp_irq_move_cleanup_interrupt(void);
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@ -37,7 +37,7 @@ extern void fixup_irqs(void);
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extern void irq_force_complete_move(int);
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#endif
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extern void (*generic_interrupt_extension)(void);
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extern void (*x86_platform_ipi_callback)(void);
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extern void native_init_IRQ(void);
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extern bool handle_irq(unsigned irq, struct pt_regs *regs);
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@ -106,7 +106,7 @@
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/*
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* Generic system vector for platform specific use
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*/
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#define GENERIC_INTERRUPT_VECTOR 0xed
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#define X86_PLATFORM_IPI_VECTOR 0xed
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/*
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* Performance monitoring pending work vector:
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@ -977,8 +977,8 @@ apicinterrupt UV_BAU_MESSAGE \
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#endif
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apicinterrupt LOCAL_TIMER_VECTOR \
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apic_timer_interrupt smp_apic_timer_interrupt
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apicinterrupt GENERIC_INTERRUPT_VECTOR \
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generic_interrupt smp_generic_interrupt
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apicinterrupt X86_PLATFORM_IPI_VECTOR \
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x86_platform_ipi smp_x86_platform_ipi
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#ifdef CONFIG_SMP
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apicinterrupt INVALIDATE_TLB_VECTOR_START+0 \
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@ -18,7 +18,7 @@
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atomic_t irq_err_count;
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/* Function pointer for generic interrupt vector handling */
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void (*generic_interrupt_extension)(void) = NULL;
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void (*x86_platform_ipi_callback)(void) = NULL;
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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@ -72,10 +72,10 @@ static int show_other_interrupts(struct seq_file *p, int prec)
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seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs);
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seq_printf(p, " Performance pending work\n");
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#endif
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if (generic_interrupt_extension) {
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if (x86_platform_ipi_callback) {
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seq_printf(p, "%*s: ", prec, "PLT");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->generic_irqs);
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seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis);
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seq_printf(p, " Platform interrupts\n");
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}
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#ifdef CONFIG_SMP
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@ -187,8 +187,8 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
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sum += irq_stats(cpu)->apic_perf_irqs;
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sum += irq_stats(cpu)->apic_pending_irqs;
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#endif
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if (generic_interrupt_extension)
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sum += irq_stats(cpu)->generic_irqs;
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if (x86_platform_ipi_callback)
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sum += irq_stats(cpu)->x86_platform_ipis;
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#ifdef CONFIG_SMP
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sum += irq_stats(cpu)->irq_resched_count;
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sum += irq_stats(cpu)->irq_call_count;
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@ -251,9 +251,9 @@ unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
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}
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/*
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* Handler for GENERIC_INTERRUPT_VECTOR.
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* Handler for X86_PLATFORM_IPI_VECTOR.
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*/
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void smp_generic_interrupt(struct pt_regs *regs)
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void smp_x86_platform_ipi(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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@ -263,10 +263,10 @@ void smp_generic_interrupt(struct pt_regs *regs)
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irq_enter();
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inc_irq_stat(generic_irqs);
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inc_irq_stat(x86_platform_ipis);
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if (generic_interrupt_extension)
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generic_interrupt_extension();
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if (x86_platform_ipi_callback)
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x86_platform_ipi_callback();
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irq_exit();
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@ -200,8 +200,8 @@ static void __init apic_intr_init(void)
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/* self generated IPI for local APIC timer */
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alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
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/* generic IPI for platform specific use */
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alloc_intr_gate(GENERIC_INTERRUPT_VECTOR, generic_interrupt);
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/* IPI for X86 platform specific use */
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alloc_intr_gate(X86_PLATFORM_IPI_VECTOR, x86_platform_ipi);
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/* IPI vectors for APIC spurious and error interrupts */
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alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
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@ -74,7 +74,7 @@ struct uv_rtc_timer_head {
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*/
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static struct uv_rtc_timer_head **blade_info __read_mostly;
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static int uv_rtc_enable;
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static int uv_rtc_evt_enable;
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/*
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* Hardware interface routines
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@ -90,7 +90,7 @@ static void uv_rtc_send_IPI(int cpu)
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pnode = uv_apicid_to_pnode(apicid);
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val = (1UL << UVH_IPI_INT_SEND_SHFT) |
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(apicid << UVH_IPI_INT_APIC_ID_SHFT) |
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(GENERIC_INTERRUPT_VECTOR << UVH_IPI_INT_VECTOR_SHFT);
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(X86_PLATFORM_IPI_VECTOR << UVH_IPI_INT_VECTOR_SHFT);
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uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
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}
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@ -115,7 +115,7 @@ static int uv_setup_intr(int cpu, u64 expires)
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uv_write_global_mmr64(pnode, UVH_EVENT_OCCURRED0_ALIAS,
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UVH_EVENT_OCCURRED0_RTC1_MASK);
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val = (GENERIC_INTERRUPT_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) |
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val = (X86_PLATFORM_IPI_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) |
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((u64)cpu_physical_id(cpu) << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT);
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/* Set configuration */
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/* Initialize comparator value */
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uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires);
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return (expires < uv_read_rtc(NULL) && !uv_intr_pending(pnode));
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if (uv_read_rtc(NULL) <= expires)
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return 0;
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return !uv_intr_pending(pnode);
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}
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/*
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@ -223,6 +226,7 @@ static int uv_rtc_set_timer(int cpu, u64 expires)
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next_cpu = head->next_cpu;
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*t = expires;
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/* Will this one be next to go off? */
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if (next_cpu < 0 || bcpu == next_cpu ||
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expires < head->cpu[next_cpu].expires) {
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@ -231,7 +235,7 @@ static int uv_rtc_set_timer(int cpu, u64 expires)
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*t = ULLONG_MAX;
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uv_rtc_find_next_timer(head, pnode);
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spin_unlock_irqrestore(&head->lock, flags);
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return 1;
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return -ETIME;
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}
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}
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*
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* Returns 1 if this timer was pending.
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*/
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static int uv_rtc_unset_timer(int cpu)
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static int uv_rtc_unset_timer(int cpu, int force)
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{
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int pnode = uv_cpu_to_pnode(cpu);
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int bid = uv_cpu_to_blade_id(cpu);
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spin_lock_irqsave(&head->lock, flags);
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if (head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t)
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if ((head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t) || force)
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rc = 1;
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if (rc) {
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*t = ULLONG_MAX;
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/* Was the hardware setup for this timer? */
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if (head->next_cpu == bcpu)
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uv_rtc_find_next_timer(head, pnode);
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}
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spin_unlock_irqrestore(&head->lock, flags);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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uv_rtc_unset_timer(ced_cpu);
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uv_rtc_unset_timer(ced_cpu, 1);
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break;
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}
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}
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static void uv_rtc_interrupt(void)
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{
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struct clock_event_device *ced = &__get_cpu_var(cpu_ced);
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int cpu = smp_processor_id();
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struct clock_event_device *ced = &per_cpu(cpu_ced, cpu);
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if (!ced || !ced->event_handler)
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return;
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if (uv_rtc_unset_timer(cpu) != 1)
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if (uv_rtc_unset_timer(cpu, 0) != 1)
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return;
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ced->event_handler(ced);
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}
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static int __init uv_enable_rtc(char *str)
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static int __init uv_enable_evt_rtc(char *str)
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{
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uv_rtc_enable = 1;
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uv_rtc_evt_enable = 1;
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return 1;
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}
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__setup("uvrtc", uv_enable_rtc);
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__setup("uvrtcevt", uv_enable_evt_rtc);
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static __init void uv_rtc_register_clockevents(struct work_struct *dummy)
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{
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{
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int rc;
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if (!uv_rtc_enable || !is_uv_system() || generic_interrupt_extension)
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if (!is_uv_system())
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return -ENODEV;
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generic_interrupt_extension = uv_rtc_interrupt;
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clocksource_uv.mult = clocksource_hz2mult(sn_rtc_cycles_per_second,
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clocksource_uv.shift);
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/* If single blade, prefer tsc */
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if (uv_num_possible_blades() == 1)
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clocksource_uv.rating = 250;
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rc = clocksource_register(&clocksource_uv);
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if (rc) {
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generic_interrupt_extension = NULL;
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if (rc)
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printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc);
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else
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printk(KERN_INFO "UV RTC clocksource registered freq %lu MHz\n",
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sn_rtc_cycles_per_second/(unsigned long)1E6);
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if (rc || !uv_rtc_evt_enable || x86_platform_ipi_callback)
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return rc;
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}
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/* Setup and register clockevents */
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rc = uv_rtc_allocate_timers();
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if (rc) {
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clocksource_unregister(&clocksource_uv);
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generic_interrupt_extension = NULL;
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return rc;
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}
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if (rc)
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goto error;
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x86_platform_ipi_callback = uv_rtc_interrupt;
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clock_event_device_uv.mult = div_sc(sn_rtc_cycles_per_second,
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NSEC_PER_SEC, clock_event_device_uv.shift);
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@ -383,11 +393,19 @@ static __init int uv_rtc_setup_clock(void)
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rc = schedule_on_each_cpu(uv_rtc_register_clockevents);
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if (rc) {
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clocksource_unregister(&clocksource_uv);
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generic_interrupt_extension = NULL;
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x86_platform_ipi_callback = NULL;
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uv_rtc_deallocate_timers();
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goto error;
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}
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printk(KERN_INFO "UV RTC clockevents registered\n");
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return 0;
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error:
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clocksource_unregister(&clocksource_uv);
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printk(KERN_INFO "UV RTC clockevents failed rc %d\n", rc);
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return rc;
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}
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arch_initcall(uv_rtc_setup_clock);
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