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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Alchemy: Fix PCI-memory access [MIPS] Fix N32 SysV IPC routines [MIPS] PNX8550: Fix system timer initialization
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commit
40e38d3043
4 changed files with 21 additions and 8 deletions
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@ -39,15 +39,15 @@
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/* TBD */
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static struct resource pci_io_resource = {
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.start = PCI_IO_START,
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.end = PCI_IO_END,
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.start = (resource_size_t)PCI_IO_START,
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.end = (resource_size_t)PCI_IO_END,
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.name = "PCI IO space",
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.flags = IORESOURCE_IO
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};
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static struct resource pci_mem_resource = {
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.start = PCI_MEM_START,
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.end = PCI_MEM_END,
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.start = (resource_size_t)PCI_MEM_START,
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.end = (resource_size_t)PCI_MEM_END,
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.name = "PCI memory space",
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.flags = IORESOURCE_MEM
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};
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@ -440,14 +440,26 @@ sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
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}
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#ifdef CONFIG_MIPS32_N32
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asmlinkage long sysn32_semctl(int semid, int semnum, int cmd, union semun arg)
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asmlinkage long sysn32_semctl(int semid, int semnum, int cmd, u32 arg)
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{
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/* compat_sys_semctl expects a pointer to union semun */
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u32 __user *uptr = compat_alloc_user_space(sizeof(u32));
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if (put_user(ptr_to_compat(arg.__pad), uptr))
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if (put_user(arg, uptr))
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return -EFAULT;
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return compat_sys_semctl(semid, semnum, cmd, uptr);
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}
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asmlinkage long sysn32_msgsnd(int msqid, u32 msgp, unsigned msgsz, int msgflg)
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{
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return compat_sys_msgsnd(msqid, msgsz, msgflg, compat_ptr(msgp));
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}
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asmlinkage long sysn32_msgrcv(int msqid, u32 msgp, size_t msgsz, int msgtyp,
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int msgflg)
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{
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return compat_sys_msgrcv(msqid, msgsz, msgtyp, msgflg, IPC_64,
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compat_ptr(msgp));
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}
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#endif
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struct sysctl_args32
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@ -187,8 +187,8 @@ EXPORT(sysn32_call_table)
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PTR sysn32_semctl
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PTR sys_shmdt /* 6065 */
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PTR sys_msgget
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PTR compat_sys_msgsnd
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PTR compat_sys_msgrcv
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PTR sysn32_msgsnd
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PTR sysn32_msgrcv
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PTR compat_sys_msgctl
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PTR compat_sys_fcntl /* 6070 */
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PTR sys_flock
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@ -79,6 +79,7 @@ void pnx8550_time_init(void)
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*/
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mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p));
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cpj = (mips_hpt_frequency + HZ / 2) / HZ;
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write_c0_count(0);
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timer_ack();
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/* Setup Timer 2 */
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