mirror of
https://github.com/adulau/aha.git
synced 2024-12-27 19:26:25 +00:00
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: only save/restore existent registers in the PCIe capability x86/PCI: don't bother with root quirks if _CRS is used docbooks: add/fix PCI kernel-doc PCI: cleanup debug output resources x86/PCI: set_pci_bus_resources_arch_default cleanups x86/PCI: Move set_pci_bus_resources_arch_default into arch/x86 x86/PCI: don't call e820_all_mapped with -1 in the mmconfig case PCI quirk: disable MSI on VIA VT3364 chipsets
This commit is contained in:
Linus Torvalds
commit
3fb8e49200
15 changed files with 97 additions and 37 deletions
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@ -190,16 +190,20 @@ X!Ekernel/module.c
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!Edrivers/pci/pci.c
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!Edrivers/pci/pci-driver.c
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!Edrivers/pci/remove.c
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!Edrivers/pci/pci-acpi.c
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!Edrivers/pci/search.c
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!Edrivers/pci/msi.c
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!Edrivers/pci/bus.c
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!Edrivers/pci/access.c
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!Edrivers/pci/irq.c
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!Edrivers/pci/htirq.c
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<!-- FIXME: Removed for now since no structured comments in source
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X!Edrivers/pci/hotplug.c
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-->
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!Edrivers/pci/probe.c
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!Edrivers/pci/slot.c
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!Edrivers/pci/rom.c
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!Edrivers/pci/iov.c
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!Idrivers/pci/pci-sysfs.c
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</sect1>
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<sect1><title>PCI Hotplug Support Library</title>
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!Edrivers/pci/hotplug/pci_hotplug_core.c
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@ -200,7 +200,7 @@ static inline void arch_fix_phys_package_id(int num, u32 slot)
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}
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struct pci_bus;
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void set_pci_bus_resources_arch_default(struct pci_bus *b);
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void x86_pci_root_bus_res_quirks(struct pci_bus *b);
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#ifdef CONFIG_SMP
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#define mc_capable() (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids)
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@ -94,12 +94,16 @@ struct pci_root_info {
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static int pci_root_num;
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static struct pci_root_info pci_root_info[PCI_ROOT_NR];
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void set_pci_bus_resources_arch_default(struct pci_bus *b)
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void x86_pci_root_bus_res_quirks(struct pci_bus *b)
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{
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int i;
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int j;
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struct pci_root_info *info;
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/* don't go for it if _CRS is used */
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if (pci_probe & PCI_USE__CRS)
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return;
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/* if only one root bus, don't need to anything */
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if (pci_root_num < 2)
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return;
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@ -151,6 +151,9 @@ void __devinit pcibios_fixup_bus(struct pci_bus *b)
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{
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struct pci_dev *dev;
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/* root bus? */
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if (!b->parent)
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x86_pci_root_bus_res_quirks(b);
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pci_read_bridge_bases(b);
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list_for_each_entry(dev, &b->devices, bus_list)
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pcibios_fixup_device_resources(dev);
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@ -238,6 +238,10 @@ void __init pcibios_resource_survey(void)
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*/
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fs_initcall(pcibios_assign_resources);
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void __weak x86_pci_root_bus_res_quirks(struct pci_bus *b)
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{
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}
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/*
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* If we set up a device for bus mastering, we need to check the latency
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* timer as certain crappy BIOSes forget to set it properly.
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@ -375,7 +375,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res,
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if (!fixmem32)
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return AE_OK;
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if ((mcfg_res->start >= fixmem32->address) &&
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(mcfg_res->end < (fixmem32->address +
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(mcfg_res->end <= (fixmem32->address +
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fixmem32->address_length))) {
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mcfg_res->flags = 1;
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return AE_CTRL_TERMINATE;
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@ -392,7 +392,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res,
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return AE_OK;
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if ((mcfg_res->start >= address.minimum) &&
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(mcfg_res->end < (address.minimum + address.address_length))) {
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(mcfg_res->end <= (address.minimum + address.address_length))) {
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mcfg_res->flags = 1;
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return AE_CTRL_TERMINATE;
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}
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@ -439,7 +439,7 @@ static int __init is_mmconf_reserved(check_reserved_t is_reserved,
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u64 old_size = size;
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int valid = 0;
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while (!is_reserved(addr, addr + size - 1, E820_RESERVED)) {
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while (!is_reserved(addr, addr + size, E820_RESERVED)) {
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size >>= 1;
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if (size < (16UL<<20))
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break;
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@ -87,8 +87,8 @@ EXPORT_SYMBOL(pci_read_vpd);
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* pci_write_vpd - Write entry to Vital Product Data
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* @dev: pci device struct
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* @pos: offset in vpd space
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* @count: number of bytes to read
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* @val: value to write
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* @count: number of bytes to write
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* @buf: buffer containing write data
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*
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*/
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ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
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@ -158,6 +158,7 @@ int ht_create_irq(struct pci_dev *dev, int idx)
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/**
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* ht_destroy_irq - destroy an irq created with ht_create_irq
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* @irq: irq to be destroyed
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*
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* This reverses ht_create_irq removing the specified irq from
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* existence. The irq should be free before this happens.
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@ -492,6 +492,7 @@ write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
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/**
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* pci_read_legacy_io - read byte(s) from legacy I/O port space
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* @kobj: kobject corresponding to file to read from
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* @bin_attr: struct bin_attribute for this file
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* @buf: buffer to store results
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* @off: offset into legacy I/O port space
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* @count: number of bytes to read
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@ -517,6 +518,7 @@ pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
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/**
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* pci_write_legacy_io - write byte(s) to legacy I/O port space
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* @kobj: kobject corresponding to file to read from
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* @bin_attr: struct bin_attribute for this file
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* @buf: buffer containing value to be written
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* @off: offset into legacy I/O port space
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* @count: number of bytes to write
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@ -733,9 +735,9 @@ pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
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/**
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* pci_remove_resource_files - cleanup resource files
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* @dev: dev to cleanup
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* @pdev: dev to cleanup
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*
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* If we created resource files for @dev, remove them from sysfs and
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* If we created resource files for @pdev, remove them from sysfs and
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* free their resources.
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*/
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static void
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@ -793,9 +795,9 @@ static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
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/**
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* pci_create_resource_files - create resource files in sysfs for @dev
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* @dev: dev in question
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* @pdev: dev in question
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*
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* Walk the resources in @dev creating files for each resource available.
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* Walk the resources in @pdev creating files for each resource available.
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*/
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static int pci_create_resource_files(struct pci_dev *pdev)
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{
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@ -829,6 +831,7 @@ void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
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/**
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* pci_write_rom - used to enable access to the PCI ROM display
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* @kobj: kernel object handle
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* @bin_attr: struct bin_attribute for this file
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* @buf: user input
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* @off: file offset
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* @count: number of byte in input
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@ -852,6 +855,7 @@ pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
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/**
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* pci_read_rom - read a PCI ROM
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* @kobj: kernel object handle
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* @bin_attr: struct bin_attribute for this file
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* @buf: where to put the data we read from the ROM
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* @off: file offset
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* @count: number of bytes to read
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@ -681,11 +681,34 @@ EXPORT_SYMBOL(pci_choose_state);
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#define PCI_EXP_SAVE_REGS 7
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#define pcie_cap_has_devctl(type, flags) 1
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#define pcie_cap_has_lnkctl(type, flags) \
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((flags & PCI_EXP_FLAGS_VERS) > 1 || \
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(type == PCI_EXP_TYPE_ROOT_PORT || \
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type == PCI_EXP_TYPE_ENDPOINT || \
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type == PCI_EXP_TYPE_LEG_END))
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#define pcie_cap_has_sltctl(type, flags) \
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((flags & PCI_EXP_FLAGS_VERS) > 1 || \
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((type == PCI_EXP_TYPE_ROOT_PORT) || \
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(type == PCI_EXP_TYPE_DOWNSTREAM && \
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(flags & PCI_EXP_FLAGS_SLOT))))
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#define pcie_cap_has_rtctl(type, flags) \
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((flags & PCI_EXP_FLAGS_VERS) > 1 || \
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(type == PCI_EXP_TYPE_ROOT_PORT || \
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type == PCI_EXP_TYPE_RC_EC))
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#define pcie_cap_has_devctl2(type, flags) \
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((flags & PCI_EXP_FLAGS_VERS) > 1)
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#define pcie_cap_has_lnkctl2(type, flags) \
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((flags & PCI_EXP_FLAGS_VERS) > 1)
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#define pcie_cap_has_sltctl2(type, flags) \
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((flags & PCI_EXP_FLAGS_VERS) > 1)
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static int pci_save_pcie_state(struct pci_dev *dev)
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{
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int pos, i = 0;
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struct pci_cap_saved_state *save_state;
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u16 *cap;
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u16 flags;
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pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
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if (pos <= 0)
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@ -698,12 +721,21 @@ static int pci_save_pcie_state(struct pci_dev *dev)
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}
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cap = (u16 *)&save_state->data[0];
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pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
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if (pcie_cap_has_devctl(dev->pcie_type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &cap[i++]);
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if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]);
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if (pcie_cap_has_sltctl(dev->pcie_type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]);
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if (pcie_cap_has_rtctl(dev->pcie_type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]);
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if (pcie_cap_has_devctl2(dev->pcie_type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &cap[i++]);
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if (pcie_cap_has_lnkctl2(dev->pcie_type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
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if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
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return 0;
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@ -714,6 +746,7 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
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int i = 0, pos;
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struct pci_cap_saved_state *save_state;
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u16 *cap;
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u16 flags;
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save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
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pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
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@ -721,12 +754,21 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
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return;
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cap = (u16 *)&save_state->data[0];
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pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
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if (pcie_cap_has_devctl(dev->pcie_type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, cap[i++]);
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if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
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if (pcie_cap_has_sltctl(dev->pcie_type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
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if (pcie_cap_has_rtctl(dev->pcie_type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
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if (pcie_cap_has_devctl2(dev->pcie_type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, cap[i++]);
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if (pcie_cap_has_lnkctl2(dev->pcie_type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]);
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if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
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}
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@ -1118,10 +1118,6 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
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return max;
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}
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void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b)
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{
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}
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struct pci_bus * pci_create_bus(struct device *parent,
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int bus, struct pci_ops *ops, void *sysdata)
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{
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@ -1180,8 +1176,6 @@ struct pci_bus * pci_create_bus(struct device *parent,
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b->resource[0] = &ioport_resource;
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b->resource[1] = &iomem_resource;
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set_pci_bus_resources_arch_default(b);
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return b;
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dev_create_file_err:
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@ -2033,6 +2033,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS400_200, quirk_di
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS480, quirk_disable_all_msi);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3336, quirk_disable_all_msi);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3351, quirk_disable_all_msi);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3364, quirk_disable_all_msi);
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/* Disable MSI on chipsets that are known to not support it */
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static void __devinit quirk_disable_msi(struct pci_dev *dev)
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@ -536,11 +536,13 @@ static void pci_bus_dump_res(struct pci_bus *bus)
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for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
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struct resource *res = bus->resource[i];
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if (!res)
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if (!res || !res->end)
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continue;
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dev_printk(KERN_DEBUG, &bus->dev, "resource %d %s %pR\n", i,
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(res->flags & IORESOURCE_IO) ? "io: " : "mem:", res);
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(res->flags & IORESOURCE_IO) ? "io: " :
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((res->flags & IORESOURCE_PREFETCH)? "pref mem":"mem:"),
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res);
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}
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}
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@ -264,8 +264,8 @@ EXPORT_SYMBOL_GPL(pci_create_slot);
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/**
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* pci_renumber_slot - update %struct pci_slot -> number
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* @slot - %struct pci_slot to update
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* @slot_nr - new number for slot
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* @slot: &struct pci_slot to update
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* @slot_nr: new number for slot
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*
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* The primary purpose of this interface is to allow callers who earlier
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* created a placeholder slot in pci_create_slot() by passing a -1 as
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@ -376,6 +376,7 @@
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#define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */
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#define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */
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#define PCI_EXP_TYPE_RC_END 0x9 /* Root Complex Integrated Endpoint */
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#define PCI_EXP_TYPE_RC_EC 0x10 /* Root Complex Event Collector */
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#define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */
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#define PCI_EXP_FLAGS_IRQ 0x3e00 /* Interrupt message number */
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#define PCI_EXP_DEVCAP 4 /* Device capabilities */
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