mirror of
https://github.com/adulau/aha.git
synced 2024-12-28 11:46:19 +00:00
[PATCH] pcnet32: break receive routine into two pieces.
Breaking the receive frame processing into two routines for greater clarity. Tested ia32 and ppc64. Signed-off-by: Don Fry <brazilnut@us.ibm.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Don Fry
Jeff Garzik
parent
9691edd26c
commit
3904c32414
1 changed files with 141 additions and 161 deletions
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@ -1124,161 +1124,140 @@ static int pcnet32_suspend(struct net_device *dev, unsigned long *flags,
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return 1;
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}
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/*
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* process one receive descriptor entry
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*/
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static int pcnet32_rx(struct net_device *dev)
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static void pcnet32_rx_entry(struct net_device *dev,
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struct pcnet32_private *lp,
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struct pcnet32_rx_head *rxp,
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int entry)
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{
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int status = (short)le16_to_cpu(rxp->status) >> 8;
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int rx_in_place = 0;
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struct sk_buff *skb;
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short pkt_len;
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if (status != 0x03) { /* There was an error. */
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/*
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* There is a tricky error noted by John Murphy,
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* <murf@perftech.com> to Russ Nelson: Even with full-sized
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* buffers it's possible for a jabber packet to use two
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* buffers, with only the last correctly noting the error.
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*/
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if (status & 0x01) /* Only count a general error at the */
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lp->stats.rx_errors++; /* end of a packet. */
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if (status & 0x20)
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lp->stats.rx_frame_errors++;
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if (status & 0x10)
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lp->stats.rx_over_errors++;
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if (status & 0x08)
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lp->stats.rx_crc_errors++;
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if (status & 0x04)
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lp->stats.rx_fifo_errors++;
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return;
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}
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pkt_len = (le32_to_cpu(rxp->msg_length) & 0xfff) - 4;
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/* Discard oversize frames. */
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if (unlikely(pkt_len > PKT_BUF_SZ - 2)) {
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if (netif_msg_drv(lp))
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printk(KERN_ERR "%s: Impossible packet size %d!\n",
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dev->name, pkt_len);
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lp->stats.rx_errors++;
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return;
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}
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if (pkt_len < 60) {
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if (netif_msg_rx_err(lp))
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printk(KERN_ERR "%s: Runt packet!\n", dev->name);
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lp->stats.rx_errors++;
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return;
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}
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if (pkt_len > rx_copybreak) {
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struct sk_buff *newskb;
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if ((newskb = dev_alloc_skb(PKT_BUF_SZ))) {
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skb_reserve(newskb, 2);
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skb = lp->rx_skbuff[entry];
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pci_unmap_single(lp->pci_dev,
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lp->rx_dma_addr[entry],
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PKT_BUF_SZ - 2,
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PCI_DMA_FROMDEVICE);
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skb_put(skb, pkt_len);
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lp->rx_skbuff[entry] = newskb;
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newskb->dev = dev;
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lp->rx_dma_addr[entry] =
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pci_map_single(lp->pci_dev,
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newskb->data,
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PKT_BUF_SZ - 2,
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PCI_DMA_FROMDEVICE);
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rxp->base = le32_to_cpu(lp->rx_dma_addr[entry]);
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rx_in_place = 1;
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} else
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skb = NULL;
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} else {
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skb = dev_alloc_skb(pkt_len + 2);
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}
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if (skb == NULL) {
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if (netif_msg_drv(lp))
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printk(KERN_ERR
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"%s: Memory squeeze, dropping packet.\n",
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dev->name);
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lp->stats.rx_dropped++;
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return;
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}
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skb->dev = dev;
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if (!rx_in_place) {
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skb_reserve(skb, 2); /* 16 byte align */
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skb_put(skb, pkt_len); /* Make room */
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pci_dma_sync_single_for_cpu(lp->pci_dev,
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lp->rx_dma_addr[entry],
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PKT_BUF_SZ - 2,
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PCI_DMA_FROMDEVICE);
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eth_copy_and_sum(skb,
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(unsigned char *)(lp->rx_skbuff[entry]->data),
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pkt_len, 0);
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pci_dma_sync_single_for_device(lp->pci_dev,
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lp->rx_dma_addr[entry],
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PKT_BUF_SZ - 2,
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PCI_DMA_FROMDEVICE);
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}
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lp->stats.rx_bytes += skb->len;
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skb->protocol = eth_type_trans(skb, dev);
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netif_rx(skb);
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dev->last_rx = jiffies;
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lp->stats.rx_packets++;
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return;
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}
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static void pcnet32_rx(struct net_device *dev)
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{
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struct pcnet32_private *lp = dev->priv;
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int entry = lp->cur_rx & lp->rx_mod_mask;
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struct pcnet32_rx_head *rxp = &lp->rx_ring[entry];
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int npackets = 0;
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int boguscnt = lp->rx_ring_size / 2;
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/* If we own the next entry, it's a new packet. Send it up. */
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while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
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int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
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if (status != 0x03) { /* There was an error. */
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/*
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* There is a tricky error noted by John Murphy,
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* <murf@perftech.com> to Russ Nelson: Even with full-sized
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* buffers it's possible for a jabber packet to use two
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* buffers, with only the last correctly noting the error.
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*/
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if (status & 0x01) /* Only count a general error at the */
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lp->stats.rx_errors++; /* end of a packet. */
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if (status & 0x20)
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lp->stats.rx_frame_errors++;
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if (status & 0x10)
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lp->stats.rx_over_errors++;
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if (status & 0x08)
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lp->stats.rx_crc_errors++;
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if (status & 0x04)
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lp->stats.rx_fifo_errors++;
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lp->rx_ring[entry].status &= le16_to_cpu(0x03ff);
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} else {
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/* Malloc up new buffer, compatible with net-2e. */
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short pkt_len =
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(le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)
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- 4;
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struct sk_buff *skb;
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/* Discard oversize frames. */
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if (unlikely(pkt_len > PKT_BUF_SZ - 2)) {
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if (netif_msg_drv(lp))
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printk(KERN_ERR
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"%s: Impossible packet size %d!\n",
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dev->name, pkt_len);
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lp->stats.rx_errors++;
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} else if (pkt_len < 60) {
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if (netif_msg_rx_err(lp))
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printk(KERN_ERR "%s: Runt packet!\n",
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dev->name);
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lp->stats.rx_errors++;
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} else {
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int rx_in_place = 0;
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if (pkt_len > rx_copybreak) {
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struct sk_buff *newskb;
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if ((newskb =
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dev_alloc_skb(PKT_BUF_SZ))) {
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skb_reserve(newskb, 2);
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skb = lp->rx_skbuff[entry];
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pci_unmap_single(lp->pci_dev,
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lp->
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rx_dma_addr
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[entry],
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PKT_BUF_SZ - 2,
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PCI_DMA_FROMDEVICE);
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skb_put(skb, pkt_len);
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lp->rx_skbuff[entry] = newskb;
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newskb->dev = dev;
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lp->rx_dma_addr[entry] =
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pci_map_single(lp->pci_dev,
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newskb->data,
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PKT_BUF_SZ -
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2,
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PCI_DMA_FROMDEVICE);
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lp->rx_ring[entry].base =
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le32_to_cpu(lp->
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rx_dma_addr
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[entry]);
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rx_in_place = 1;
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} else
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skb = NULL;
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} else {
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skb = dev_alloc_skb(pkt_len + 2);
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}
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if (skb == NULL) {
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int i;
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if (netif_msg_drv(lp))
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printk(KERN_ERR
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"%s: Memory squeeze, deferring packet.\n",
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dev->name);
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for (i = 0; i < lp->rx_ring_size; i++)
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if ((short)
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le16_to_cpu(lp->
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rx_ring[(entry +
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i)
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& lp->
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rx_mod_mask].
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status) < 0)
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break;
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if (i > lp->rx_ring_size - 2) {
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lp->stats.rx_dropped++;
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lp->rx_ring[entry].status |=
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le16_to_cpu(0x8000);
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wmb(); /* Make sure adapter sees owner change */
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lp->cur_rx++;
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}
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break;
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}
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skb->dev = dev;
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if (!rx_in_place) {
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skb_reserve(skb, 2); /* 16 byte align */
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skb_put(skb, pkt_len); /* Make room */
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pci_dma_sync_single_for_cpu(lp->pci_dev,
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lp->
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rx_dma_addr
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[entry],
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PKT_BUF_SZ -
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2,
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PCI_DMA_FROMDEVICE);
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eth_copy_and_sum(skb,
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(unsigned char *)(lp->
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rx_skbuff
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[entry]->
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data),
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pkt_len, 0);
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pci_dma_sync_single_for_device(lp->
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pci_dev,
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lp->
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rx_dma_addr
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[entry],
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PKT_BUF_SZ
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- 2,
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PCI_DMA_FROMDEVICE);
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}
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lp->stats.rx_bytes += skb->len;
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skb->protocol = eth_type_trans(skb, dev);
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netif_rx(skb);
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dev->last_rx = jiffies;
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lp->stats.rx_packets++;
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}
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}
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while (boguscnt > npackets && (short)le16_to_cpu(rxp->status) >= 0) {
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pcnet32_rx_entry(dev, lp, rxp, entry);
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npackets += 1;
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/*
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* The docs say that the buffer length isn't touched, but Andrew Boyd
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* of QNX reports that some revs of the 79C965 clear it.
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* The docs say that the buffer length isn't touched, but Andrew
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* Boyd of QNX reports that some revs of the 79C965 clear it.
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*/
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lp->rx_ring[entry].buf_length = le16_to_cpu(2 - PKT_BUF_SZ);
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wmb(); /* Make sure owner changes after all others are visible */
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lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
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rxp->buf_length = le16_to_cpu(2 - PKT_BUF_SZ);
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wmb(); /* Make sure owner changes after others are visible */
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rxp->status = le16_to_cpu(0x8000);
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entry = (++lp->cur_rx) & lp->rx_mod_mask;
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if (--boguscnt <= 0)
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break; /* don't stay in loop forever */
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rxp = &lp->rx_ring[entry];
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}
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return 0;
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return;
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}
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static int pcnet32_tx(struct net_device *dev, u16 csr0)
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@ -1298,7 +1277,7 @@ static int pcnet32_tx(struct net_device *dev, u16 csr0)
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lp->tx_ring[entry].base = 0;
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if (status & 0x4000) {
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/* There was an major error, log it. */
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/* There was a major error, log it. */
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int err_status = le32_to_cpu(lp->tx_ring[entry].misc);
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lp->stats.tx_errors++;
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if (netif_msg_tx_err(lp))
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@ -1329,8 +1308,7 @@ static int pcnet32_tx(struct net_device *dev, u16 csr0)
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if (!lp->dxsuflo) { /* If controller doesn't recover ... */
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/* Ackk! On FIFO errors the Tx unit is turned off! */
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/* Remove this verbosity later! */
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if (netif_msg_tx_err
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(lp))
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if (netif_msg_tx_err(lp))
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printk(KERN_ERR
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"%s: Tx FIFO error! CSR0=%4.4x\n",
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dev->name, csr0);
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@ -1350,16 +1328,14 @@ static int pcnet32_tx(struct net_device *dev, u16 csr0)
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lp->tx_dma_addr[entry],
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lp->tx_skbuff[entry]->
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len, PCI_DMA_TODEVICE);
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dev_kfree_skb_irq(lp->tx_skbuff[entry]);
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dev_kfree_skb_any(lp->tx_skbuff[entry]);
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lp->tx_skbuff[entry] = NULL;
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lp->tx_dma_addr[entry] = 0;
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}
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dirty_tx++;
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}
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delta =
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(lp->cur_tx - dirty_tx) & (lp->tx_mod_mask +
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lp->tx_ring_size);
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delta = (lp->cur_tx - dirty_tx) & (lp->tx_mod_mask + lp->tx_ring_size);
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if (delta > lp->tx_ring_size) {
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if (netif_msg_drv(lp))
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printk(KERN_ERR
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@ -2535,19 +2511,20 @@ pcnet32_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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spin_lock(&lp->lock);
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while ((csr0 = lp->a.read_csr(ioaddr, 0)) & 0x8f00 && --boguscnt >= 0) {
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csr0 = lp->a.read_csr(ioaddr, CSR0);
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while ((csr0 & 0x8f00) && --boguscnt >= 0) {
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if (csr0 == 0xffff) {
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break; /* PCMCIA remove happened */
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}
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/* Acknowledge all of the current interrupt sources ASAP. */
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lp->a.write_csr(ioaddr, 0, csr0 & ~0x004f);
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lp->a.write_csr(ioaddr, CSR0, csr0 & ~0x004f);
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must_restart = 0;
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if (netif_msg_intr(lp))
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printk(KERN_DEBUG
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"%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
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dev->name, csr0, lp->a.read_csr(ioaddr, 0));
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dev->name, csr0, lp->a.read_csr(ioaddr, CSR0));
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if (csr0 & 0x0400) /* Rx interrupt */
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pcnet32_rx(dev);
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@ -2561,14 +2538,16 @@ pcnet32_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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lp->stats.tx_errors++; /* Tx babble. */
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if (csr0 & 0x1000) {
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/*
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* this happens when our receive ring is full. This shouldn't
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* be a problem as we will see normal rx interrupts for the frames
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* in the receive ring. But there are some PCI chipsets (I can
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* reproduce this on SP3G with Intel saturn chipset) which have
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* sometimes problems and will fill up the receive ring with
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* error descriptors. In this situation we don't get a rx
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* interrupt, but a missed frame interrupt sooner or later.
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* So we try to clean up our receive ring here.
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* This happens when our receive ring is full. This
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* shouldn't be a problem as we will see normal rx
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* interrupts for the frames in the receive ring. But
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* there are some PCI chipsets (I can reproduce this
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* on SP3G with Intel saturn chipset) which have
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* sometimes problems and will fill up the receive
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* ring with error descriptors. In this situation we
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* don't get a rx interrupt, but a missed frame
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* interrupt sooner or later. So we try to clean up
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* our receive ring here.
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*/
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pcnet32_rx(dev);
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lp->stats.rx_errors++; /* Missed a Rx frame. */
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@ -2588,6 +2567,7 @@ pcnet32_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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pcnet32_restart(dev, CSR0_START);
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netif_wake_queue(dev);
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}
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csr0 = lp->a.read_csr(ioaddr, CSR0);
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}
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/* Set interrupt enable. */
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