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[IA64] pvops: add hooks, pv_iosapic_ops, to paravirtualize iosapic.
add hooks to paravirtualize iosapic which is a real hardware resource. On virtualized environment it may be replaced something virtualized friendly. Define pv_iosapic_ops and add the hooks. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
parent
e51835d58a
commit
33b39e8420
4 changed files with 110 additions and 18 deletions
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@ -587,6 +587,15 @@ static inline int irq_is_shared (int irq)
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return (iosapic_intr_info[irq].count > 1);
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return (iosapic_intr_info[irq].count > 1);
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}
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}
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struct irq_chip*
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ia64_native_iosapic_get_irq_chip(unsigned long trigger)
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{
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if (trigger == IOSAPIC_EDGE)
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return &irq_type_iosapic_edge;
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else
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return &irq_type_iosapic_level;
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}
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static int
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static int
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register_intr (unsigned int gsi, int irq, unsigned char delivery,
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register_intr (unsigned int gsi, int irq, unsigned char delivery,
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unsigned long polarity, unsigned long trigger)
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unsigned long polarity, unsigned long trigger)
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@ -637,13 +646,10 @@ register_intr (unsigned int gsi, int irq, unsigned char delivery,
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iosapic_intr_info[irq].dmode = delivery;
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iosapic_intr_info[irq].dmode = delivery;
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iosapic_intr_info[irq].trigger = trigger;
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iosapic_intr_info[irq].trigger = trigger;
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if (trigger == IOSAPIC_EDGE)
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irq_type = iosapic_get_irq_chip(trigger);
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irq_type = &irq_type_iosapic_edge;
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else
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irq_type = &irq_type_iosapic_level;
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idesc = irq_desc + irq;
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idesc = irq_desc + irq;
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if (idesc->chip != irq_type) {
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if (irq_type != NULL && idesc->chip != irq_type) {
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if (idesc->chip != &no_irq_type)
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if (idesc->chip != &no_irq_type)
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printk(KERN_WARNING
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printk(KERN_WARNING
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"%s: changing vector %d from %s to %s\n",
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"%s: changing vector %d from %s to %s\n",
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@ -975,6 +981,22 @@ iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
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set_rte(gsi, irq, dest, 1);
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set_rte(gsi, irq, dest, 1);
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}
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}
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void __init
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ia64_native_iosapic_pcat_compat_init(void)
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{
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if (pcat_compat) {
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/*
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* Disable the compatibility mode interrupts (8259 style),
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* needs IN/OUT support enabled.
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*/
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printk(KERN_INFO
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"%s: Disabling PC-AT compatible 8259 interrupts\n",
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__func__);
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outb(0xff, 0xA1);
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outb(0xff, 0x21);
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}
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}
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void __init
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void __init
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iosapic_system_init (int system_pcat_compat)
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iosapic_system_init (int system_pcat_compat)
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{
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{
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@ -989,17 +1011,8 @@ iosapic_system_init (int system_pcat_compat)
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}
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}
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pcat_compat = system_pcat_compat;
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pcat_compat = system_pcat_compat;
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if (pcat_compat) {
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if (pcat_compat)
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/*
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iosapic_pcat_compat_init();
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* Disable the compatibility mode interrupts (8259 style),
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* needs IN/OUT support enabled.
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*/
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printk(KERN_INFO
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"%s: Disabling PC-AT compatible 8259 interrupts\n",
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__func__);
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outb(0xff, 0xA1);
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outb(0xff, 0x21);
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}
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}
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}
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static inline int
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static inline int
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@ -312,3 +312,28 @@ paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch)
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cpu_asm_switch->work_processed_syscall;
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cpu_asm_switch->work_processed_syscall;
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paravirt_leave_kernel_targ = cpu_asm_switch->leave_kernel;
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paravirt_leave_kernel_targ = cpu_asm_switch->leave_kernel;
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}
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}
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/***************************************************************************
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* pv_iosapic_ops
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* iosapic read/write hooks.
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*/
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static unsigned int
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ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg)
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{
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return __ia64_native_iosapic_read(iosapic, reg);
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}
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static void
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ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
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{
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__ia64_native_iosapic_write(iosapic, reg, val);
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}
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struct pv_iosapic_ops pv_iosapic_ops = {
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.pcat_compat_init = ia64_native_iosapic_pcat_compat_init,
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.get_irq_chip = ia64_native_iosapic_get_irq_chip,
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.__read = ia64_native_iosapic_read,
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.__write = ia64_native_iosapic_write,
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};
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@ -55,13 +55,27 @@
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#define NR_IOSAPICS 256
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#define NR_IOSAPICS 256
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static inline unsigned int __iosapic_read(char __iomem *iosapic, unsigned int reg)
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#ifdef CONFIG_PARAVIRT_GUEST
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#include <asm/paravirt.h>
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#else
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#define iosapic_pcat_compat_init ia64_native_iosapic_pcat_compat_init
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#define __iosapic_read __ia64_native_iosapic_read
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#define __iosapic_write __ia64_native_iosapic_write
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#define iosapic_get_irq_chip ia64_native_iosapic_get_irq_chip
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#endif
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extern void __init ia64_native_iosapic_pcat_compat_init(void);
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extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger);
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static inline unsigned int
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__ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg)
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{
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{
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writel(reg, iosapic + IOSAPIC_REG_SELECT);
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writel(reg, iosapic + IOSAPIC_REG_SELECT);
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return readl(iosapic + IOSAPIC_WINDOW);
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return readl(iosapic + IOSAPIC_WINDOW);
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}
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}
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static inline void __iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
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static inline void
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__ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
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{
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{
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writel(reg, iosapic + IOSAPIC_REG_SELECT);
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writel(reg, iosapic + IOSAPIC_REG_SELECT);
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writel(val, iosapic + IOSAPIC_WINDOW);
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writel(val, iosapic + IOSAPIC_WINDOW);
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@ -112,6 +112,46 @@ static inline void paravirt_post_smp_prepare_boot_cpu(void)
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pv_init_ops.post_smp_prepare_boot_cpu();
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pv_init_ops.post_smp_prepare_boot_cpu();
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}
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}
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/******************************************************************************
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* replacement of iosapic operations.
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*/
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struct pv_iosapic_ops {
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void (*pcat_compat_init)(void);
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struct irq_chip *(*get_irq_chip)(unsigned long trigger);
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unsigned int (*__read)(char __iomem *iosapic, unsigned int reg);
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void (*__write)(char __iomem *iosapic, unsigned int reg, u32 val);
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};
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extern struct pv_iosapic_ops pv_iosapic_ops;
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static inline void
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iosapic_pcat_compat_init(void)
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{
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if (pv_iosapic_ops.pcat_compat_init)
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pv_iosapic_ops.pcat_compat_init();
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}
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static inline struct irq_chip*
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iosapic_get_irq_chip(unsigned long trigger)
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{
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return pv_iosapic_ops.get_irq_chip(trigger);
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}
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static inline unsigned int
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__iosapic_read(char __iomem *iosapic, unsigned int reg)
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{
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return pv_iosapic_ops.__read(iosapic, reg);
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}
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static inline void
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__iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
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{
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return pv_iosapic_ops.__write(iosapic, reg, val);
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* !__ASSEMBLY__ */
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#else
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#else
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