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[PATCH] frv: drop 8/16-bit xchg and cmpxchg
Drop support for 8-bit and 16-bit xchg and cmpxchg emulation and implements 32-bit xchg with the SWAP/SWAPI instruction. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
David Howells
Linus Torvalds
parent
2919b51075
commit
2fa9e7e2dc
2 changed files with 5 additions and 183 deletions
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@ -127,48 +127,6 @@ atomic_sub_return:
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.size atomic_sub_return, .-atomic_sub_return
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###############################################################################
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#
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# uint8_t __xchg_8(uint8_t i, uint8_t *v)
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#
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###############################################################################
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.globl __xchg_8
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.type __xchg_8,@function
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__xchg_8:
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or.p gr8,gr8,gr10
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0:
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orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
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ckeq icc3,cc7
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ldub.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */
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orcr cc7,cc7,cc3 /* set CC3 to true */
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cstb.p gr10,@(gr9,gr0) ,cc3,#1
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corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
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beq icc3,#0,0b
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bralr
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.size __xchg_8, .-__xchg_8
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###############################################################################
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#
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# uint16_t __xchg_16(uint16_t i, uint16_t *v)
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#
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###############################################################################
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.globl __xchg_16
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.type __xchg_16,@function
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__xchg_16:
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or.p gr8,gr8,gr10
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0:
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orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
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ckeq icc3,cc7
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lduh.p @(gr9,gr0),gr8 /* LD.P/ORCR must be atomic */
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orcr cc7,cc7,cc3 /* set CC3 to true */
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csth.p gr10,@(gr9,gr0) ,cc3,#1
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corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
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beq icc3,#0,0b
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bralr
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.size __xchg_16, .-__xchg_16
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###############################################################################
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#
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# uint32_t __xchg_32(uint32_t i, uint32_t *v)
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@ -190,56 +148,6 @@ __xchg_32:
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.size __xchg_32, .-__xchg_32
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###############################################################################
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#
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# uint8_t __cmpxchg_8(uint8_t *v, uint8_t test, uint8_t new)
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#
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###############################################################################
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.globl __cmpxchg_8
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.type __cmpxchg_8,@function
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__cmpxchg_8:
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or.p gr8,gr8,gr11
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0:
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orcc gr0,gr0,gr0,icc3
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ckeq icc3,cc7
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ldub.p @(gr11,gr0),gr8
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orcr cc7,cc7,cc3
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sub gr8,gr9,gr7
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sllicc gr7,#24,gr0,icc0
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bne icc0,#0,1f
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cstb.p gr10,@(gr11,gr0) ,cc3,#1
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corcc gr29,gr29,gr0 ,cc3,#1
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beq icc3,#0,0b
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1:
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bralr
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.size __cmpxchg_8, .-__cmpxchg_8
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###############################################################################
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#
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# uint16_t __cmpxchg_16(uint16_t *v, uint16_t test, uint16_t new)
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#
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###############################################################################
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.globl __cmpxchg_16
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.type __cmpxchg_16,@function
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__cmpxchg_16:
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or.p gr8,gr8,gr11
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0:
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orcc gr0,gr0,gr0,icc3
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ckeq icc3,cc7
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lduh.p @(gr11,gr0),gr8
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orcr cc7,cc7,cc3
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sub gr8,gr9,gr7
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sllicc gr7,#16,gr0,icc0
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bne icc0,#0,1f
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csth.p gr10,@(gr11,gr0) ,cc3,#1
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corcc gr29,gr29,gr0 ,cc3,#1
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beq icc3,#0,0b
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1:
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bralr
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.size __cmpxchg_16, .-__cmpxchg_16
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###############################################################################
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#
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# uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new)
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@ -218,51 +218,12 @@ extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsig
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__typeof__(*(ptr)) __xg_orig; \
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\
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switch (sizeof(__xg_orig)) { \
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case 1: \
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asm volatile( \
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"0: \n" \
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" orcc gr0,gr0,gr0,icc3 \n" \
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" ckeq icc3,cc7 \n" \
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" ldub.p %M0,%1 \n" \
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" orcr cc7,cc7,cc3 \n" \
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" cstb.p %2,%M0 ,cc3,#1 \n" \
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" \
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" beq icc3,#0,0b \n" \
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: "+U"(*__xg_ptr), "=&r"(__xg_orig) \
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: "r"(x) \
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: "memory", "cc7", "cc3", "icc3" \
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); \
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break; \
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\
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case 2: \
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asm volatile( \
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"0: \n" \
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" orcc gr0,gr0,gr0,icc3 \n" \
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" ckeq icc3,cc7 \n" \
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" lduh.p %M0,%1 \n" \
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" orcr cc7,cc7,cc3 \n" \
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" csth.p %2,%M0 ,cc3,#1 \n" \
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" \
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" beq icc3,#0,0b \n" \
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: "+U"(*__xg_ptr), "=&r"(__xg_orig) \
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: "r"(x) \
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: "memory", "cc7", "cc3", "icc3" \
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); \
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break; \
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\
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case 4: \
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asm volatile( \
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"0: \n" \
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" orcc gr0,gr0,gr0,icc3 \n" \
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" ckeq icc3,cc7 \n" \
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" ld.p %M0,%1 \n" \
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" orcr cc7,cc7,cc3 \n" \
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" cst.p %2,%M0 ,cc3,#1 \n" \
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" \
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" beq icc3,#0,0b \n" \
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: "+U"(*__xg_ptr), "=&r"(__xg_orig) \
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"swap%I0 %2,%M0" \
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: "+m"(*__xg_ptr), "=&r"(__xg_orig) \
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: "r"(x) \
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: "memory", "cc7", "cc3", "icc3" \
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: "memory" \
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); \
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break; \
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\
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@ -277,8 +238,6 @@ extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsig
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#else
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extern uint8_t __xchg_8 (uint8_t i, volatile void *v);
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extern uint16_t __xchg_16(uint16_t i, volatile void *v);
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extern uint32_t __xchg_32(uint32_t i, volatile void *v);
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#define xchg(ptr, x) \
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@ -287,8 +246,6 @@ extern uint32_t __xchg_32(uint32_t i, volatile void *v);
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__typeof__(*(ptr)) __xg_orig; \
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\
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switch (sizeof(__xg_orig)) { \
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case 1: __xg_orig = (__typeof__(*(ptr))) __xchg_8 ((uint8_t) x, __xg_ptr); break; \
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case 2: __xg_orig = (__typeof__(*(ptr))) __xchg_16((uint16_t) x, __xg_ptr); break; \
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case 4: __xg_orig = (__typeof__(*(ptr))) __xchg_32((uint32_t) x, __xg_ptr); break; \
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default: \
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__xg_orig = 0; \
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@ -318,46 +275,6 @@ extern uint32_t __xchg_32(uint32_t i, volatile void *v);
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__typeof__(*(ptr)) __xg_new = (new); \
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\
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switch (sizeof(__xg_orig)) { \
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case 1: \
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asm volatile( \
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"0: \n" \
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" orcc gr0,gr0,gr0,icc3 \n" \
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" ckeq icc3,cc7 \n" \
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" ldub.p %M0,%1 \n" \
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" orcr cc7,cc7,cc3 \n" \
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" sub%I4 %1,%4,%2 \n" \
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" sllcc %2,#24,gr0,icc0 \n" \
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" bne icc0,#0,1f \n" \
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" cstb.p %3,%M0 ,cc3,#1 \n" \
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" \
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" beq icc3,#0,0b \n" \
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"1: \n" \
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: "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp) \
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: "r"(__xg_new), "NPr"(__xg_test) \
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: "memory", "cc7", "cc3", "icc3", "icc0" \
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); \
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break; \
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\
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case 2: \
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asm volatile( \
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"0: \n" \
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" orcc gr0,gr0,gr0,icc3 \n" \
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" ckeq icc3,cc7 \n" \
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" lduh.p %M0,%1 \n" \
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" orcr cc7,cc7,cc3 \n" \
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" sub%I4 %1,%4,%2 \n" \
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" sllcc %2,#16,gr0,icc0 \n" \
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" bne icc0,#0,1f \n" \
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" csth.p %3,%M0 ,cc3,#1 \n" \
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" \
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" beq icc3,#0,0b \n" \
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"1: \n" \
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: "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp) \
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: "r"(__xg_new), "NPr"(__xg_test) \
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: "memory", "cc7", "cc3", "icc3", "icc0" \
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); \
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break; \
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\
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case 4: \
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asm volatile( \
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"0: \n" \
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@ -388,8 +305,6 @@ extern uint32_t __xchg_32(uint32_t i, volatile void *v);
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#else
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extern uint8_t __cmpxchg_8 (uint8_t *v, uint8_t test, uint8_t new);
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extern uint16_t __cmpxchg_16(uint16_t *v, uint16_t test, uint16_t new);
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extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
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#define cmpxchg(ptr, test, new) \
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@ -400,8 +315,6 @@ extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
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__typeof__(*(ptr)) __xg_new = (new); \
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\
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switch (sizeof(__xg_orig)) { \
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case 1: __xg_orig = __cmpxchg_8 (__xg_ptr, __xg_test, __xg_new); break; \
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case 2: __xg_orig = __cmpxchg_16(__xg_ptr, __xg_test, __xg_new); break; \
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case 4: __xg_orig = __cmpxchg_32(__xg_ptr, __xg_test, __xg_new); break; \
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default: \
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__xg_orig = 0; \
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@ -414,7 +327,7 @@ extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
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#endif
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#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new))
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#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
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#define atomic_add_unless(v, a, u) \
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({ \
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@ -424,6 +337,7 @@ extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
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c = old; \
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c != (u); \
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})
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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#include <asm-generic/atomic.h>
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