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async_tx, dmaengine: document channel allocation and api rework
"Wouldn't it be better if the dmaengine layer made sure it didn't pass the same channel several times to a client? I mean, you seem concerned that the memcpy() API should be transparent and easy to use, but the whole registration interface is just ridiculously complicated..." - Haavard The dmaengine and async_tx registration/allocation interface is indeed needlessly complicated. This redesign has the following goals: 1/ Simplify reference counting: dma channels are not something one would expect to be hotplugged, it should be an exceptional event handled by drivers not something clients should be mandated to handle in a callback. The common case channel removal event is 'rmmod <dma driver>', which for simplicity should be disallowed if the channel is in use. 2/ Add an interface for requesting exclusive access to a channel suitable to device-to-memory users. 3/ Convert all memory-to-memory users over to a common allocator, the goal here is to not have competing channel allocation schemes. The only competition should be between device-to-memory exclusive allocations and the memory-to-memory usage case where channels are shared between multiple "clients". Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Neil Brown <neilb@suse.de> Cc: Jeff Garzik <jeff@garzik.org> Reviewed-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@ -13,9 +13,9 @@
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3.6 Constraints
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3.6 Constraints
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3.7 Example
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3.7 Example
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4 DRIVER DEVELOPER NOTES
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4 DMAENGINE DRIVER DEVELOPER NOTES
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4.1 Conformance points
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4.1 Conformance points
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4.2 "My application needs finer control of hardware channels"
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4.2 "My application needs exclusive control of hardware channels"
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5 SOURCE
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5 SOURCE
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@ -150,6 +150,7 @@ ops_run_* and ops_complete_* routines in drivers/md/raid5.c for more
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implementation examples.
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implementation examples.
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4 DRIVER DEVELOPMENT NOTES
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4 DRIVER DEVELOPMENT NOTES
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4.1 Conformance points:
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4.1 Conformance points:
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There are a few conformance points required in dmaengine drivers to
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There are a few conformance points required in dmaengine drivers to
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accommodate assumptions made by applications using the async_tx API:
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accommodate assumptions made by applications using the async_tx API:
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@ -158,58 +159,49 @@ accommodate assumptions made by applications using the async_tx API:
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3/ Use async_tx_run_dependencies() in the descriptor clean up path to
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3/ Use async_tx_run_dependencies() in the descriptor clean up path to
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handle submission of dependent operations
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handle submission of dependent operations
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4.2 "My application needs finer control of hardware channels"
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4.2 "My application needs exclusive control of hardware channels"
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This requirement seems to arise from cases where a DMA engine driver is
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Primarily this requirement arises from cases where a DMA engine driver
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trying to support device-to-memory DMA. The dmaengine and async_tx
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is being used to support device-to-memory operations. A channel that is
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implementations were designed for offloading memory-to-memory
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performing these operations cannot, for many platform specific reasons,
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operations; however, there are some capabilities of the dmaengine layer
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be shared. For these cases the dma_request_channel() interface is
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that can be used for platform-specific channel management.
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provided.
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Platform-specific constraints can be handled by registering the
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application as a 'dma_client' and implementing a 'dma_event_callback' to
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apply a filter to the available channels in the system. Before showing
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how to implement a custom dma_event callback some background of
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dmaengine's client support is required.
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The following routines in dmaengine support multiple clients requesting
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The interface is:
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use of a channel:
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struct dma_chan *dma_request_channel(dma_cap_mask_t mask,
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- dma_async_client_register(struct dma_client *client)
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dma_filter_fn filter_fn,
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- dma_async_client_chan_request(struct dma_client *client)
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void *filter_param);
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dma_async_client_register takes a pointer to an initialized dma_client
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Where dma_filter_fn is defined as:
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structure. It expects that the 'event_callback' and 'cap_mask' fields
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typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
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are already initialized.
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dma_async_client_chan_request triggers dmaengine to notify the client of
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When the optional 'filter_fn' parameter is set to NULL
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all channels that satisfy the capability mask. It is up to the client's
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dma_request_channel simply returns the first channel that satisfies the
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event_callback routine to track how many channels the client needs and
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capability mask. Otherwise, when the mask parameter is insufficient for
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how many it is currently using. The dma_event_callback routine returns a
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specifying the necessary channel, the filter_fn routine can be used to
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dma_state_client code to let dmaengine know the status of the
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disposition the available channels in the system. The filter_fn routine
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allocation.
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is called once for each free channel in the system. Upon seeing a
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suitable channel filter_fn returns DMA_ACK which flags that channel to
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be the return value from dma_request_channel. A channel allocated via
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this interface is exclusive to the caller, until dma_release_channel()
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is called.
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Below is the example of how to extend this functionality for
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The DMA_PRIVATE capability flag is used to tag dma devices that should
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platform-specific filtering of the available channels beyond the
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not be used by the general-purpose allocator. It can be set at
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standard capability mask:
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initialization time if it is known that a channel will always be
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private. Alternatively, it is set when dma_request_channel() finds an
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unused "public" channel.
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static enum dma_state_client
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A couple caveats to note when implementing a driver and consumer:
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my_dma_client_callback(struct dma_client *client,
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1/ Once a channel has been privately allocated it will no longer be
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struct dma_chan *chan, enum dma_state state)
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considered by the general-purpose allocator even after a call to
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{
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dma_release_channel().
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struct dma_device *dma_dev;
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2/ Since capabilities are specified at the device level a dma_device
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struct my_platform_specific_dma *plat_dma_dev;
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with multiple channels will either have all channels public, or all
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channels private.
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dma_dev = chan->device;
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plat_dma_dev = container_of(dma_dev,
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struct my_platform_specific_dma,
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dma_dev);
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if (!plat_dma_dev->platform_specific_capability)
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return DMA_DUP;
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. . .
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}
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5 SOURCE
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5 SOURCE
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include/linux/dmaengine.h: core header file for DMA drivers and clients
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include/linux/dmaengine.h: core header file for DMA drivers and api users
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drivers/dma/dmaengine.c: offload engine channel management routines
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drivers/dma/dmaengine.c: offload engine channel management routines
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drivers/dma/: location for offload engine drivers
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drivers/dma/: location for offload engine drivers
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include/linux/async_tx.h: core header file for the async_tx api
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include/linux/async_tx.h: core header file for the async_tx api
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1
Documentation/dmaengine.txt
Normal file
1
Documentation/dmaengine.txt
Normal file
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@ -0,0 +1 @@
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See Documentation/crypto/async-tx-api.txt
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