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Cleaned up AMD Au1200 IDE driver:

Browse source 
- converted to platform bus
- removed pci dependencies
- removed virt_to_phys/phys_to_virt calls
    
System now can root off of a disk.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/Documentation/mips/AU1xxx_IDE.README b/Documentation/mips/AU1xxx_IDE.README
new file mode 100644
This commit is contained in:
Pete Popov 2005-09-15 08:03:12 +00:00 committed by Ralf Baechle
parent 64abf64d10
commit 26a940e217
12 changed files with 1840 additions and 7 deletions
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168
Documentation/mips/AU1xxx_IDE.README Normal file
View file

@ -0,0 +1,168 @@
README for MIPS AU1XXX IDE driver - Released 2005-07-15
ABOUT
-----
This file describes the 'drivers/ide/mips/au1xxx-ide.c', related files and the
services they provide.
If you are short in patience and just want to know how to add your hard disc to
the white or black list, go to the 'ADD NEW HARD DISC TO WHITE OR BLACK LIST'
section.
LICENSE
-------
Copyright (c) 2003-2005 AMD, Personal Connectivity Solutions
This program is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any later
version.
THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR
BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
You should have received a copy of the GNU General Public License along with
this program; if not, write to the Free Software Foundation, Inc.,
675 Mass Ave, Cambridge, MA 02139, USA.
Note: for more information, please refer "AMD Alchemy Au1200/Au1550 IDE
Interface and Linux Device Driver" Application Note.
FILES, CONFIGS AND COMPATABILITY
--------------------------------
Two files are introduced:
a) 'include/asm-mips/mach-au1x00/au1xxx_ide.h'
containes : struct _auide_hwif
struct drive_list_entry dma_white_list
struct drive_list_entry dma_black_list
timing parameters for PIO mode 0/1/2/3/4
timing parameters for MWDMA 0/1/2
b) 'drivers/ide/mips/au1xxx-ide.c'
contains the functionality of the AU1XXX IDE driver
Four configs variables are introduced:
CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA - enable the PIO+DBDMA mode
CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA - enable the MWDMA mode
CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON - set Burstable FIFO in DBDMA
controler
CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ - maximum transfer size
per descriptor
If MWDMA is enabled and the connected hard disc is not on the white list, the
kernel switches to a "safe mwdma mode" at boot time. In this mode the IDE
performance is substantial slower then in full speed mwdma. In this case
please add your hard disc to the white list (follow instruction from 'ADD NEW
HARD DISC TO WHITE OR BLACK LIST' section).
SUPPORTED IDE MODES
-------------------
The AU1XXX IDE driver supported all PIO modes - PIO mode 0/1/2/3/4 - and all
MWDMA modes - MWDMA 0/1/2 -. There is no support for SWDMA and UDMA mode.
To change the PIO mode use the program hdparm with option -p, e.g.
'hdparm -p0 [device]' for PIO mode 0. To enable the MWDMA mode use the option
-X, e.g. 'hdparm -X32 [device]' for MWDMA mode 0.
PERFORMANCE CONFIGURATIONS
--------------------------
If the used system doesn't need USB support enable the following kernel configs:
CONFIG_IDE=y
CONFIG_BLK_DEV_IDE=y
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_BLK_DEV_GENERIC=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_IDEDMA_PCI_AUTO=y
CONFIG_BLK_DEV_IDE_AU1XXX=y
CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA=y
CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON=y
CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ=128
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_IDEDMA_AUTO=y
If the used system need the USB support enable the following kernel configs for
high IDE to USB throughput.
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_BLK_DEV_GENERIC=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_IDEDMA_PCI_AUTO=y
CONFIG_BLK_DEV_IDE_AU1XXX=y
CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA=y
CONFIG_BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ=128
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_IDEDMA_AUTO=y
ADD NEW HARD DISC TO WHITE OR BLACK LIST
----------------------------------------
Step 1 : detect the model name of your hard disc
a) connect your hard disc to the AU1XXX
b) boot your kernel and get the hard disc model.
Example boot log:
--snipped--
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
Au1xxx IDE(builtin) configured for MWDMA2
Probing IDE interface ide0...
hda: Maxtor 6E040L0, ATA DISK drive
ide0 at 0xac800000-0xac800007,0xac8001c0 on irq 64
hda: max request size: 64KiB
hda: 80293248 sectors (41110 MB) w/2048KiB Cache, CHS=65535/16/63, (U)DMA
--snipped--
In this example 'Maxtor 6E040L0'.
Step 2 : edit 'include/asm-mips/mach-au1x00/au1xxx_ide.h'
Add your hard disc to the dma_white_list or dma_black_list structur.
Step 3 : Recompile the kernel
Enable MWDMA support in the kernel configuration. Recompile the kernel and
reboot.
Step 4 : Tests
If you have add a hard disc to the white list, please run some stress tests
for verification.
ACKNOWLEDGMENTS
---------------
These drivers wouldn't have been done without the base of kernel 2.4.x AU1XXX
IDE driver from AMD.
Additional input also from:
Matthias Lenk <matthias.lenk@amd.com>
Happy hacking!
Enrico Walther <enrico.walther@amd.com>

2
arch/mips/Kconfig
View file

@ -799,7 +799,7 @@ config MIPS_BOSPORUS
config MIPS_DB1200
bool "AMD Alchemy DB1200 board"
select SOC_AU1200
select DMA_NONCOHERENT
select DMA_COHERENT
select MIPS_DISABLE_OBSOLETE_IDE
select SYS_SUPPORTS_LITTLE_ENDIAN

6
arch/mips/au1000/common/dbdma.c
View file

@ -197,6 +197,12 @@ find_dbdev_id (u32 id)
return NULL;
}
void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp)
{
return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
}
EXPORT_SYMBOL(au1xxx_ddma_get_nextptr_virt);
u32
au1xxx_ddma_add_device(dbdev_tab_t *dev)
{

32
arch/mips/au1000/common/platform.c
View file

@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/resource.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1xxx.h>
/* OHCI (USB full speed host controller) */
static struct resource au1xxx_usb_ohci_resources[] = {
@ -154,7 +154,6 @@ static struct platform_device au1xxx_usb_otg_device = {
.resource = au1xxx_usb_otg_resources,
};
/*** AU1200 LCD controller ***/
static struct resource au1200_lcd_resources[] = {
[0] = {
.start = LCD_PHYS_ADDR,
@ -168,6 +167,19 @@ static struct resource au1200_lcd_resources[] = {
}
};
static struct resource au1200_ide0_resources[] = {
[0] = {
.start = AU1XXX_ATA_PHYS_ADDR,
.end = AU1XXX_ATA_PHYS_ADDR + AU1XXX_ATA_PHYS_LEN,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AU1XXX_ATA_INT,
.end = AU1XXX_ATA_INT,
.flags = IORESOURCE_IRQ,
}
};
static u64 au1200_lcd_dmamask = ~(u32)0;
static struct platform_device au1200_lcd_device = {
@ -180,6 +192,21 @@ static struct platform_device au1200_lcd_device = {
.num_resources = ARRAY_SIZE(au1200_lcd_resources),
.resource = au1200_lcd_resources,
};
static u64 ide0_dmamask = ~(u32)0;
static struct platform_device au1200_ide0_device = {
.name = "au1200-ide",
.id = 0,
.dev = {
.dma_mask = &ide0_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(au1200_ide0_resources),
.resource = au1200_ide0_resources,
};
#endif
static struct platform_device *au1xxx_platform_devices[] __initdata = {
@ -194,6 +221,7 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
&au1xxx_usb_gdt_device,
&au1xxx_usb_otg_device,
&au1200_lcd_device,
&au1200_ide0_device,
#endif
};

6
arch/mips/au1000/pb1200/irqmap.c
View file

@ -22,6 +22,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
@ -65,7 +66,7 @@ int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
*/
static volatile int pb1200_cascade_en=0;
void pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
irqreturn_t pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
{
unsigned short bisr = bcsr->int_status;
int extirq_nr = 0;
@ -78,6 +79,7 @@ void pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
/* Ack and dispatch IRQ */
do_IRQ(extirq_nr,regs);
}
return IRQ_RETVAL(1);
}
inline void pb1200_enable_irq(unsigned int irq_nr)
@ -97,7 +99,7 @@ static unsigned int pb1200_startup_irq( unsigned int irq_nr )
if (++pb1200_cascade_en == 1)
{
request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
0, "Pb1200 Cascade", &pb1200_cascade_handler );
0, "Pb1200 Cascade", (void *)&pb1200_cascade_handler );
#ifdef CONFIG_MIPS_PB1200
/* We have a problem with CPLD rev3. Enable a workaround */
if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)

31
drivers/ide/Kconfig
View file

@ -778,6 +778,35 @@ config BLK_DEV_IDE_PMAC_BLINK
This option enables the use of the sleep LED as a hard drive
activity LED.
config BLK_DEV_IDE_AU1XXX
bool "IDE for AMD Alchemy Au1200"
depends on SOC_AU1200
choice
prompt "IDE Mode for AMD Alchemy Au1200"
default CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA
depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
config BLK_DEV_IDE_AU1XXX_PIO_DBDMA
bool "PIO+DbDMA IDE for AMD Alchemy Au1200"
config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
bool "MDMA2+DbDMA IDE for AMD Alchemy Au1200"
depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
endchoice
config BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
bool "Enable burstable Mode on DbDMA"
default false
depends BLK_DEV_IDE_AU1XXX
help
This option enable the burstable Flag on DbDMA controller
(cf. "AMD Alchemy 'Au1200' Processor Data Book - PRELIMINARY").
config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
int "Maximum transfer size (KB) per request (up to 128)"
default "128"
depends BLK_DEV_IDE_AU1XXX
config IDE_ARM
def_bool ARM && (ARCH_A5K || ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK)
@ -1013,7 +1042,7 @@ config BLK_DEV_UMC8672
endif
config BLK_DEV_IDEDMA
def_bool BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS
def_bool BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS || BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
config IDEDMA_IVB
bool "IGNORE word93 Validation BITS"

1
drivers/ide/ide-proc.c
View file

@ -64,6 +64,7 @@ static int proc_ide_read_imodel
case ide_cy82c693: name = "cy82c693"; break;
case ide_4drives: name = "4drives"; break;
case ide_pmac: name = "mac-io"; break;
case ide_au1xxx: name = "au1xxx"; break;
default: name = "(unknown)"; break;
}
len = sprintf(page, "%s\n", name);

1250
drivers/ide/mips/au1xxx-ide.c Normal file
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File diff suppressed because it is too large Load diff

44
include/asm-mips/mach-au1x00/au1xxx.h Normal file
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@ -0,0 +1,44 @@
/*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _AU1XXX_H_
#define _AU1XXX_H_
#include <linux/config.h>
#include <asm/mach-au1x00/au1000.h>
#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550)
#include <asm/mach-db1x00/db1x00.h>
#elif defined(CONFIG_MIPS_PB1550)
#include <asm/mach-pb1x00/pb1550.h>
#elif defined(CONFIG_MIPS_PB1200)
#include <asm/mach-pb1x00/pb1200.h>
#elif defined(CONFIG_MIPS_DB1200)
#include <asm/mach-db1x00/db1200.h>
#endif
#endif /* _AU1XXX_H_ */

4
include/asm-mips/mach-au1x00/au1xxx_dbdma.h
View file

@ -368,6 +368,7 @@ void au1xxx_dbdma_dump(u32 chanid);
u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp);
/*
Some compatibilty macros --
@ -375,9 +376,12 @@ u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
*/
#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
#define put_source_flags(chanid,buf,nbytes,flags) au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags)
#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
#define put_dest_flags(chanid,buf,nbytes,flags) au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags)
/*
* Flags for the put_source/put_dest functions.

301
include/asm-mips/mach-au1x00/au1xxx_ide.h Normal file
View file

@ -0,0 +1,301 @@
/*
* include/asm-mips/mach-au1x00/au1xxx_ide.h version 01.30.00 Aug. 02 2005
*
* BRIEF MODULE DESCRIPTION
* AMD Alchemy Au1xxx IDE interface routines over the Static Bus
*
* Copyright (c) 2003-2005 AMD, Personal Connectivity Solutions
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any later
* version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Note: for more information, please refer "AMD Alchemy Au1200/Au1550 IDE
* Interface and Linux Device Driver" Application Note.
*/
#include <linux/config.h>
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
#define DMA_WAIT_TIMEOUT 100
#define NUM_DESCRIPTORS PRD_ENTRIES
#else /* CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA */
#define NUM_DESCRIPTORS 2
#endif
#ifndef AU1XXX_ATA_RQSIZE
#define AU1XXX_ATA_RQSIZE 128
#endif
/* Disable Burstable-Support for DBDMA */
#ifndef CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
#define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0
#endif
#ifdef CONFIG_PM
/*
* This will enable the device to be powered up when write() or read()
* is called. If this is not defined, the driver will return -EBUSY.
*/
#define WAKE_ON_ACCESS 1
typedef struct
{
spinlock_t lock; /* Used to block on state transitions */
au1xxx_power_dev_t *dev; /* Power Managers device structure */
unsigned stopped; /* USed to signaling device is stopped */
} pm_state;
#endif
typedef struct
{
u32 tx_dev_id, rx_dev_id, target_dev_id;
u32 tx_chan, rx_chan;
void *tx_desc_head, *rx_desc_head;
ide_hwif_t *hwif;
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
ide_drive_t *drive;
u8 white_list, black_list;
struct dbdma_cmd *dma_table_cpu;
dma_addr_t dma_table_dma;
struct scatterlist *sg_table;
int sg_nents;
int sg_dma_direction;
#endif
struct device *dev;
int irq;
u32 regbase;
#ifdef CONFIG_PM
pm_state pm;
#endif
} _auide_hwif;
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
struct drive_list_entry {
const char * id_model;
const char * id_firmware;
};
/* HD white list */
static const struct drive_list_entry dma_white_list [] = {
/*
* Hitachi
*/
{ "HITACHI_DK14FA-20" , "ALL" },
{ "HTS726060M9AT00" , "ALL" },
/*
* Maxtor
*/
{ "Maxtor 6E040L0" , "ALL" },
{ "Maxtor 6Y080P0" , "ALL" },
{ "Maxtor 6Y160P0" , "ALL" },
/*
* Seagate
*/
{ "ST3120026A" , "ALL" },
{ "ST320014A" , "ALL" },
{ "ST94011A" , "ALL" },
{ "ST340016A" , "ALL" },
/*
* Western Digital
*/
{ "WDC WD400UE-00HCT0" , "ALL" },
{ "WDC WD400JB-00JJC0" , "ALL" },
{ NULL , NULL }
};
/* HD black list */
static const struct drive_list_entry dma_black_list [] = {
/*
* Western Digital
*/
{ "WDC WD100EB-00CGH0" , "ALL" },
{ "WDC WD200BB-00AUA1" , "ALL" },
{ "WDC AC24300L" , "ALL" },
{ NULL , NULL }
};
#endif
/* function prototyping */
u8 auide_inb(unsigned long port);
u16 auide_inw(unsigned long port);
u32 auide_inl(unsigned long port);
void auide_insw(unsigned long port, void *addr, u32 count);
void auide_insl(unsigned long port, void *addr, u32 count);
void auide_outb(u8 addr, unsigned long port);
void auide_outbsync(ide_drive_t *drive, u8 addr, unsigned long port);
void auide_outw(u16 addr, unsigned long port);
void auide_outl(u32 addr, unsigned long port);
void auide_outsw(unsigned long port, void *addr, u32 count);
void auide_outsl(unsigned long port, void *addr, u32 count);
static void auide_tune_drive(ide_drive_t *drive, byte pio);
static int auide_tune_chipset (ide_drive_t *drive, u8 speed);
static int auide_ddma_init( _auide_hwif *auide );
static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif);
int __init auide_probe(void);
#ifdef CONFIG_PM
int au1200ide_pm_callback( au1xxx_power_dev_t *dev,
au1xxx_request_t request, void *data);
static int au1xxxide_pm_standby( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_sleep( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_resume( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_getstatus( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_access( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_idle( au1xxx_power_dev_t *dev );
static int au1xxxide_pm_cleanup( au1xxx_power_dev_t *dev );
#endif
/*
* Multi-Word DMA + DbDMA functions
*/
#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
static int in_drive_list(struct hd_driveid *id,
const struct drive_list_entry *drive_table);
static int auide_build_sglist(ide_drive_t *drive, struct request *rq);
static int auide_build_dmatable(ide_drive_t *drive);
static int auide_dma_end(ide_drive_t *drive);
static void auide_dma_start(ide_drive_t *drive );
ide_startstop_t auide_dma_intr (ide_drive_t *drive);
static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command);
static int auide_dma_setup(ide_drive_t *drive);
static int auide_dma_check(ide_drive_t *drive);
static int auide_dma_test_irq(ide_drive_t *drive);
static int auide_dma_host_off(ide_drive_t *drive);
static int auide_dma_host_on(ide_drive_t *drive);
static int auide_dma_lostirq(ide_drive_t *drive);
static int auide_dma_on(ide_drive_t *drive);
static void auide_ddma_tx_callback(int irq, void *param,
struct pt_regs *regs);
static void auide_ddma_rx_callback(int irq, void *param,
struct pt_regs *regs);
static int auide_dma_off_quietly(ide_drive_t *drive);
static int auide_dma_timeout(ide_drive_t *drive);
#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
/*******************************************************************************
* PIO Mode timing calculation : *
* *
* Static Bus Spec ATA Spec *
* Tcsoe = t1 *
* Toecs = t9 *
* Twcs = t9 *
* Tcsh = t2i | t2 *
* Tcsoff = t2i | t2 *
* Twp = t2 *
* Tcsw = t1 *
* Tpm = 0 *
* Ta = t1+t2 *
*******************************************************************************/
#define TCSOE_MASK (0x07<<29)
#define TOECS_MASK (0x07<<26)
#define TWCS_MASK (0x07<<28)
#define TCSH_MASK (0x0F<<24)
#define TCSOFF_MASK (0x07<<20)
#define TWP_MASK (0x3F<<14)
#define TCSW_MASK (0x0F<<10)
#define TPM_MASK (0x0F<<6)
#define TA_MASK (0x3F<<0)
#define TS_MASK (1<<8)
/* Timing parameters PIO mode 0 */
#define SBC_IDE_PIO0_TCSOE (0x04<<29)
#define SBC_IDE_PIO0_TOECS (0x01<<26)
#define SBC_IDE_PIO0_TWCS (0x02<<28)
#define SBC_IDE_PIO0_TCSH (0x08<<24)
#define SBC_IDE_PIO0_TCSOFF (0x07<<20)
#define SBC_IDE_PIO0_TWP (0x10<<14)
#define SBC_IDE_PIO0_TCSW (0x04<<10)
#define SBC_IDE_PIO0_TPM (0x0<<6)
#define SBC_IDE_PIO0_TA (0x15<<0)
/* Timing parameters PIO mode 1 */
#define SBC_IDE_PIO1_TCSOE (0x03<<29)
#define SBC_IDE_PIO1_TOECS (0x01<<26)
#define SBC_IDE_PIO1_TWCS (0x01<<28)
#define SBC_IDE_PIO1_TCSH (0x06<<24)
#define SBC_IDE_PIO1_TCSOFF (0x06<<20)
#define SBC_IDE_PIO1_TWP (0x08<<14)
#define SBC_IDE_PIO1_TCSW (0x03<<10)
#define SBC_IDE_PIO1_TPM (0x00<<6)
#define SBC_IDE_PIO1_TA (0x0B<<0)
/* Timing parameters PIO mode 2 */
#define SBC_IDE_PIO2_TCSOE (0x05<<29)
#define SBC_IDE_PIO2_TOECS (0x01<<26)
#define SBC_IDE_PIO2_TWCS (0x01<<28)
#define SBC_IDE_PIO2_TCSH (0x07<<24)
#define SBC_IDE_PIO2_TCSOFF (0x07<<20)
#define SBC_IDE_PIO2_TWP (0x1F<<14)
#define SBC_IDE_PIO2_TCSW (0x05<<10)
#define SBC_IDE_PIO2_TPM (0x00<<6)
#define SBC_IDE_PIO2_TA (0x22<<0)
/* Timing parameters PIO mode 3 */
#define SBC_IDE_PIO3_TCSOE (0x05<<29)
#define SBC_IDE_PIO3_TOECS (0x01<<26)
#define SBC_IDE_PIO3_TWCS (0x01<<28)
#define SBC_IDE_PIO3_TCSH (0x0D<<24)
#define SBC_IDE_PIO3_TCSOFF (0x0D<<20)
#define SBC_IDE_PIO3_TWP (0x15<<14)
#define SBC_IDE_PIO3_TCSW (0x05<<10)
#define SBC_IDE_PIO3_TPM (0x00<<6)
#define SBC_IDE_PIO3_TA (0x1A<<0)
/* Timing parameters PIO mode 4 */
#define SBC_IDE_PIO4_TCSOE (0x04<<29)
#define SBC_IDE_PIO4_TOECS (0x01<<26)
#define SBC_IDE_PIO4_TWCS (0x01<<28)
#define SBC_IDE_PIO4_TCSH (0x04<<24)
#define SBC_IDE_PIO4_TCSOFF (0x04<<20)
#define SBC_IDE_PIO4_TWP (0x0D<<14)
#define SBC_IDE_PIO4_TCSW (0x03<<10)
#define SBC_IDE_PIO4_TPM (0x00<<6)
#define SBC_IDE_PIO4_TA (0x12<<0)
/* Timing parameters MDMA mode 0 */
#define SBC_IDE_MDMA0_TCSOE (0x03<<29)
#define SBC_IDE_MDMA0_TOECS (0x01<<26)
#define SBC_IDE_MDMA0_TWCS (0x01<<28)
#define SBC_IDE_MDMA0_TCSH (0x07<<24)
#define SBC_IDE_MDMA0_TCSOFF (0x07<<20)
#define SBC_IDE_MDMA0_TWP (0x0C<<14)
#define SBC_IDE_MDMA0_TCSW (0x03<<10)
#define SBC_IDE_MDMA0_TPM (0x00<<6)
#define SBC_IDE_MDMA0_TA (0x0F<<0)
/* Timing parameters MDMA mode 1 */
#define SBC_IDE_MDMA1_TCSOE (0x05<<29)
#define SBC_IDE_MDMA1_TOECS (0x01<<26)
#define SBC_IDE_MDMA1_TWCS (0x01<<28)
#define SBC_IDE_MDMA1_TCSH (0x05<<24)
#define SBC_IDE_MDMA1_TCSOFF (0x05<<20)
#define SBC_IDE_MDMA1_TWP (0x0F<<14)
#define SBC_IDE_MDMA1_TCSW (0x05<<10)
#define SBC_IDE_MDMA1_TPM (0x00<<6)
#define SBC_IDE_MDMA1_TA (0x15<<0)
/* Timing parameters MDMA mode 2 */
#define SBC_IDE_MDMA2_TCSOE (0x04<<29)
#define SBC_IDE_MDMA2_TOECS (0x01<<26)
#define SBC_IDE_MDMA2_TWCS (0x01<<28)
#define SBC_IDE_MDMA2_TCSH (0x04<<24)
#define SBC_IDE_MDMA2_TCSOFF (0x04<<20)
#define SBC_IDE_MDMA2_TWP (0x0D<<14)
#define SBC_IDE_MDMA2_TCSW (0x04<<10)
#define SBC_IDE_MDMA2_TPM (0x00<<6)
#define SBC_IDE_MDMA2_TA (0x12<<0)

2
include/linux/ide.h
View file

@ -218,7 +218,7 @@ typedef enum { ide_unknown, ide_generic, ide_pci,
ide_rz1000, ide_trm290,
ide_cmd646, ide_cy82c693, ide_4drives,
ide_pmac, ide_etrax100, ide_acorn,
ide_forced
ide_au1xxx, ide_forced
} hwif_chipset_t;
/*