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drm/i915: disable VGA plane reliably
This does VGA disable like DDX driver. SR01 bit 5 should be set before VGA plane disable through control register, otherwise we might get random crash and lockups. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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parent
cdaa052b05
commit
24f119c769
1 changed files with 25 additions and 3 deletions
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@ -998,6 +998,29 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
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return 0;
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}
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/* Disable the VGA plane that we never use */
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static void i915_disable_vga (struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u8 sr1;
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u32 vga_reg;
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if (IS_IGDNG(dev))
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vga_reg = CPU_VGACNTRL;
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else
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vga_reg = VGACNTRL;
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if (I915_READ(vga_reg) & VGA_DISP_DISABLE)
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return;
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I915_WRITE8(VGA_SR_INDEX, 1);
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sr1 = I915_READ8(VGA_SR_DATA);
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I915_WRITE8(VGA_SR_DATA, sr1 | (1 << 5));
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udelay(100);
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I915_WRITE(vga_reg, VGA_DISP_DISABLE);
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}
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static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct drm_device *dev = crtc->dev;
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@ -1200,8 +1223,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
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case DRM_MODE_DPMS_OFF:
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DRM_DEBUG("crtc %d dpms off\n", pipe);
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/* Disable the VGA plane that we never use */
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I915_WRITE(CPU_VGACNTRL, VGA_DISP_DISABLE);
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i915_disable_vga(dev);
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/* Disable display plane */
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temp = I915_READ(dspcntr_reg);
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@ -1342,7 +1364,7 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
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//intel_crtc_dpms_video(crtc, FALSE); TODO
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/* Disable the VGA plane that we never use */
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I915_WRITE(VGACNTRL, VGA_DISP_DISABLE);
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i915_disable_vga(dev);
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/* Disable display plane */
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temp = I915_READ(dspcntr_reg);
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