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s3fb: driver fixes
This fixes broken fbcon on Virge VX in 24 bpp mode, and contains several other small updates. Signed-off-by: Ondrej Zajicek <santiago@crfreenet.org> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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4941cb7a18
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249bdbbf0d
2 changed files with 18 additions and 15 deletions
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@ -35,10 +35,12 @@ Supported Features
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* suspend/resume support
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* DPMS support
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Text mode is supported even in higher resolutions, but there is limitation
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to lower pixclocks (maximum between 50-60 MHz, depending on specific hardware).
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This limitation is not enforced by driver. Text mode supports 8bit wide fonts
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only (hardware limitation) and 16bit tall fonts (driver limitation).
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Text mode is supported even in higher resolutions, but there is limitation to
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lower pixclocks (maximum usually between 50-60 MHz, depending on specific
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hardware, i get best results from plain S3 Trio32 card - about 75 MHz). This
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limitation is not enforced by driver. Text mode supports 8bit wide fonts only
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(hardware limitation) and 16bit tall fonts (driver limitation). Text mode
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support is broken on S3 Trio64 V2/DX.
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There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
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packed pixels, high nibble first. Second mode (selected if nonstd == 1) is mode
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@ -73,6 +75,8 @@ Known bugs
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==========
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* cursor disable in text mode doesn't work
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* text mode broken on S3 Trio64 V2/DX
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--
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Ondrej Zajicek <santiago@crfreenet.org>
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@ -65,7 +65,7 @@ static const struct svga_fb_format s3fb_formats[] = {
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static const struct svga_pll s3_pll = {3, 129, 3, 33, 0, 3,
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60000, 240000, 14318};
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35000, 240000, 14318};
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static const int s3_memsizes[] = {4096, 0, 3072, 8192, 2048, 6144, 1024, 512};
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@ -331,8 +331,13 @@ static void s3_set_pixclock(struct fb_info *info, u32 pixclock)
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{
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u16 m, n, r;
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u8 regval;
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int rv;
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svga_compute_pll(&s3_pll, 1000000000 / pixclock, &m, &n, &r, info->node);
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rv = svga_compute_pll(&s3_pll, 1000000000 / pixclock, &m, &n, &r, info->node);
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if (rv < 0) {
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printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node);
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return;
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}
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/* Set VGA misc register */
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regval = vga_r(NULL, VGA_MIS_R);
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@ -710,7 +715,7 @@ static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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break;
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case 16:
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if (regno >= 16)
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return -EINVAL;
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return 0;
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if (fb->var.green.length == 5)
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((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) |
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@ -723,9 +728,9 @@ static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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case 24:
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case 32:
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if (regno >= 16)
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return -EINVAL;
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return 0;
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((u32*)fb->pseudo_palette)[regno] = ((transp & 0xFF00) << 16) | ((red & 0xFF00) << 8) |
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((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) |
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(green & 0xFF00) | ((blue & 0xFF00) >> 8);
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break;
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default:
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@ -778,12 +783,6 @@ static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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unsigned int offset;
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/* Validate the offsets */
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if ((var->xoffset + var->xres) > var->xres_virtual)
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return -EINVAL;
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if ((var->yoffset + var->yres) > var->yres_virtual)
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return -EINVAL;
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/* Calculate the offset */
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if (var->bits_per_pixel == 0) {
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offset = (var->yoffset / 16) * (var->xres_virtual / 2) + (var->xoffset / 2);
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