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kbuild: pass less variables to second make invocation when using make O=...

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make exports all variables assigned on the command-line, so no need to pass
them explicit.
This fixes http://bugzilla.kernel.org/show_bug.cgi?id=4725

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
This commit is contained in:
Sam Ravnborg 2005-07-27 09:12:07 +02:00
parent e579d351b4
commit 23a45e2c0a
1 changed files with 3 additions and 4 deletions
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7
Makefile
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@ -109,10 +109,9 @@ $(if $(KBUILD_OUTPUT),, \
.PHONY: $(MAKECMDGOALS) .PHONY: $(MAKECMDGOALS)
$(filter-out _all,$(MAKECMDGOALS)) _all: $(filter-out _all,$(MAKECMDGOALS)) _all:
$(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \ $(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \
KBUILD_SRC=$(CURDIR) KBUILD_VERBOSE=$(KBUILD_VERBOSE) \ KBUILD_SRC=$(CURDIR) \
KBUILD_CHECK=$(KBUILD_CHECK) KBUILD_EXTMOD="$(KBUILD_EXTMOD)" \ KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile $@
-f $(CURDIR)/Makefile $@
# Leave processing to above invocation of make # Leave processing to above invocation of make
skip-makefile := 1 skip-makefile := 1