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Merge branch 'for-linus' into for-2.6.33

Browse source 
Conflicts:
	block/cfq-iosched.c

Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
This commit is contained in:
Jens Axboe 2009-11-03 21:14:39 +01:00
commit 2058297d2d
1608 changed files with 87812 additions and 24594 deletions
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4
Documentation/ABI/testing/sysfs-class-usb_host → Documentation/ABI/testing/sysfs-class-uwb_rc-wusbhc
View file

@ -1,4 +1,4 @@
What: /sys/class/usb_host/usb_hostN/wusb_chid
What: /sys/class/uwb_rc/uwbN/wusbhc/wusb_chid
Date: July 2008
KernelVersion: 2.6.27
Contact: David Vrabel <david.vrabel@csr.com>
@ -9,7 +9,7 @@ Description:
Set an all zero CHID to stop the host controller.
What: /sys/class/usb_host/usb_hostN/wusb_trust_timeout
What: /sys/class/uwb_rc/uwbN/wusbhc/wusb_trust_timeout
Date: July 2008
KernelVersion: 2.6.27
Contact: David Vrabel <david.vrabel@csr.com>

18
Documentation/ABI/testing/sysfs-devices-cache_disable
View file

@ -1,18 +0,0 @@
What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
Date: August 2008
KernelVersion: 2.6.27
Contact: mark.langsdorf@amd.com
Description: These files exist in every cpu's cache index directories.
There are currently 2 cache_disable_# files in each
directory. Reading from these files on a supported
processor will return that cache disable index value
for that processor and node. Writing to one of these
files will cause the specificed cache index to be disabled.
Currently, only AMD Family 10h Processors support cache index
disable, and only for their L3 caches. See the BIOS and
Kernel Developer's Guide at
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
for formatting information and other details on the
cache index disable.
Users: joachim.deguara@amd.com

156
Documentation/ABI/testing/sysfs-devices-system-cpu Normal file
View file

@ -0,0 +1,156 @@
What: /sys/devices/system/cpu/
Date: pre-git history
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description:
A collection of both global and individual CPU attributes
Individual CPU attributes are contained in subdirectories
named by the kernel's logical CPU number, e.g.:
/sys/devices/system/cpu/cpu#/
What: /sys/devices/system/cpu/sched_mc_power_savings
/sys/devices/system/cpu/sched_smt_power_savings
Date: June 2006
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: Discover and adjust the kernel's multi-core scheduler support.
Possible values are:
0 - No power saving load balance (default value)
1 - Fill one thread/core/package first for long running threads
2 - Also bias task wakeups to semi-idle cpu package for power
savings
sched_mc_power_savings is dependent upon SCHED_MC, which is
itself architecture dependent.
sched_smt_power_savings is dependent upon SCHED_SMT, which
is itself architecture dependent.
The two files are independent of each other. It is possible
that one file may be present without the other.
Introduced by git commit 5c45bf27.
What: /sys/devices/system/cpu/kernel_max
/sys/devices/system/cpu/offline
/sys/devices/system/cpu/online
/sys/devices/system/cpu/possible
/sys/devices/system/cpu/present
Date: December 2008
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: CPU topology files that describe kernel limits related to
hotplug. Briefly:
kernel_max: the maximum cpu index allowed by the kernel
configuration.
offline: cpus that are not online because they have been
HOTPLUGGED off or exceed the limit of cpus allowed by the
kernel configuration (kernel_max above).
online: cpus that are online and being scheduled.
possible: cpus that have been allocated resources and can be
brought online if they are present.
present: cpus that have been identified as being present in
the system.
See Documentation/cputopology.txt for more information.
What: /sys/devices/system/cpu/cpu#/node
Date: October 2009
Contact: Linux memory management mailing list <linux-mm@kvack.org>
Description: Discover NUMA node a CPU belongs to
When CONFIG_NUMA is enabled, a symbolic link that points
to the corresponding NUMA node directory.
For example, the following symlink is created for cpu42
in NUMA node 2:
/sys/devices/system/cpu/cpu42/node2 -> ../../node/node2
What: /sys/devices/system/cpu/cpu#/topology/core_id
/sys/devices/system/cpu/cpu#/topology/core_siblings
/sys/devices/system/cpu/cpu#/topology/core_siblings_list
/sys/devices/system/cpu/cpu#/topology/physical_package_id
/sys/devices/system/cpu/cpu#/topology/thread_siblings
/sys/devices/system/cpu/cpu#/topology/thread_siblings_list
Date: December 2008
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: CPU topology files that describe a logical CPU's relationship
to other cores and threads in the same physical package.
One cpu# directory is created per logical CPU in the system,
e.g. /sys/devices/system/cpu/cpu42/.
Briefly, the files above are:
core_id: the CPU core ID of cpu#. Typically it is the
hardware platform's identifier (rather than the kernel's).
The actual value is architecture and platform dependent.
core_siblings: internal kernel map of cpu#'s hardware threads
within the same physical_package_id.
core_siblings_list: human-readable list of the logical CPU
numbers within the same physical_package_id as cpu#.
physical_package_id: physical package id of cpu#. Typically
corresponds to a physical socket number, but the actual value
is architecture and platform dependent.
thread_siblings: internel kernel map of cpu#'s hardware
threads within the same core as cpu#
thread_siblings_list: human-readable list of cpu#'s hardware
threads within the same core as cpu#
See Documentation/cputopology.txt for more information.
What: /sys/devices/system/cpu/cpuidle/current_driver
/sys/devices/system/cpu/cpuidle/current_governer_ro
Date: September 2007
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: Discover cpuidle policy and mechanism
Various CPUs today support multiple idle levels that are
differentiated by varying exit latencies and power
consumption during idle.
Idle policy (governor) is differentiated from idle mechanism
(driver)
current_driver: displays current idle mechanism
current_governor_ro: displays current idle policy
See files in Documentation/cpuidle/ for more information.
What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
Date: August 2008
KernelVersion: 2.6.27
Contact: mark.langsdorf@amd.com
Description: These files exist in every cpu's cache index directories.
There are currently 2 cache_disable_# files in each
directory. Reading from these files on a supported
processor will return that cache disable index value
for that processor and node. Writing to one of these
files will cause the specificed cache index to be disabled.
Currently, only AMD Family 10h Processors support cache index
disable, and only for their L3 caches. See the BIOS and
Kernel Developer's Guide at
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
for formatting information and other details on the
cache index disable.
Users: joachim.deguara@amd.com

11
Documentation/cgroups/cgroups.txt
View file

@ -227,7 +227,14 @@ as the path relative to the root of the cgroup file system.
Each cgroup is represented by a directory in the cgroup file system
containing the following files describing that cgroup:
- tasks: list of tasks (by pid) attached to that cgroup
- tasks: list of tasks (by pid) attached to that cgroup. This list
is not guaranteed to be sorted. Writing a thread id into this file
moves the thread into this cgroup.
- cgroup.procs: list of tgids in the cgroup. This list is not
guaranteed to be sorted or free of duplicate tgids, and userspace
should sort/uniquify the list if this property is required.
Writing a tgid into this file moves all threads with that tgid into
this cgroup.
- notify_on_release flag: run the release agent on exit?
- release_agent: the path to use for release notifications (this file
exists in the top cgroup only)
@ -374,7 +381,7 @@ Now you want to do something with this cgroup.
In this directory you can find several files:
# ls
notify_on_release tasks
cgroup.procs notify_on_release tasks
(plus whatever files added by the attached subsystems)
Now attach your shell to this cgroup:

47
Documentation/cputopology.txt
View file

@ -1,15 +1,28 @@
Export cpu topology info via sysfs. Items (attributes) are similar
Export CPU topology info via sysfs. Items (attributes) are similar
to /proc/cpuinfo.
1) /sys/devices/system/cpu/cpuX/topology/physical_package_id:
represent the physical package id of cpu X;
physical package id of cpuX. Typically corresponds to a physical
socket number, but the actual value is architecture and platform
dependent.
2) /sys/devices/system/cpu/cpuX/topology/core_id:
represent the cpu core id to cpu X;
the CPU core ID of cpuX. Typically it is the hardware platform's
identifier (rather than the kernel's). The actual value is
architecture and platform dependent.
3) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
represent the thread siblings to cpu X in the same core;
internel kernel map of cpuX's hardware threads within the same
core as cpuX
4) /sys/devices/system/cpu/cpuX/topology/core_siblings:
represent the thread siblings to cpu X in the same physical package;
internal kernel map of cpuX's hardware threads within the same
physical_package_id.
To implement it in an architecture-neutral way, a new source file,
drivers/base/topology.c, is to export the 4 attributes.
@ -32,32 +45,32 @@ not defined by include/asm-XXX/topology.h:
3) thread_siblings: just the given CPU
4) core_siblings: just the given CPU
Additionally, cpu topology information is provided under
Additionally, CPU topology information is provided under
/sys/devices/system/cpu and includes these files. The internal
source for the output is in brackets ("[]").
kernel_max: the maximum cpu index allowed by the kernel configuration.
kernel_max: the maximum CPU index allowed by the kernel configuration.
[NR_CPUS-1]
offline: cpus that are not online because they have been
offline: CPUs that are not online because they have been
HOTPLUGGED off (see cpu-hotplug.txt) or exceed the limit
of cpus allowed by the kernel configuration (kernel_max
of CPUs allowed by the kernel configuration (kernel_max
above). [~cpu_online_mask + cpus >= NR_CPUS]
online: cpus that are online and being scheduled [cpu_online_mask]
online: CPUs that are online and being scheduled [cpu_online_mask]
possible: cpus that have been allocated resources and can be
possible: CPUs that have been allocated resources and can be
brought online if they are present. [cpu_possible_mask]
present: cpus that have been identified as being present in the
present: CPUs that have been identified as being present in the
system. [cpu_present_mask]
The format for the above output is compatible with cpulist_parse()
[see <linux/cpumask.h>]. Some examples follow.
In this example, there are 64 cpus in the system but cpus 32-63 exceed
In this example, there are 64 CPUs in the system but cpus 32-63 exceed
the kernel max which is limited to 0..31 by the NR_CPUS config option
being 32. Note also that cpus 2 and 4-31 are not online but could be
being 32. Note also that CPUs 2 and 4-31 are not online but could be
brought online as they are both present and possible.
kernel_max: 31
@ -67,8 +80,8 @@ brought online as they are both present and possible.
present: 0-31
In this example, the NR_CPUS config option is 128, but the kernel was
started with possible_cpus=144. There are 4 cpus in the system and cpu2
was manually taken offline (and is the only cpu that can be brought
started with possible_cpus=144. There are 4 CPUs in the system and cpu2
was manually taken offline (and is the only CPU that can be brought
online.)
kernel_max: 127
@ -78,4 +91,4 @@ online.)
present: 0-3
See cpu-hotplug.txt for the possible_cpus=NUM kernel start parameter
as well as more information on the various cpumask's.
as well as more information on the various cpumasks.

8
Documentation/debugging-via-ohci1394.txt
View file

@ -64,14 +64,14 @@ be used to view the printk buffer of a remote machine, even with live update.
Bernhard Kaindl enhanced firescope to support accessing 64-bit machines
from 32-bit firescope and vice versa:
- ftp://ftp.suse.de/private/bk/firewire/tools/firescope-0.2.2.tar.bz2
- http://halobates.de/firewire/firescope-0.2.2.tar.bz2
and he implemented fast system dump (alpha version - read README.txt):
- ftp://ftp.suse.de/private/bk/firewire/tools/firedump-0.1.tar.bz2
- http://halobates.de/firewire/firedump-0.1.tar.bz2
There is also a gdb proxy for firewire which allows to use gdb to access
data which can be referenced from symbols found by gdb in vmlinux:
- ftp://ftp.suse.de/private/bk/firewire/tools/fireproxy-0.33.tar.bz2
- http://halobates.de/firewire/fireproxy-0.33.tar.bz2
The latest version of this gdb proxy (fireproxy-0.34) can communicate (not
yet stable) with kgdb over an memory-based communication module (kgdbom).
@ -178,7 +178,7 @@ Step-by-step instructions for using firescope with early OHCI initialization:
Notes
-----
Documentation and specifications: ftp://ftp.suse.de/private/bk/firewire/docs
Documentation and specifications: http://halobates.de/firewire/
FireWire is a trademark of Apple Inc. - for more information please refer to:
http://en.wikipedia.org/wiki/FireWire

38
Documentation/feature-removal-schedule.txt
View file

@ -418,6 +418,14 @@ When: 2.6.33
Why: Should be implemented in userspace, policy daemon.
Who: Johannes Berg <johannes@sipsolutions.net>
---------------------------
What: CONFIG_INOTIFY
When: 2.6.33
Why: last user (audit) will be converted to the newer more generic
and more easily maintained fsnotify subsystem
Who: Eric Paris <eparis@redhat.com>
----------------------------
What: lock_policy_rwsem_* and unlock_policy_rwsem_* will not be
@ -451,3 +459,33 @@ Why: OSS sound_core grabs all legacy minors (0-255) of SOUND_MAJOR
will also allow making ALSA OSS emulation independent of
sound_core. The dependency will be broken then too.
Who: Tejun Heo <tj@kernel.org>
----------------------------
What: Support for VMware's guest paravirtuliazation technique [VMI] will be
dropped.
When: 2.6.37 or earlier.
Why: With the recent innovations in CPU hardware acceleration technologies
from Intel and AMD, VMware ran a few experiments to compare these
techniques to guest paravirtualization technique on VMware's platform.
These hardware assisted virtualization techniques have outperformed the
performance benefits provided by VMI in most of the workloads. VMware
expects that these hardware features will be ubiquitous in a couple of
years, as a result, VMware has started a phased retirement of this
feature from the hypervisor. We will be removing this feature from the
Kernel too. Right now we are targeting 2.6.37 but can retire earlier if
technical reasons (read opportunity to remove major chunk of pvops)
arise.
Please note that VMI has always been an optimization and non-VMI kernels
still work fine on VMware's platform.
Latest versions of VMware's product which support VMI are,
Workstation 7.0 and VSphere 4.0 on ESX side, future maintainence
releases for these products will continue supporting VMI.
For more details about VMI retirement take a look at this,
http://blogs.vmware.com/guestosguide/2009/09/vmi-retirement.html
Who: Alok N Kataria <akataria@vmware.com>
----------------------------

16
Documentation/filesystems/ext3.txt
View file

@ -123,10 +123,18 @@ resuid=n The user ID which may use the reserved blocks.
sb=n Use alternate superblock at this location.
quota
noquota
grpquota
usrquota
quota These options are ignored by the filesystem. They
noquota are used only by quota tools to recognize volumes
grpquota where quota should be turned on. See documentation
usrquota in the quota-tools package for more details
(http://sourceforge.net/projects/linuxquota).
jqfmt=<quota type> These options tell filesystem details about quota
usrjquota=<file> so that quota information can be properly updated
grpjquota=<file> during journal replay. They replace the above
quota options. See documentation in the quota-tools
package for more details
(http://sourceforge.net/projects/linuxquota).
bh (*) ext3 associates buffer heads to data pages to
nobh (a) cache disk block mapping information

41
Documentation/flexible-arrays.txt
View file

@ -1,5 +1,5 @@
Using flexible arrays in the kernel
Last updated for 2.6.31
Last updated for 2.6.32
Jonathan Corbet <corbet@lwn.net>
Large contiguous memory allocations can be unreliable in the Linux kernel.
@ -40,6 +40,13 @@ argument is passed directly to the internal memory allocation calls. With
the current code, using flags to ask for high memory is likely to lead to
notably unpleasant side effects.
It is also possible to define flexible arrays at compile time with:
DEFINE_FLEX_ARRAY(name, element_size, total);
This macro will result in a definition of an array with the given name; the
element size and total will be checked for validity at compile time.
Storing data into a flexible array is accomplished with a call to:
int flex_array_put(struct flex_array *array, unsigned int element_nr,
@ -76,16 +83,30 @@ particular element has never been allocated.
Note that it is possible to get back a valid pointer for an element which
has never been stored in the array. Memory for array elements is allocated
one page at a time; a single allocation could provide memory for several
adjacent elements. The flexible array code does not know if a specific
element has been written; it only knows if the associated memory is
present. So a flex_array_get() call on an element which was never stored
in the array has the potential to return a pointer to random data. If the
caller does not have a separate way to know which elements were actually
stored, it might be wise, at least, to add GFP_ZERO to the flags argument
to ensure that all elements are zeroed.
adjacent elements. Flexible array elements are normally initialized to the
value FLEX_ARRAY_FREE (defined as 0x6c in <linux/poison.h>), so errors
involving that number probably result from use of unstored array entries.
Note that, if array elements are allocated with __GFP_ZERO, they will be
initialized to zero and this poisoning will not happen.
There is no way to remove a single element from the array. It is possible,
though, to remove all elements with a call to:
Individual elements in the array can be cleared with:
int flex_array_clear(struct flex_array *array, unsigned int element_nr);
This function will set the given element to FLEX_ARRAY_FREE and return
zero. If storage for the indicated element is not allocated for the array,
flex_array_clear() will return -EINVAL instead. Note that clearing an
element does not release the storage associated with it; to reduce the
allocated size of an array, call:
int flex_array_shrink(struct flex_array *array);
The return value will be the number of pages of memory actually freed.
This function works by scanning the array for pages containing nothing but
FLEX_ARRAY_FREE bytes, so (1) it can be expensive, and (2) it will not work
if the array's pages are allocated with __GFP_ZERO.
It is possible to remove all elements of an array with a call to:
void flex_array_free_parts(struct flex_array *array);

57
Documentation/hwmon/sysfs-interface
View file

@ -353,10 +353,20 @@ power[1-*]_average Average power use
Unit: microWatt
RO
power[1-*]_average_interval Power use averaging interval
power[1-*]_average_interval Power use averaging interval. A poll
notification is sent to this file if the
hardware changes the averaging interval.
Unit: milliseconds
RW
power[1-*]_average_interval_max Maximum power use averaging interval
Unit: milliseconds
RO
power[1-*]_average_interval_min Minimum power use averaging interval
Unit: milliseconds
RO
power[1-*]_average_highest Historical average maximum power use
Unit: microWatt
RO
@ -365,6 +375,18 @@ power[1-*]_average_lowest Historical average minimum power use
Unit: microWatt
RO
power[1-*]_average_max A poll notification is sent to
power[1-*]_average when power use
rises above this value.
Unit: microWatt
RW
power[1-*]_average_min A poll notification is sent to
power[1-*]_average when power use
sinks below this value.
Unit: microWatt
RW
power[1-*]_input Instantaneous power use
Unit: microWatt
RO
@ -381,6 +403,39 @@ power[1-*]_reset_history Reset input_highest, input_lowest,
average_highest and average_lowest.
WO
power[1-*]_accuracy Accuracy of the power meter.
Unit: Percent
RO
power[1-*]_alarm 1 if the system is drawing more power than the
cap allows; 0 otherwise. A poll notification is
sent to this file when the power use exceeds the
cap. This file only appears if the cap is known
to be enforced by hardware.
RO
power[1-*]_cap If power use rises above this limit, the
system should take action to reduce power use.
A poll notification is sent to this file if the
cap is changed by the hardware. The *_cap
files only appear if the cap is known to be
enforced by hardware.
Unit: microWatt
RW
power[1-*]_cap_hyst Margin of hysteresis built around capping and
notification.
Unit: microWatt
RW
power[1-*]_cap_max Maximum cap that can be set.
Unit: microWatt
RO
power[1-*]_cap_min Minimum cap that can be set.
Unit: microWatt
RO
**********
* Energy *
**********

4
Documentation/infiniband/user_mad.txt
View file

@ -128,8 +128,8 @@ Setting IsSM Capability Bit
To create the appropriate character device files automatically with
udev, a rule like
KERNEL="umad*", NAME="infiniband/%k"
KERNEL="issm*", NAME="infiniband/%k"
KERNEL=="umad*", NAME="infiniband/%k"
KERNEL=="issm*", NAME="infiniband/%k"
can be used. This will create device nodes named

2
Documentation/infiniband/user_verbs.txt
View file

@ -58,7 +58,7 @@ Memory pinning
To create the appropriate character device files automatically with
udev, a rule like
KERNEL="uverbs*", NAME="infiniband/%k"
KERNEL=="uverbs*", NAME="infiniband/%k"
can be used. This will create device nodes named

83
Documentation/isdn/INTERFACE.CAPI
View file

@ -60,10 +60,9 @@ open() operation on regular files or character devices.
After a successful return from register_appl(), CAPI messages from the
application may be passed to the driver for the device via calls to the
send_message() callback function. The CAPI message to send is stored in the
data portion of an skb. Conversely, the driver may call Kernel CAPI's
capi_ctr_handle_message() function to pass a received CAPI message to Kernel
CAPI for forwarding to an application, specifying its ApplID.
send_message() callback function. Conversely, the driver may call Kernel
CAPI's capi_ctr_handle_message() function to pass a received CAPI message to
Kernel CAPI for forwarding to an application, specifying its ApplID.
Deregistration requests (CAPI operation CAPI_RELEASE) from applications are
forwarded as calls to the release_appl() callback function, passing the same
@ -142,6 +141,7 @@ u16 (*send_message)(struct capi_ctr *ctrlr, struct sk_buff *skb)
to accepting or queueing the message. Errors occurring during the
actual processing of the message should be signaled with an
appropriate reply message.
May be called in process or interrupt context.
Calls to this function are not serialized by Kernel CAPI, ie. it must
be prepared to be re-entered.
@ -154,7 +154,8 @@ read_proc_t *ctr_read_proc
system entry, /proc/capi/controllers/<n>; will be called with a
pointer to the device's capi_ctr structure as the last (data) argument
Note: Callback functions are never called in interrupt context.
Note: Callback functions except send_message() are never called in interrupt
context.
- to be filled in before calling capi_ctr_ready():
@ -171,14 +172,40 @@ u8 serial[CAPI_SERIAL_LEN]
value to return for CAPI_GET_SERIAL
4.3 The _cmsg Structure
4.3 SKBs
CAPI messages are passed between Kernel CAPI and the driver via send_message()
and capi_ctr_handle_message(), stored in the data portion of a socket buffer
(skb). Each skb contains a single CAPI message coded according to the CAPI 2.0
standard.
For the data transfer messages, DATA_B3_REQ and DATA_B3_IND, the actual
payload data immediately follows the CAPI message itself within the same skb.
The Data and Data64 parameters are not used for processing. The Data64
parameter may be omitted by setting the length field of the CAPI message to 22
instead of 30.
4.4 The _cmsg Structure
(declared in <linux/isdn/capiutil.h>)
The _cmsg structure stores the contents of a CAPI 2.0 message in an easily
accessible form. It contains members for all possible CAPI 2.0 parameters, of
which only those appearing in the message type currently being processed are
actually used. Unused members should be set to zero.
accessible form. It contains members for all possible CAPI 2.0 parameters,
including subparameters of the Additional Info and B Protocol structured
parameters, with the following exceptions:
* second Calling party number (CONNECT_IND)
* Data64 (DATA_B3_REQ and DATA_B3_IND)
* Sending complete (subparameter of Additional Info, CONNECT_REQ and INFO_REQ)
* Global Configuration (subparameter of B Protocol, CONNECT_REQ, CONNECT_RESP
and SELECT_B_PROTOCOL_REQ)
Only those parameters appearing in the message type currently being processed
are actually used. Unused members should be set to zero.
Members are named after the CAPI 2.0 standard names of the parameters they
represent. See <linux/isdn/capiutil.h> for the exact spelling. Member data
@ -190,18 +217,19 @@ u16 for CAPI parameters of type 'word'
u32 for CAPI parameters of type 'dword'
_cstruct for CAPI parameters of type 'struct' not containing any
variably-sized (struct) subparameters (eg. 'Called Party Number')
_cstruct for CAPI parameters of type 'struct'
The member is a pointer to a buffer containing the parameter in
CAPI encoding (length + content). It may also be NULL, which will
be taken to represent an empty (zero length) parameter.
Subparameters are stored in encoded form within the content part.
_cmstruct for CAPI parameters of type 'struct' containing 'struct'
subparameters ('Additional Info' and 'B Protocol')
_cmstruct alternative representation for CAPI parameters of type 'struct'
(used only for the 'Additional Info' and 'B Protocol' parameters)
The representation is a single byte containing one of the values:
CAPI_DEFAULT: the parameter is empty
CAPI_COMPOSE: the values of the subparameters are stored
individually in the corresponding _cmsg structure members
CAPI_DEFAULT: The parameter is empty/absent.
CAPI_COMPOSE: The parameter is present.
Subparameter values are stored individually in the corresponding
_cmsg structure members.
Functions capi_cmsg2message() and capi_message2cmsg() are provided to convert
messages between their transport encoding described in the CAPI 2.0 standard
@ -297,3 +325,26 @@ char *capi_cmd2str(u8 Command, u8 Subcommand)
be NULL if the command/subcommand is not one of those defined in the
CAPI 2.0 standard.
7. Debugging
The module kernelcapi has a module parameter showcapimsgs controlling some
debugging output produced by the module. It can only be set when the module is
loaded, via a parameter "showcapimsgs=<n>" to the modprobe command, either on
the command line or in the configuration file.
If the lowest bit of showcapimsgs is set, kernelcapi logs controller and
application up and down events.
In addition, every registered CAPI controller has an associated traceflag
parameter controlling how CAPI messages sent from and to tha controller are
logged. The traceflag parameter is initialized with the value of the
showcapimsgs parameter when the controller is registered, but can later be
changed via the MANUFACTURER_REQ command KCAPI_CMD_TRACE.
If the value of traceflag is non-zero, CAPI messages are logged.
DATA_B3 messages are only logged if the value of traceflag is > 2.
If the lowest bit of traceflag is set, only the command/subcommand and message
length are logged. Otherwise, kernelcapi logs a readable representation of
the entire message.

1
Documentation/kernel-parameters.txt
View file

@ -671,6 +671,7 @@ and is between 256 and 4096 characters. It is defined in the file
earlyprintk= [X86,SH,BLACKFIN]
earlyprintk=vga
earlyprintk=serial[,ttySn[,baudrate]]
earlyprintk=ttySn[,baudrate]
earlyprintk=dbgp[debugController#]
Append ",keep" to not disable it when the real console

1
Documentation/lguest/lguest.c
View file

@ -42,7 +42,6 @@
#include <signal.h>
#include "linux/lguest_launcher.h"
#include "linux/virtio_config.h"
#include <linux/virtio_ids.h>
#include "linux/virtio_net.h"
#include "linux/virtio_blk.h"
#include "linux/virtio_console.h"

8
Documentation/networking/pktgen.txt
View file

@ -90,6 +90,11 @@ Examples:
pgset "dstmac 00:00:00:00:00:00" sets MAC destination address
pgset "srcmac 00:00:00:00:00:00" sets MAC source address
pgset "queue_map_min 0" Sets the min value of tx queue interval
pgset "queue_map_max 7" Sets the max value of tx queue interval, for multiqueue devices
To select queue 1 of a given device,
use queue_map_min=1 and queue_map_max=1
pgset "src_mac_count 1" Sets the number of MACs we'll range through.
The 'minimum' MAC is what you set with srcmac.
@ -101,6 +106,9 @@ Examples:
IPDST_RND, UDPSRC_RND,
UDPDST_RND, MACSRC_RND, MACDST_RND
MPLS_RND, VID_RND, SVID_RND
QUEUE_MAP_RND # queue map random
QUEUE_MAP_CPU # queue map mirrors smp_processor_id()
pgset "udp_src_min 9" set UDP source port min, If < udp_src_max, then
cycle through the port range.

21
Documentation/scsi/hptiop.txt
View file

@ -3,6 +3,25 @@ HIGHPOINT ROCKETRAID 3xxx/4xxx ADAPTER DRIVER (hptiop)
Controller Register Map
-------------------------
For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 and BAR2:
BAR0 offset Register
0x11C5C Link Interface IRQ Set
0x11C60 Link Interface IRQ Clear
BAR2 offset Register
0x10 Inbound Message Register 0
0x14 Inbound Message Register 1
0x18 Outbound Message Register 0
0x1C Outbound Message Register 1
0x20 Inbound Doorbell Register
0x24 Inbound Interrupt Status Register
0x28 Inbound Interrupt Mask Register
0x30 Outbound Interrupt Status Register
0x34 Outbound Interrupt Mask Register
0x40 Inbound Queue Port
0x44 Outbound Queue Port
For Intel IOP based adapters, the controller IOP is accessed via PCI BAR0:
BAR0 offset Register
@ -93,7 +112,7 @@ The driver exposes following sysfs attributes:
-----------------------------------------------------------------------------
Copyright (C) 2006-2007 HighPoint Technologies, Inc. All Rights Reserved.
Copyright (C) 2006-2009 HighPoint Technologies, Inc. All Rights Reserved.
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of

1
Documentation/sound/alsa/HD-Audio-Models.txt
View file

@ -359,6 +359,7 @@ STAC9227/9228/9229/927x
5stack-no-fp D965 5stack without front panel
dell-3stack Dell Dimension E520
dell-bios Fixes with Dell BIOS setup
volknob Fixes with volume-knob widget 0x24
auto BIOS setup (default)
STAC92HD71B*

136
Documentation/vm/hwpoison.txt Normal file
View file

@ -0,0 +1,136 @@
What is hwpoison?
Upcoming Intel CPUs have support for recovering from some memory errors
(``MCA recovery''). This requires the OS to declare a page "poisoned",
kill the processes associated with it and avoid using it in the future.
This patchkit implements the necessary infrastructure in the VM.
To quote the overview comment:
* High level machine check handler. Handles pages reported by the
* hardware as being corrupted usually due to a 2bit ECC memory or cache
* failure.
*
* This focusses on pages detected as corrupted in the background.
* When the current CPU tries to consume corruption the currently
* running process can just be killed directly instead. This implies
* that if the error cannot be handled for some reason it's safe to
* just ignore it because no corruption has been consumed yet. Instead
* when that happens another machine check will happen.
*
* Handles page cache pages in various states. The tricky part
* here is that we can access any page asynchronous to other VM
* users, because memory failures could happen anytime and anywhere,
* possibly violating some of their assumptions. This is why this code
* has to be extremely careful. Generally it tries to use normal locking
* rules, as in get the standard locks, even if that means the
* error handling takes potentially a long time.
*
* Some of the operations here are somewhat inefficient and have non
* linear algorithmic complexity, because the data structures have not
* been optimized for this case. This is in particular the case
* for the mapping from a vma to a process. Since this case is expected
* to be rare we hope we can get away with this.
The code consists of a the high level handler in mm/memory-failure.c,
a new page poison bit and various checks in the VM to handle poisoned
pages.
The main target right now is KVM guests, but it works for all kinds
of applications. KVM support requires a recent qemu-kvm release.
For the KVM use there was need for a new signal type so that
KVM can inject the machine check into the guest with the proper
address. This in theory allows other applications to handle
memory failures too. The expection is that near all applications
won't do that, but some very specialized ones might.
---
There are two (actually three) modi memory failure recovery can be in:
vm.memory_failure_recovery sysctl set to zero:
All memory failures cause a panic. Do not attempt recovery.
(on x86 this can be also affected by the tolerant level of the
MCE subsystem)
early kill
(can be controlled globally and per process)
Send SIGBUS to the application as soon as the error is detected
This allows applications who can process memory errors in a gentle
way (e.g. drop affected object)
This is the mode used by KVM qemu.
late kill
Send SIGBUS when the application runs into the corrupted page.
This is best for memory error unaware applications and default
Note some pages are always handled as late kill.
---
User control:
vm.memory_failure_recovery
See sysctl.txt
vm.memory_failure_early_kill
Enable early kill mode globally
PR_MCE_KILL
Set early/late kill mode/revert to system default
arg1: PR_MCE_KILL_CLEAR: Revert to system default
arg1: PR_MCE_KILL_SET: arg2 defines thread specific mode
PR_MCE_KILL_EARLY: Early kill
PR_MCE_KILL_LATE: Late kill
PR_MCE_KILL_DEFAULT: Use system global default
PR_MCE_KILL_GET
return current mode
---
Testing:
madvise(MADV_POISON, ....)
(as root)
Poison a page in the process for testing
hwpoison-inject module through debugfs
/sys/debug/hwpoison/corrupt-pfn
Inject hwpoison fault at PFN echoed into this file
Architecture specific MCE injector
x86 has mce-inject, mce-test
Some portable hwpoison test programs in mce-test, see blow.
---
References:
http://halobates.de/mce-lc09-2.pdf
Overview presentation from LinuxCon 09
git://git.kernel.org/pub/scm/utils/cpu/mce/mce-test.git
Test suite (hwpoison specific portable tests in tsrc)
git://git.kernel.org/pub/scm/utils/cpu/mce/mce-inject.git
x86 specific injector
---
Limitations:
- Not all page types are supported and never will. Most kernel internal
objects cannot be recovered, only LRU pages for now.
- Right now hugepage support is missing.
---
Andi Kleen, Oct 2009

13
Documentation/vm/ksm.txt
View file

@ -52,15 +52,15 @@ The KSM daemon is controlled by sysfs files in /sys/kernel/mm/ksm/,
readable by all but writable only by root:
max_kernel_pages - set to maximum number of kernel pages that KSM may use
e.g. "echo 2000 > /sys/kernel/mm/ksm/max_kernel_pages"
e.g. "echo 100000 > /sys/kernel/mm/ksm/max_kernel_pages"
Value 0 imposes no limit on the kernel pages KSM may use;
but note that any process using MADV_MERGEABLE can cause
KSM to allocate these pages, unswappable until it exits.
Default: 2000 (chosen for demonstration purposes)
Default: quarter of memory (chosen to not pin too much)
pages_to_scan - how many present pages to scan before ksmd goes to sleep
e.g. "echo 200 > /sys/kernel/mm/ksm/pages_to_scan"
Default: 200 (chosen for demonstration purposes)
e.g. "echo 100 > /sys/kernel/mm/ksm/pages_to_scan"
Default: 100 (chosen for demonstration purposes)
sleep_millisecs - how many milliseconds ksmd should sleep before next scan
e.g. "echo 20 > /sys/kernel/mm/ksm/sleep_millisecs"
@ -70,7 +70,8 @@ run - set 0 to stop ksmd from running but keep merged pages,
set 1 to run ksmd e.g. "echo 1 > /sys/kernel/mm/ksm/run",
set 2 to stop ksmd and unmerge all pages currently merged,
but leave mergeable areas registered for next run
Default: 1 (for immediate use by apps which register)
Default: 0 (must be changed to 1 to activate KSM,
except if CONFIG_SYSFS is disabled)
The effectiveness of KSM and MADV_MERGEABLE is shown in /sys/kernel/mm/ksm/:
@ -86,4 +87,4 @@ pages_volatile embraces several different kinds of activity, but a high
proportion there would also indicate poor use of madvise MADV_MERGEABLE.
Izik Eidus,
Hugh Dickins, 30 July 2009
Hugh Dickins, 24 Sept 2009

302
Documentation/vm/page-types.c
View file

@ -2,7 +2,10 @@
* page-types: Tool for querying page flags
*
* Copyright (C) 2009 Intel corporation
* Copyright (C) 2009 Wu Fengguang <fengguang.wu@intel.com>
*
* Authors: Wu Fengguang <fengguang.wu@intel.com>
*
* Released under the General Public License (GPL).
*/
#define _LARGEFILE64_SOURCE
@ -69,7 +72,9 @@
#define KPF_COMPOUND_TAIL 16
#define KPF_HUGE 17
#define KPF_UNEVICTABLE 18
#define KPF_HWPOISON 19
#define KPF_NOPAGE 20
#define KPF_KSM 21
/* [32-] kernel hacking assistances */
#define KPF_RESERVED 32
@ -116,7 +121,9 @@ static char *page_flag_names[] = {
[KPF_COMPOUND_TAIL] = "T:compound_tail",
[KPF_HUGE] = "G:huge",
[KPF_UNEVICTABLE] = "u:unevictable",
[KPF_HWPOISON] = "X:hwpoison",
[KPF_NOPAGE] = "n:nopage",
[KPF_KSM] = "x:ksm",
[KPF_RESERVED] = "r:reserved",
[KPF_MLOCKED] = "m:mlocked",
@ -152,9 +159,6 @@ static unsigned long opt_size[MAX_ADDR_RANGES];
static int nr_vmas;
static unsigned long pg_start[MAX_VMAS];
static unsigned long pg_end[MAX_VMAS];
static unsigned long voffset;
static int pagemap_fd;
#define MAX_BIT_FILTERS 64
static int nr_bit_filters;
@ -163,9 +167,16 @@ static uint64_t opt_bits[MAX_BIT_FILTERS];
static int page_size;
#define PAGES_BATCH (64 << 10) /* 64k pages */
static int pagemap_fd;
static int kpageflags_fd;
static int opt_hwpoison;
static int opt_unpoison;
static char *hwpoison_debug_fs = "/debug/hwpoison";
static int hwpoison_inject_fd;
static int hwpoison_forget_fd;
#define HASH_SHIFT 13
#define HASH_SIZE (1 << HASH_SHIFT)
#define HASH_MASK (HASH_SIZE - 1)
@ -207,6 +218,74 @@ static void fatal(const char *x, ...)
exit(EXIT_FAILURE);
}
int checked_open(const char *pathname, int flags)
{
int fd = open(pathname, flags);
if (fd < 0) {
perror(pathname);
exit(EXIT_FAILURE);
}
return fd;
}
/*
* pagemap/kpageflags routines
*/
static unsigned long do_u64_read(int fd, char *name,
uint64_t *buf,
unsigned long index,
unsigned long count)
{
long bytes;
if (index > ULONG_MAX / 8)
fatal("index overflow: %lu\n", index);
if (lseek(fd, index * 8, SEEK_SET) < 0) {
perror(name);
exit(EXIT_FAILURE);
}
bytes = read(fd, buf, count * 8);
if (bytes < 0) {
perror(name);
exit(EXIT_FAILURE);
}
if (bytes % 8)
fatal("partial read: %lu bytes\n", bytes);
return bytes / 8;
}
static unsigned long kpageflags_read(uint64_t *buf,
unsigned long index,
unsigned long pages)
{
return do_u64_read(kpageflags_fd, PROC_KPAGEFLAGS, buf, index, pages);
}
static unsigned long pagemap_read(uint64_t *buf,
unsigned long index,
unsigned long pages)
{
return do_u64_read(pagemap_fd, "/proc/pid/pagemap", buf, index, pages);
}
static unsigned long pagemap_pfn(uint64_t val)
{
unsigned long pfn;
if (val & PM_PRESENT)
pfn = PM_PFRAME(val);
else
pfn = 0;
return pfn;
}
/*
* page flag names
@ -255,7 +334,8 @@ static char *page_flag_longname(uint64_t flags)
* page list and summary
*/
static void show_page_range(unsigned long offset, uint64_t flags)
static void show_page_range(unsigned long voffset,
unsigned long offset, uint64_t flags)
{
static uint64_t flags0;
static unsigned long voff;
@ -281,7 +361,8 @@ static void show_page_range(unsigned long offset, uint64_t flags)
count = 1;
}
static void show_page(unsigned long offset, uint64_t flags)
static void show_page(unsigned long voffset,
unsigned long offset, uint64_t flags)
{
if (opt_pid)
printf("%lx\t", voffset);
@ -362,6 +443,62 @@ static uint64_t well_known_flags(uint64_t flags)
return flags;
}
static uint64_t kpageflags_flags(uint64_t flags)
{
flags = expand_overloaded_flags(flags);
if (!opt_raw)
flags = well_known_flags(flags);
return flags;
}
/*
* page actions
*/
static void prepare_hwpoison_fd(void)
{
char buf[100];
if (opt_hwpoison && !hwpoison_inject_fd) {
sprintf(buf, "%s/corrupt-pfn", hwpoison_debug_fs);
hwpoison_inject_fd = checked_open(buf, O_WRONLY);
}
if (opt_unpoison && !hwpoison_forget_fd) {
sprintf(buf, "%s/renew-pfn", hwpoison_debug_fs);
hwpoison_forget_fd = checked_open(buf, O_WRONLY);
}
}
static int hwpoison_page(unsigned long offset)
{
char buf[100];
int len;
len = sprintf(buf, "0x%lx\n", offset);
len = write(hwpoison_inject_fd, buf, len);
if (len < 0) {
perror("hwpoison inject");
return len;
}
return 0;
}
static int unpoison_page(unsigned long offset)
{
char buf[100];
int len;
len = sprintf(buf, "0x%lx\n", offset);
len = write(hwpoison_forget_fd, buf, len);
if (len < 0) {
perror("hwpoison forget");
return len;
}
return 0;
}
/*
* page frame walker
@ -394,104 +531,83 @@ static int hash_slot(uint64_t flags)
exit(EXIT_FAILURE);
}
static void add_page(unsigned long offset, uint64_t flags)
static void add_page(unsigned long voffset,
unsigned long offset, uint64_t flags)
{
flags = expand_overloaded_flags(flags);
if (!opt_raw)
flags = well_known_flags(flags);
flags = kpageflags_flags(flags);
if (!bit_mask_ok(flags))
return;
if (opt_hwpoison)
hwpoison_page(offset);
if (opt_unpoison)
unpoison_page(offset);
if (opt_list == 1)
show_page_range(offset, flags);
show_page_range(voffset, offset, flags);
else if (opt_list == 2)
show_page(offset, flags);
show_page(voffset, offset, flags);
nr_pages[hash_slot(flags)]++;
total_pages++;
}
static void walk_pfn(unsigned long index, unsigned long count)
#define KPAGEFLAGS_BATCH (64 << 10) /* 64k pages */
static void walk_pfn(unsigned long voffset,
unsigned long index,
unsigned long count)
{
uint64_t buf[KPAGEFLAGS_BATCH];
unsigned long batch;
unsigned long n;
unsigned long pages;
unsigned long i;
if (index > ULONG_MAX / KPF_BYTES)
fatal("index overflow: %lu\n", index);
lseek(kpageflags_fd, index * KPF_BYTES, SEEK_SET);
while (count) {
uint64_t kpageflags_buf[KPF_BYTES * PAGES_BATCH];
batch = min_t(unsigned long, count, PAGES_BATCH);
n = read(kpageflags_fd, kpageflags_buf, batch * KPF_BYTES);
if (n == 0)
batch = min_t(unsigned long, count, KPAGEFLAGS_BATCH);
pages = kpageflags_read(buf, index, batch);
if (pages == 0)
break;
if (n < 0) {
perror(PROC_KPAGEFLAGS);
exit(EXIT_FAILURE);
}
if (n % KPF_BYTES != 0)
fatal("partial read: %lu bytes\n", n);
n = n / KPF_BYTES;
for (i = 0; i < pages; i++)
add_page(voffset + i, index + i, buf[i]);
for (i = 0; i < n; i++)
add_page(index + i, kpageflags_buf[i]);
index += batch;
count -= batch;
index += pages;
count -= pages;
}
}
#define PAGEMAP_BATCH 4096
static unsigned long task_pfn(unsigned long pgoff)
#define PAGEMAP_BATCH (64 << 10)
static void walk_vma(unsigned long index, unsigned long count)
{
static uint64_t buf[PAGEMAP_BATCH];
static unsigned long start;
static long count;
uint64_t pfn;
uint64_t buf[PAGEMAP_BATCH];
unsigned long batch;
unsigned long pages;
unsigned long pfn;
unsigned long i;
if (pgoff < start || pgoff >= start + count) {
if (lseek64(pagemap_fd,
(uint64_t)pgoff * PM_ENTRY_BYTES,
SEEK_SET) < 0) {
perror("pagemap seek");
exit(EXIT_FAILURE);
}
count = read(pagemap_fd, buf, sizeof(buf));
if (count == 0)
return 0;
if (count < 0) {
perror("pagemap read");
exit(EXIT_FAILURE);
}
if (count % PM_ENTRY_BYTES) {
fatal("pagemap read not aligned.\n");
exit(EXIT_FAILURE);
}
count /= PM_ENTRY_BYTES;
start = pgoff;
while (count) {
batch = min_t(unsigned long, count, PAGEMAP_BATCH);
pages = pagemap_read(buf, index, batch);
if (pages == 0)
break;
for (i = 0; i < pages; i++) {
pfn = pagemap_pfn(buf[i]);
if (pfn)
walk_pfn(index + i, pfn, 1);
}
pfn = buf[pgoff - start];
if (pfn & PM_PRESENT)
pfn = PM_PFRAME(pfn);
else
pfn = 0;
return pfn;
index += pages;
count -= pages;
}
}
static void walk_task(unsigned long index, unsigned long count)
{
int i = 0;
const unsigned long end = index + count;
unsigned long start;
int i = 0;
while (index < end) {
@ -501,15 +617,11 @@ static void walk_task(unsigned long index, unsigned long count)
if (pg_start[i] >= end)
return;
voffset = max_t(unsigned long, pg_start[i], index);
start = max_t(unsigned long, pg_start[i], index);
index = min_t(unsigned long, pg_end[i], end);
assert(voffset < index);
for (; voffset < index; voffset++) {
unsigned long pfn = task_pfn(voffset);
if (pfn)
walk_pfn(pfn, 1);
}
assert(start < index);
walk_vma(start, index - start);
}
}
@ -527,18 +639,14 @@ static void walk_addr_ranges(void)
{
int i;
kpageflags_fd = open(PROC_KPAGEFLAGS, O_RDONLY);
if (kpageflags_fd < 0) {
perror(PROC_KPAGEFLAGS);
exit(EXIT_FAILURE);
}
kpageflags_fd = checked_open(PROC_KPAGEFLAGS, O_RDONLY);
if (!nr_addr_ranges)
add_addr_range(0, ULONG_MAX);
for (i = 0; i < nr_addr_ranges; i++)
if (!opt_pid)
walk_pfn(opt_offset[i], opt_size[i]);
walk_pfn(0, opt_offset[i], opt_size[i]);
else
walk_task(opt_offset[i], opt_size[i]);
@ -575,6 +683,8 @@ static void usage(void)
" -l|--list Show page details in ranges\n"
" -L|--list-each Show page details one by one\n"
" -N|--no-summary Don't show summay info\n"
" -X|--hwpoison hwpoison pages\n"
" -x|--unpoison unpoison pages\n"
" -h|--help Show this usage message\n"
"addr-spec:\n"
" N one page at offset N (unit: pages)\n"
@ -624,11 +734,7 @@ static void parse_pid(const char *str)
opt_pid = parse_number(str);
sprintf(buf, "/proc/%d/pagemap", opt_pid);
pagemap_fd = open(buf, O_RDONLY);
if (pagemap_fd < 0) {
perror(buf);
exit(EXIT_FAILURE);
}
pagemap_fd = checked_open(buf, O_RDONLY);
sprintf(buf, "/proc/%d/maps", opt_pid);
file = fopen(buf, "r");
@ -788,6 +894,8 @@ static struct option opts[] = {
{ "list" , 0, NULL, 'l' },
{ "list-each" , 0, NULL, 'L' },
{ "no-summary", 0, NULL, 'N' },
{ "hwpoison" , 0, NULL, 'X' },
{ "unpoison" , 0, NULL, 'x' },
{ "help" , 0, NULL, 'h' },
{ NULL , 0, NULL, 0 }
};
@ -799,7 +907,7 @@ int main(int argc, char *argv[])
page_size = getpagesize();
while ((c = getopt_long(argc, argv,
"rp:f:a:b:lLNh", opts, NULL)) != -1) {
"rp:f:a:b:lLNXxh", opts, NULL)) != -1) {
switch (c) {
case 'r':
opt_raw = 1;
@ -825,6 +933,14 @@ int main(int argc, char *argv[])
case 'N':
opt_no_summary = 1;
break;
case 'X':
opt_hwpoison = 1;
prepare_hwpoison_fd();
break;
case 'x':
opt_unpoison = 1;
prepare_hwpoison_fd();
break;
case 'h':
usage();
exit(0);
@ -844,7 +960,7 @@ int main(int argc, char *argv[])
walk_addr_ranges();
if (opt_list == 1)
show_page_range(0, 0); /* drain the buffer */
show_page_range(0, 0, 0); /* drain the buffer */
if (opt_no_summary)
return 0;

8
Documentation/vm/pagemap.txt
View file

@ -57,7 +57,9 @@ There are three components to pagemap:
16. COMPOUND_TAIL
16. HUGE
18. UNEVICTABLE
19. HWPOISON
20. NOPAGE
21. KSM
Short descriptions to the page flags:
@ -86,9 +88,15 @@ Short descriptions to the page flags:
17. HUGE
this is an integral part of a HugeTLB page
19. HWPOISON
hardware detected memory corruption on this page: don't touch the data!
20. NOPAGE
no page frame exists at the requested address
21. KSM
identical memory pages dynamically shared between one or more processes
[IO related page flags]
1. ERROR IO error occurred
3. UPTODATE page has up-to-date data

156
MAINTAINERS
View file

@ -65,21 +65,14 @@ trivial patch so apply some common sense.
8. Happy hacking.
-----------------------------------
Maintainers List (try to look for most precise areas first)
Note: For the hard of thinking, this list is meant to remain in alphabetical
order. If you could add yourselves to it in alphabetical order that would be
so much easier [Ed]
P: Person (obsolete)
M: Mail patches to: FullName <address@domain>
L: Mailing list that is relevant to this area
W: Web-page with status/info
T: SCM tree type and location. Type is one of: git, hg, quilt, stgit.
S: Status, one of the following:
Descriptions of section entries:
P: Person (obsolete)
M: Mail patches to: FullName <address@domain>
L: Mailing list that is relevant to this area
W: Web-page with status/info
T: SCM tree type and location. Type is one of: git, hg, quilt, stgit.
S: Status, one of the following:
Supported: Someone is actually paid to look after this.
Maintained: Someone actually looks after it.
Odd Fixes: It has a maintainer but they don't have time to do
@ -89,19 +82,34 @@ S: Status, one of the following:
Obsolete: Old code. Something tagged obsolete generally means
it has been replaced by a better system and you
should be using that.
F: Files and directories with wildcard patterns.
F: Files and directories with wildcard patterns.
A trailing slash includes all files and subdirectory files.
F: drivers/net/ all files in and below drivers/net
F: drivers/net/* all files in drivers/net, but not below
F: */net/* all files in "any top level directory"/net
One pattern per line. Multiple F: lines acceptable.
X: Files and directories that are NOT maintained, same rules as F:
X: Files and directories that are NOT maintained, same rules as F:
Files exclusions are tested before file matches.
Can be useful for excluding a specific subdirectory, for instance:
F: net/
X: net/ipv6/
matches all files in and below net excluding net/ipv6/
K: Keyword perl extended regex pattern to match content in a
patch or file. For instance:
K: of_get_profile
matches patches or files that contain "of_get_profile"
K: \b(printk|pr_(info|err))\b
matches patches or files that contain one or more of the words
printk, pr_info or pr_err
One regex pattern per line. Multiple K: lines acceptable.
Note: For the hard of thinking, this list is meant to remain in alphabetical
order. If you could add yourselves to it in alphabetical order that would be
so much easier [Ed]
Maintainers List (try to look for most precise areas first)
-----------------------------------
3C505 NETWORK DRIVER
M: Philip Blundell <philb@gnu.org>
@ -577,6 +585,11 @@ M: Mike Rapoport <mike@compulab.co.il>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
ARM/CONTEC MICRO9 MACHINE SUPPORT
M: Hubert Feurstein <hubert.feurstein@contec.at>
S: Maintained
F: arch/arm/mach-ep93xx/micro9.c
ARM/CORGI MACHINE SUPPORT
M: Richard Purdie <rpurdie@rpsys.net>
S: Maintained
@ -987,7 +1000,7 @@ F: drivers/net/atlx/
ATM
M: Chas Williams <chas@cmf.nrl.navy.mil>
L: linux-atm-general@lists.sourceforge.net (subscribers-only)
L: linux-atm-general@lists.sourceforge.net (moderated for non-subscribers)
L: netdev@vger.kernel.org
W: http://linux-atm.sourceforge.net
S: Maintained
@ -1231,6 +1244,13 @@ L: netdev@vger.kernel.org
S: Supported
F: drivers/net/tg3.*
BROCADE BFA FC SCSI DRIVER
P: Jing Huang
M: huangj@brocade.com
L: linux-scsi@vger.kernel.org
S: Supported
F: drivers/scsi/bfa/
BSG (block layer generic sg v4 driver)
M: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
L: linux-scsi@vger.kernel.org
@ -1468,6 +1488,7 @@ F: mm/*cgroup*
CORETEMP HARDWARE MONITORING DRIVER
M: Rudolf Marek <r.marek@assembler.cz>
M: Huaxu Wan <huaxu.wan@intel.com>
L: lm-sensors@lm-sensors.org
S: Maintained
F: Documentation/hwmon/coretemp
@ -2071,7 +2092,7 @@ S: Maintained
F: fs/*
FINTEK F75375S HARDWARE MONITOR AND FAN CONTROLLER DRIVER
M: Riku Voipio <riku.vipio@iki.fi>
M: Riku Voipio <riku.voipio@iki.fi>
L: lm-sensors@lm-sensors.org
S: Maintained
F: drivers/hwmon/f75375s.c
@ -2152,7 +2173,7 @@ S: Supported
F: arch/powerpc/sysdev/qe_lib/
F: arch/powerpc/include/asm/*qe.h
FREESCALE USB PERIPHERIAL DRIVERS
FREESCALE USB PERIPHERAL DRIVERS
M: Li Yang <leoli@freescale.com>
L: linux-usb@vger.kernel.org
L: linuxppc-dev@ozlabs.org
@ -2203,18 +2224,6 @@ F: Documentation/filesystems/caching/
F: fs/fscache/
F: include/linux/fscache*.h
TRACING
M: Steven Rostedt <rostedt@goodmis.org>
M: Frederic Weisbecker <fweisbec@gmail.com>
M: Ingo Molnar <mingo@redhat.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git tracing/core
S: Maintained
F: Documentation/trace/ftrace.txt
F: arch/*/*/*/ftrace.h
F: arch/*/kernel/ftrace.c
F: include/*/ftrace.h include/trace/ include/linux/trace*.h
F: kernel/trace/
FUJITSU FR-V (FRV) PORT
M: David Howells <dhowells@redhat.com>
S: Maintained
@ -2273,9 +2282,8 @@ S: Maintained
F: include/asm-generic
GENERIC UIO DRIVER FOR PCI DEVICES
M: Michael S. Tsirkin <mst@redhat.com>
M: "Michael S. Tsirkin" <mst@redhat.com>
L: kvm@vger.kernel.org
L: linux-kernel@vger.kernel.org
S: Supported
F: drivers/uio/uio_pci_generic.c
@ -2616,6 +2624,7 @@ L: linux1394-devel@lists.sourceforge.net
W: http://www.linux1394.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git
S: Maintained
F: Documentation/debugging-via-ohci1394.txt
F: drivers/ieee1394/
IEEE 1394 RAW I/O DRIVER
@ -3004,8 +3013,8 @@ F: scripts/Makefile.*
KERNEL JANITORS
L: kernel-janitors@vger.kernel.org
W: http://www.kerneljanitors.org/
S: Maintained
W: http://janitor.kernelnewbies.org/
S: Odd Fixes
KERNEL NFSD, SUNRPC, AND LOCKD SERVERS
M: "J. Bruce Fields" <bfields@fieldses.org>
@ -3656,10 +3665,18 @@ F: Documentation/blockdev/nbd.txt
F: drivers/block/nbd.c
F: include/linux/nbd.h
NETWORK DROP MONITOR
M: Neil Horman <nhorman@tuxdriver.com>
L: netdev@vger.kernel.org
S: Maintained
W: https://fedorahosted.org/dropwatch/
F: net/core/drop_monitor.c
NETWORKING [GENERAL]
M: "David S. Miller" <davem@davemloft.net>
L: netdev@vger.kernel.org
W: http://www.linuxfoundation.org/en/Net
W: http://patchwork.ozlabs.org/project/netdev/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6.git
S: Maintained
F: net/
@ -3777,7 +3794,7 @@ F: drivers/video/riva/
F: drivers/video/nvidia/
OMAP SUPPORT
M: "Tony Lindgren <tony@atomide.com>" <tony@atomide.com>
M: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org
W: http://www.muru.com/linux/omap/
W: http://linux.omap.com/
@ -3882,6 +3899,15 @@ S: Maintained
F: Documentation/i2c/busses/i2c-ocores
F: drivers/i2c/busses/i2c-ocores.c
OPEN FIRMWARE AND FLATTENED DEVICE TREE
M: Grant Likely <grant.likely@secretlab.ca>
L: devicetree-discuss@lists.ozlabs.org
W: http://fdt.secretlab.ca
S: Maintained
F: drivers/of
F: include/linux/of*.h
K: of_get_property
OPROFILE
M: Robert Richter <robert.richter@amd.com>
L: oprofile-list@lists.sf.net
@ -3986,6 +4012,7 @@ F: drivers/block/paride/
PARISC ARCHITECTURE
M: Kyle McMartin <kyle@mcmartin.ca>
M: Helge Deller <deller@gmx.de>
M: "James E.J. Bottomley" <jejb@parisc-linux.org>
L: linux-parisc@vger.kernel.org
W: http://www.parisc-linux.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6.git
@ -4069,6 +4096,13 @@ M: Peter Zijlstra <a.p.zijlstra@chello.nl>
M: Paul Mackerras <paulus@samba.org>
M: Ingo Molnar <mingo@elte.hu>
S: Supported
F: kernel/perf_event.c
F: include/linux/perf_event.h
F: arch/*/*/kernel/perf_event.c
F: arch/*/include/asm/perf_event.h
F: arch/*/lib/perf_event.c
F: arch/*/kernel/perf_callchain.c
F: tools/perf/
PERSONALITY HANDLING
M: Christoph Hellwig <hch@infradead.org>
@ -4309,7 +4343,7 @@ F: drivers/video/aty/aty128fb.c
RALINK RT2X00 WIRELESS LAN DRIVER
P: rt2x00 project
L: linux-wireless@vger.kernel.org
L: users@rt2x00.serialmonkey.com
L: users@rt2x00.serialmonkey.com (moderated for non-subscribers)
W: http://rt2x00.serialmonkey.com/
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ivd/rt2x00.git
@ -4518,12 +4552,11 @@ F: kernel/sched*
F: include/linux/sched.h
SCORE ARCHITECTURE
P: Chen Liqin
M: liqin.chen@sunplusct.com
P: Lennox Wu
M: lennox.wu@gmail.com
M: Chen Liqin <liqin.chen@sunplusct.com>
M: Lennox Wu <lennox.wu@gmail.com>
W: http://www.sunplusct.com
S: Supported
F: arch/score/
SCSI CDROM DRIVER
M: Jens Axboe <axboe@kernel.dk>
@ -4651,6 +4684,14 @@ F: drivers/ata/
F: include/linux/ata.h
F: include/linux/libata.h
SERVER ENGINES 10Gbps iSCSI - BladeEngine 2 DRIVER
P: Jayamohan Kallickal
M: jayamohank@serverengines.com
L: linux-scsi@vger.kernel.org
W: http://www.serverengines.com
S: Supported
F: drivers/scsi/be2iscsi/
SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER
M: Sathya Perla <sathyap@serverengines.com>
M: Subbu Seetharaman <subbus@serverengines.com>
@ -4704,8 +4745,7 @@ F: drivers/usb/gadget/lh7a40*
F: drivers/usb/host/ohci-lh7a40*
SIMPLE FIRMWARE INTERFACE (SFI)
P: Len Brown
M: lenb@kernel.org
M: Len Brown <lenb@kernel.org>
L: sfi-devel@simplefirmware.org
W: http://simplefirmware.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-sfi-2.6.git
@ -5153,6 +5193,20 @@ L: tpmdd-devel@lists.sourceforge.net (moderated for non-subscribers)
S: Maintained
F: drivers/char/tpm/
TRACING
M: Steven Rostedt <rostedt@goodmis.org>
M: Frederic Weisbecker <fweisbec@gmail.com>
M: Ingo Molnar <mingo@redhat.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git tracing/core
S: Maintained
F: Documentation/trace/ftrace.txt
F: arch/*/*/*/ftrace.h
F: arch/*/kernel/ftrace.c
F: include/*/ftrace.h
F: include/linux/trace*.h
F: include/trace/
F: kernel/trace/
TRIVIAL PATCHES
M: Jiri Kosina <trivial@kernel.org>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial.git
@ -5641,6 +5695,13 @@ S: Maintained
F: drivers/vlynq/vlynq.c
F: include/linux/vlynq.h
VMWARE VMXNET3 ETHERNET DRIVER
M: Shreyas Bhatewara <sbhatewara@vmware.com>
M: VMware, Inc. <pv-drivers@vmware.com>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/vmxnet3/
VOLTAGE AND CURRENT REGULATOR FRAMEWORK
M: Liam Girdwood <lrg@slimlogic.co.uk>
M: Mark Brown <broonie@opensource.wolfsonmicro.com>
@ -5712,8 +5773,7 @@ S: Maintained
F: drivers/scsi/wd7000.c
WINBOND CIR DRIVER
P: David Härdeman
M: david@hardeman.nu
M: David Härdeman <david@hardeman.nu>
S: Maintained
F: drivers/input/misc/winbond-cir.c
@ -5770,9 +5830,7 @@ F: drivers/input/touchscreen/*wm97*
F: include/linux/wm97xx.h
WOLFSON MICROELECTRONICS PMIC DRIVERS
P: Mark Brown
M: broonie@opensource.wolfsonmicro.com
L: linux-kernel@vger.kernel.org
M: Mark Brown <broonie@opensource.wolfsonmicro.com>
T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus
W: http://opensource.wolfsonmicro.com/node/8
S: Supported

48
Makefile
View file

@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 32
EXTRAVERSION = -rc3
EXTRAVERSION = -rc5
NAME = Man-Eating Seals of Antiquity
# *DOCUMENTATION*
@ -179,46 +179,9 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
# Alternatively CROSS_COMPILE can be set in the environment.
# Default value for CROSS_COMPILE is not to prefix executables
# Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
#
# To force ARCH and CROSS_COMPILE settings include kernel.* files
# in the kernel tree - do not patch this file.
export KBUILD_BUILDHOST := $(SUBARCH)
# Kbuild save the ARCH and CROSS_COMPILE setting in kernel.* files.
# Restore these settings and check that user did not specify
# conflicting values.
saved_arch := $(shell cat include/generated/kernel.arch 2> /dev/null)
saved_cross := $(shell cat include/generated/kernel.cross 2> /dev/null)
ifneq ($(CROSS_COMPILE),)
ifneq ($(saved_cross),)
ifneq ($(CROSS_COMPILE),$(saved_cross))
$(error CROSS_COMPILE changed from \
"$(saved_cross)" to \
to "$(CROSS_COMPILE)". \
Use "make mrproper" to fix it up)
endif
endif
else
CROSS_COMPILE := $(saved_cross)
endif
ifneq ($(ARCH),)
ifneq ($(saved_arch),)
ifneq ($(saved_arch),$(ARCH))
$(error ARCH changed from \
"$(saved_arch)" to "$(ARCH)". \
Use "make mrproper" to fix it up)
endif
endif
else
ifneq ($(saved_arch),)
ARCH := $(saved_arch)
else
ARCH := $(SUBARCH)
endif
endif
ARCH ?= $(SUBARCH)
CROSS_COMPILE ?=
# Architecture as present in compile.h
UTS_MACHINE := $(ARCH)
@ -483,11 +446,6 @@ ifeq ($(config-targets),1)
include $(srctree)/arch/$(SRCARCH)/Makefile
export KBUILD_DEFCONFIG KBUILD_KCONFIG
# save ARCH & CROSS_COMPILE settings
$(shell mkdir -p include/generated && \
echo $(ARCH) > include/generated/kernel.arch && \
echo $(CROSS_COMPILE) > include/generated/kernel.cross)
config: scripts_basic outputmakefile FORCE
$(Q)mkdir -p include/linux include/config
$(Q)$(MAKE) $(build)=scripts/kconfig $@

2
arch/arm/configs/n8x0_defconfig
View file

@ -304,7 +304,7 @@ CONFIG_ALIGNMENT_TRAP=y
CONFIG_ZBOOT_ROM_TEXT=0x10C08000
CONFIG_ZBOOT_ROM_BSS=0x10200000
# CONFIG_ZBOOT_ROM is not set
CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS0,115200n8"
CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS2,115200n8"
# CONFIG_XIP_KERNEL is not set
# CONFIG_KEXEC is not set

1
arch/arm/configs/omap3_beagle_defconfig
View file

@ -969,7 +969,6 @@ CONFIG_USB_ETH_RNDIS=y
#
CONFIG_USB_OTG_UTILS=y
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_ISP1301_OMAP is not set
CONFIG_TWL4030_USB=y
# CONFIG_NOP_USB_XCEIV is not set
CONFIG_MMC=y

94
arch/arm/configs/u300_defconfig
View file

@ -1,14 +1,14 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.31-rc3
# Thu Jul 16 23:36:10 2009
# Linux kernel version: 2.6.32-rc5
# Sat Oct 17 23:32:24 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
CONFIG_HAVE_TCM=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@ -44,11 +44,12 @@ CONFIG_SYSVIPC_SYSCTL=y
#
# RCU Subsystem
#
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
# CONFIG_TREE_PREEMPT_RCU is not set
# CONFIG_RCU_TRACE is not set
CONFIG_RCU_FANOUT=32
# CONFIG_RCU_FANOUT_EXACT is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_GROUP_SCHED is not set
@ -80,17 +81,15 @@ CONFIG_SHMEM=y
# CONFIG_AIO is not set
#
# Performance Counters
# Kernel Performance Events And Counters
#
# CONFIG_VM_EVENT_COUNTERS is not set
CONFIG_SLUB_DEBUG=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_COMPAT_BRK=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
@ -133,6 +132,7 @@ CONFIG_DEFAULT_IOSCHED="deadline"
#
# System Type
#
CONFIG_MMU=y
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
@ -147,6 +147,7 @@ CONFIG_DEFAULT_IOSCHED="deadline"
# CONFIG_ARCH_STMP3XXX is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_NOMADIK is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
@ -169,11 +170,13 @@ CONFIG_DEFAULT_IOSCHED="deadline"
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_S3C64XX is not set
# CONFIG_ARCH_S5PC1XX is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
CONFIG_ARCH_U300=y
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_BCMRING is not set
#
# ST-Ericsson AB U300/U330/U335/U365 Platform
@ -195,6 +198,7 @@ CONFIG_MACH_U300_BS335=y
CONFIG_MACH_U300_DUAL_RAM=y
CONFIG_U300_DEBUG=y
# CONFIG_MACH_U300_SEMI_IS_SHARED is not set
CONFIG_MACH_U300_SPIDUMMY=y
#
# All the settings below must match the bootloader's settings
@ -207,7 +211,7 @@ CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
CONFIG_CPU_PABRT_NOIFAR=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_TLB_V4WBI=y
@ -222,6 +226,7 @@ CONFIG_ARM_THUMB=y
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_VIC=y
CONFIG_ARM_VIC_NR=2
CONFIG_COMMON_CLKDEV=y
@ -245,6 +250,8 @@ CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_HZ=100
CONFIG_AEABI=y
@ -265,6 +272,7 @@ CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_UACCESS_WITH_MEMCPY is not set
@ -313,6 +321,7 @@ CONFIG_PM=y
# CONFIG_PM_DEBUG is not set
# CONFIG_SUSPEND is not set
# CONFIG_APM_EMULATION is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y
@ -351,6 +360,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
@ -391,6 +401,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_DEVTMPFS is not set
CONFIG_STANDALONE=y
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
@ -402,9 +413,9 @@ CONFIG_EXTRA_FIRMWARE=""
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AFS_PARTS is not set
@ -453,6 +464,7 @@ CONFIG_MTD_CFI_I2=y
#
# CONFIG_MTD_DATAFLASH is not set
# CONFIG_MTD_M25P80 is not set
# CONFIG_MTD_SST25L is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
@ -520,6 +532,7 @@ CONFIG_HAVE_IDE=y
# CONFIG_MD is not set
# CONFIG_NETDEVICES is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set
#
# Input device support
@ -540,12 +553,16 @@ CONFIG_INPUT_EVDEV=y
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_QT2160 is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
@ -597,6 +614,7 @@ CONFIG_LEGACY_PTY_COUNT=16
# CONFIG_TCG_TPM is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
# CONFIG_I2C_CHARDEV is not set
CONFIG_I2C_HELPER_AUTO=y
@ -629,9 +647,6 @@ CONFIG_I2C_STU300=y
# Miscellaneous I2C Chip support
#
# CONFIG_DS1682 is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
@ -653,16 +668,21 @@ CONFIG_SPI_PL022=y
#
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
#
# PPS support
#
# CONFIG_PPS is not set
# CONFIG_W1 is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
# CONFIG_PDA_POWER is not set
# CONFIG_BATTERY_DS2760 is not set
# CONFIG_BATTERY_DS2782 is not set
# CONFIG_BATTERY_BQ27x00 is not set
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
@ -690,10 +710,24 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_MFD_TC6387XB is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_MC13783 is not set
CONFIG_AB3100_CORE=y
CONFIG_AB3100_OTP=y
# CONFIG_EZX_PCAP is not set
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_BQ24022 is not set
# CONFIG_REGULATOR_MAX1586 is not set
# CONFIG_REGULATOR_LP3971 is not set
CONFIG_REGULATOR_AB3100=y
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
# CONFIG_MEDIA_SUPPORT is not set
#
@ -792,9 +826,10 @@ CONFIG_MMC_BLOCK_BOUNCE=y
#
CONFIG_MMC_ARMMMCI=y
# CONFIG_MMC_SDHCI is not set
# CONFIG_MMC_AT91 is not set
# CONFIG_MMC_ATMELMCI is not set
# CONFIG_MMC_SPI is not set
# CONFIG_MEMSTICK is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
@ -820,10 +855,10 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=y
#
# iptables trigger is under Netfilter config (LED target)
#
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_HCTOSYS is not set
# CONFIG_RTC_DEBUG is not set
#
@ -863,6 +898,7 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set
# CONFIG_RTC_DRV_PCF2123 is not set
#
# Platform RTC drivers
@ -878,27 +914,25 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
CONFIG_RTC_DRV_AB3100=y
#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_PL030 is not set
# CONFIG_RTC_DRV_PL031 is not set
CONFIG_RTC_DRV_COH901331=y
CONFIG_DMADEVICES=y
#
# DMA Devices
#
# CONFIG_AUXDISPLAY is not set
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_BQ24022 is not set
# CONFIG_REGULATOR_MAX1586 is not set
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_UIO is not set
#
# TI VLYNQ
#
# CONFIG_STAGING is not set
#
@ -913,6 +947,7 @@ CONFIG_REGULATOR=y
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
# CONFIG_DNOTIFY is not set
@ -975,7 +1010,6 @@ CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_NETWORK_FILESYSTEMS is not set
#
@ -1033,6 +1067,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
@ -1066,11 +1101,13 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
@ -1121,6 +1158,7 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
# CONFIG_CRC32 is not set
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y

6
arch/arm/include/asm/bitops.h
View file

@ -84,7 +84,7 @@ ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
*p = res | mask;
raw_local_irq_restore(flags);
return res & mask;
return (res & mask) != 0;
}
static inline int
@ -101,7 +101,7 @@ ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
*p = res & ~mask;
raw_local_irq_restore(flags);
return res & mask;
return (res & mask) != 0;
}
static inline int
@ -118,7 +118,7 @@ ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
*p = res ^ mask;
raw_local_irq_restore(flags);
return res & mask;
return (res & mask) != 0;
}
#include <asm-generic/bitops/non-atomic.h>

3
arch/arm/include/asm/elf.h
View file

@ -98,6 +98,9 @@ extern int elf_check_arch(const struct elf32_hdr *);
extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
#define ELF_CORE_COPY_TASK_REGS dump_task_regs
#define USE_ELF_CORE_DUMP
#define ELF_EXEC_PAGESIZE 4096

3
arch/arm/include/asm/tlbflush.h
View file

@ -350,7 +350,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
if (tlb_flag(TLB_WB))
dsb();
if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) {
if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
if (tlb_flag(TLB_V3_FULL))
asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
if (tlb_flag(TLB_V4_U_FULL))
@ -360,6 +360,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
if (tlb_flag(TLB_V4_I_FULL))
asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
}
put_cpu();
if (tlb_flag(TLB_V6_U_ASID))
asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc");

28
arch/arm/kernel/entry-armv.S
View file

@ -608,33 +608,33 @@ call_fpe:
THUMB( add pc, r8 )
nop
W(mov) pc, lr @ CP#0
movw_pc lr @ CP#0
W(b) do_fpe @ CP#1 (FPE)
W(b) do_fpe @ CP#2 (FPE)
W(mov) pc, lr @ CP#3
movw_pc lr @ CP#3
#ifdef CONFIG_CRUNCH
b crunch_task_enable @ CP#4 (MaverickCrunch)
b crunch_task_enable @ CP#5 (MaverickCrunch)
b crunch_task_enable @ CP#6 (MaverickCrunch)
#else
W(mov) pc, lr @ CP#4
W(mov) pc, lr @ CP#5
W(mov) pc, lr @ CP#6
movw_pc lr @ CP#4
movw_pc lr @ CP#5
movw_pc lr @ CP#6
#endif
W(mov) pc, lr @ CP#7
W(mov) pc, lr @ CP#8
W(mov) pc, lr @ CP#9
movw_pc lr @ CP#7
movw_pc lr @ CP#8
movw_pc lr @ CP#9
#ifdef CONFIG_VFP
W(b) do_vfp @ CP#10 (VFP)
W(b) do_vfp @ CP#11 (VFP)
#else
W(mov) pc, lr @ CP#10 (VFP)
W(mov) pc, lr @ CP#11 (VFP)
movw_pc lr @ CP#10 (VFP)
movw_pc lr @ CP#11 (VFP)
#endif
W(mov) pc, lr @ CP#12
W(mov) pc, lr @ CP#13
W(mov) pc, lr @ CP#14 (Debug)
W(mov) pc, lr @ CP#15 (Control)
movw_pc lr @ CP#12
movw_pc lr @ CP#13
movw_pc lr @ CP#14 (Debug)
movw_pc lr @ CP#15 (Control)
#ifdef CONFIG_NEON
.align 6

15
arch/arm/kernel/entry-header.S
View file

@ -110,6 +110,13 @@
mov \rd, sp, lsr #13
mov \rd, \rd, lsl #13
.endm
@
@ 32-bit wide "mov pc, reg"
@
.macro movw_pc, reg
mov pc, \reg
.endm
#else /* CONFIG_THUMB2_KERNEL */
.macro svc_exit, rpsr
clrex @ clear the exclusive monitor
@ -146,6 +153,14 @@
lsr \rd, \rd, #13
mov \rd, \rd, lsl #13
.endm
@
@ 32-bit wide "mov pc, reg"
@
.macro movw_pc, reg
mov pc, \reg
nop
.endm
#endif /* !CONFIG_THUMB2_KERNEL */
/*

9
arch/arm/kernel/process.c
View file

@ -327,6 +327,15 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
return 0;
}
/*
* Fill in the task's elfregs structure for a core dump.
*/
int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
{
elf_core_copy_regs(elfregs, task_pt_regs(t));
return 1;
}
/*
* fill in the fpe structure for a core dump...
*/

1
arch/arm/kernel/time.c
View file

@ -21,6 +21,7 @@
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/timex.h>
#include <linux/errno.h>

76
arch/arm/kernel/traps.c
View file

@ -45,21 +45,21 @@ static int __init user_debug_setup(char *str)
__setup("user_debug=", user_debug_setup);
#endif
static void dump_mem(const char *str, unsigned long bottom, unsigned long top);
static void dump_mem(const char *, const char *, unsigned long, unsigned long);
void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
{
#ifdef CONFIG_KALLSYMS
printk("[<%08lx>] ", where);
print_symbol("(%s) ", where);
printk("from [<%08lx>] ", from);
print_symbol("(%s)\n", from);
char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN];
sprint_symbol(sym1, where);
sprint_symbol(sym2, from);
printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2);
#else
printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
#endif
if (in_exception_text(where))
dump_mem("Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs));
dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs));
}
#ifndef CONFIG_ARM_UNWIND
@ -81,9 +81,10 @@ static int verify_stack(unsigned long sp)
/*
* Dump out the contents of some memory nicely...
*/
static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
unsigned long top)
{
unsigned long p = bottom & ~31;
unsigned long first;
mm_segment_t fs;
int i;
@ -95,33 +96,37 @@ static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
fs = get_fs();
set_fs(KERNEL_DS);
printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
printk("%s%s(0x%08lx to 0x%08lx)\n", lvl, str, bottom, top);
for (p = bottom & ~31; p < top;) {
printk("%04lx: ", p & 0xffff);
for (first = bottom & ~31; first < top; first += 32) {
unsigned long p;
char str[sizeof(" 12345678") * 8 + 1];
for (i = 0; i < 8; i++, p += 4) {
unsigned int val;
memset(str, ' ', sizeof(str));
str[sizeof(str) - 1] = '\0';
if (p < bottom || p >= top)
printk(" ");
else {
__get_user(val, (unsigned long *)p);
printk("%08x ", val);
for (p = first, i = 0; i < 8 && p < top; i++, p += 4) {
if (p >= bottom && p < top) {
unsigned long val;
if (__get_user(val, (unsigned long *)p) == 0)
sprintf(str + i * 9, " %08lx", val);
else
sprintf(str + i * 9, " ????????");
}
}
printk ("\n");
printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
}
set_fs(fs);
}
static void dump_instr(struct pt_regs *regs)
static void dump_instr(const char *lvl, struct pt_regs *regs)
{
unsigned long addr = instruction_pointer(regs);
const int thumb = thumb_mode(regs);
const int width = thumb ? 4 : 8;
mm_segment_t fs;
char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
int i;
/*
@ -132,7 +137,6 @@ static void dump_instr(struct pt_regs *regs)
fs = get_fs();
set_fs(KERNEL_DS);
printk("Code: ");
for (i = -4; i < 1; i++) {
unsigned int val, bad;
@ -142,13 +146,14 @@ static void dump_instr(struct pt_regs *regs)
bad = __get_user(val, &((u32 *)addr)[i]);
if (!bad)
printk(i == 0 ? "(%0*x) " : "%0*x ", width, val);
p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ",
width, val);
else {
printk("bad PC value.");
p += sprintf(p, "bad PC value");
break;
}
}
printk("\n");
printk("%sCode: %s\n", lvl, str);
set_fs(fs);
}
@ -224,18 +229,19 @@ static void __die(const char *str, int err, struct thread_info *thread, struct p
struct task_struct *tsk = thread->task;
static int die_counter;
printk("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
str, err, ++die_counter);
sysfs_printk_last_file();
print_modules();
__show_regs(regs);
printk("Process %s (pid: %d, stack limit = 0x%p)\n",
tsk->comm, task_pid_nr(tsk), thread + 1);
printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n",
TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1);
if (!user_mode(regs) || in_interrupt()) {
dump_mem("Stack: ", regs->ARM_sp,
dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp,
THREAD_SIZE + (unsigned long)task_stack_page(tsk));
dump_backtrace(regs, tsk);
dump_instr(regs);
dump_instr(KERN_EMERG, regs);
}
}
@ -250,13 +256,14 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
oops_enter();
console_verbose();
spin_lock_irq(&die_lock);
console_verbose();
bust_spinlocks(1);
__die(str, err, thread, regs);
bust_spinlocks(0);
add_taint(TAINT_DIE);
spin_unlock_irq(&die_lock);
oops_exit();
if (in_interrupt())
panic("Fatal exception in interrupt");
@ -264,7 +271,6 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
if (panic_on_oops)
panic("Fatal exception");
oops_exit();
do_exit(SIGSEGV);
}
@ -349,7 +355,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
if (user_debug & UDBG_UNDEFINED) {
printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
current->comm, task_pid_nr(current), pc);
dump_instr(regs);
dump_instr(KERN_INFO, regs);
}
#endif
@ -400,7 +406,7 @@ static int bad_syscall(int n, struct pt_regs *regs)
if (user_debug & UDBG_SYSCALL) {
printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n",
task_pid_nr(current), current->comm, n);
dump_instr(regs);
dump_instr(KERN_ERR, regs);
}
#endif
@ -579,7 +585,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
if (user_debug & UDBG_SYSCALL) {
printk("[%d] %s: arm syscall %d\n",
task_pid_nr(current), current->comm, no);
dump_instr(regs);
dump_instr("", regs);
if (user_mode(regs)) {
__show_regs(regs);
c_backtrace(regs->ARM_fp, processor_mode(regs));
@ -656,7 +662,7 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs)
if (user_debug & UDBG_BADABORT) {
printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n",
task_pid_nr(current), current->comm, code, instr);
dump_instr(regs);
dump_instr(KERN_ERR, regs);
show_pte(current->mm, addr);
}
#endif

2
arch/arm/mach-at91/at91sam9g45_devices.c
View file

@ -838,7 +838,7 @@ static void __init at91_add_device_rtt(void)
* Watchdog
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
static struct platform_device at91sam9g45_wdt_device = {
.name = "at91_wdt",
.id = -1,

4
arch/arm/mach-bcmring/core.c
View file

@ -271,12 +271,12 @@ static struct irqaction bcmring_timer_irq = {
.handler = bcmring_timer_interrupt,
};
static cycle_t bcmring_get_cycles_timer1(void)
static cycle_t bcmring_get_cycles_timer1(struct clocksource *cs)
{
return ~readl(TIMER1_VA_BASE + TIMER_VALUE);
}
static cycle_t bcmring_get_cycles_timer3(void)
static cycle_t bcmring_get_cycles_timer3(struct clocksource *cs)
{
return ~readl(TIMER3_VA_BASE + TIMER_VALUE);
}

2
arch/arm/mach-bcmring/include/mach/system.h
View file

@ -29,7 +29,7 @@ static inline void arch_idle(void)
cpu_do_idle();
}
static inline void arch_reset(char mode, char *cmd)
static inline void arch_reset(char mode, const char *cmd)
{
printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);

44
arch/arm/mach-ep93xx/Kconfig
View file

@ -17,13 +17,31 @@ config EP93XX_SDCE3_SYNC_PHYS_OFFSET
bool "0x00000000 - SDCE3/SyncBoot"
help
Select this option if you want support for EP93xx boards with the
first SDRAM bank at 0x00000000
first SDRAM bank at 0x00000000.
config EP93XX_SDCE0_PHYS_OFFSET
bool "0xc0000000 - SDCEO"
help
Select this option if you want support for EP93xx boards with the
first SDRAM bank at 0xc0000000
first SDRAM bank at 0xc0000000.
config EP93XX_SDCE1_PHYS_OFFSET
bool "0xd0000000 - SDCE1"
help
Select this option if you want support for EP93xx boards with the
first SDRAM bank at 0xd0000000.
config EP93XX_SDCE2_PHYS_OFFSET
bool "0xe0000000 - SDCE2"
help
Select this option if you want support for EP93xx boards with the
first SDRAM bank at 0xe0000000.
config EP93XX_SDCE3_ASYNC_PHYS_OFFSET
bool "0xf0000000 - SDCE3/AsyncBoot"
help
Select this option if you want support for EP93xx boards with the
first SDRAM bank at 0xf0000000.
endchoice
@ -112,28 +130,36 @@ config MACH_MICRO9
bool
config MACH_MICRO9H
bool "Support Contec Hypercontrol Micro9-H"
bool "Support Contec Micro9-High"
depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
select MACH_MICRO9
help
Say 'Y' here if you want your kernel to support the
Contec Hypercontrol Micro9-H board.
Contec Micro9-High board.
config MACH_MICRO9M
bool "Support Contec Hypercontrol Micro9-M"
depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
bool "Support Contec Micro9-Mid"
depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET
select MACH_MICRO9
help
Say 'Y' here if you want your kernel to support the
Contec Hypercontrol Micro9-M board.
Contec Micro9-Mid board.
config MACH_MICRO9L
bool "Support Contec Hypercontrol Micro9-L"
bool "Support Contec Micro9-Lite"
depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
select MACH_MICRO9
help
Say 'Y' here if you want your kernel to support the
Contec Hypercontrol Micro9-L board.
Contec Micro9-Lite board.
config MACH_MICRO9S
bool "Support Contec Micro9-Slim"
depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET
select MACH_MICRO9
help
Say 'Y' here if you want your kernel to support the
Contec Micro9-Slim board.
config MACH_TS72XX
bool "Support Technologic Systems TS-72xx SBC"

9
arch/arm/mach-ep93xx/Makefile.boot
View file

@ -3,3 +3,12 @@ params_phys-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) := 0x00000100
zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0008000
params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100
zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0008000
params_phys-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0000100
zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0008000
params_phys-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0000100
zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0008000
params_phys-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0000100

166
arch/arm/mach-ep93xx/clock.c
View file

@ -16,13 +16,16 @@
#include <linux/module.h>
#include <linux/string.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <mach/hardware.h>
#include <asm/clkdev.h>
#include <asm/div64.h>
#include <mach/hardware.h>
struct clk {
struct clk *parent;
unsigned long rate;
int users;
int sw_locked;
@ -39,40 +42,60 @@ static unsigned long get_uart_rate(struct clk *clk);
static int set_keytchclk_rate(struct clk *clk, unsigned long rate);
static int set_div_rate(struct clk *clk, unsigned long rate);
static struct clk clk_xtali = {
.rate = EP93XX_EXT_CLK_RATE,
};
static struct clk clk_uart1 = {
.parent = &clk_xtali,
.sw_locked = 1,
.enable_reg = EP93XX_SYSCON_DEVCFG,
.enable_mask = EP93XX_SYSCON_DEVCFG_U1EN,
.get_rate = get_uart_rate,
};
static struct clk clk_uart2 = {
.parent = &clk_xtali,
.sw_locked = 1,
.enable_reg = EP93XX_SYSCON_DEVCFG,
.enable_mask = EP93XX_SYSCON_DEVCFG_U2EN,
.get_rate = get_uart_rate,
};
static struct clk clk_uart3 = {
.parent = &clk_xtali,
.sw_locked = 1,
.enable_reg = EP93XX_SYSCON_DEVCFG,
.enable_mask = EP93XX_SYSCON_DEVCFG_U3EN,
.get_rate = get_uart_rate,
};
static struct clk clk_pll1;
static struct clk clk_f;
static struct clk clk_h;
static struct clk clk_p;
static struct clk clk_pll2;
static struct clk clk_pll1 = {
.parent = &clk_xtali,
};
static struct clk clk_f = {
.parent = &clk_pll1,
};
static struct clk clk_h = {
.parent = &clk_pll1,
};
static struct clk clk_p = {
.parent = &clk_pll1,
};
static struct clk clk_pll2 = {
.parent = &clk_xtali,
};
static struct clk clk_usb_host = {
.parent = &clk_pll2,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN,
};
static struct clk clk_keypad = {
.parent = &clk_xtali,
.sw_locked = 1,
.enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV,
.enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN,
.set_rate = set_keytchclk_rate,
};
static struct clk clk_pwm = {
.parent = &clk_xtali,
.rate = EP93XX_EXT_CLK_RATE,
};
@ -85,50 +108,62 @@ static struct clk clk_video = {
/* DMA Clocks */
static struct clk clk_m2p0 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P0,
};
static struct clk clk_m2p1 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P1,
};
static struct clk clk_m2p2 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P2,
};
static struct clk clk_m2p3 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P3,
};
static struct clk clk_m2p4 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P4,
};
static struct clk clk_m2p5 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P5,
};
static struct clk clk_m2p6 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P6,
};
static struct clk clk_m2p7 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P7,
};
static struct clk clk_m2p8 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P8,
};
static struct clk clk_m2p9 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P9,
};
static struct clk clk_m2m0 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M0,
};
static struct clk clk_m2m1 = {
.parent = &clk_h,
.enable_reg = EP93XX_SYSCON_PWRCNT,
.enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1,
};
@ -137,6 +172,7 @@ static struct clk clk_m2m1 = {
{ .dev_id = dev, .con_id = con, .clk = ck }
static struct clk_lookup clocks[] = {
INIT_CK(NULL, "xtali", &clk_xtali),
INIT_CK("apb:uart1", NULL, &clk_uart1),
INIT_CK("apb:uart2", NULL, &clk_uart2),
INIT_CK("apb:uart3", NULL, &clk_uart3),
@ -163,48 +199,84 @@ static struct clk_lookup clocks[] = {
INIT_CK(NULL, "m2m1", &clk_m2m1),
};
static DEFINE_SPINLOCK(clk_lock);
static void __clk_enable(struct clk *clk)
{
if (!clk->users++) {
if (clk->parent)
__clk_enable(clk->parent);
if (clk->enable_reg) {
u32 v;
v = __raw_readl(clk->enable_reg);
v |= clk->enable_mask;
if (clk->sw_locked)
ep93xx_syscon_swlocked_write(v, clk->enable_reg);
else
__raw_writel(v, clk->enable_reg);
}
}
}
int clk_enable(struct clk *clk)
{
if (!clk->users++ && clk->enable_reg) {
u32 value;
unsigned long flags;
value = __raw_readl(clk->enable_reg);
value |= clk->enable_mask;
if (clk->sw_locked)
ep93xx_syscon_swlocked_write(value, clk->enable_reg);
else
__raw_writel(value, clk->enable_reg);
}
if (!clk)
return -EINVAL;
spin_lock_irqsave(&clk_lock, flags);
__clk_enable(clk);
spin_unlock_irqrestore(&clk_lock, flags);
return 0;
}
EXPORT_SYMBOL(clk_enable);
static void __clk_disable(struct clk *clk)
{
if (!--clk->users) {
if (clk->enable_reg) {
u32 v;
v = __raw_readl(clk->enable_reg);
v &= ~clk->enable_mask;
if (clk->sw_locked)
ep93xx_syscon_swlocked_write(v, clk->enable_reg);
else
__raw_writel(v, clk->enable_reg);
}
if (clk->parent)
__clk_disable(clk->parent);
}
}
void clk_disable(struct clk *clk)
{
if (!--clk->users && clk->enable_reg) {
u32 value;
unsigned long flags;
value = __raw_readl(clk->enable_reg);
value &= ~clk->enable_mask;
if (clk->sw_locked)
ep93xx_syscon_swlocked_write(value, clk->enable_reg);
else
__raw_writel(value, clk->enable_reg);
}
if (!clk)
return;
spin_lock_irqsave(&clk_lock, flags);
__clk_disable(clk);
spin_unlock_irqrestore(&clk_lock, flags);
}
EXPORT_SYMBOL(clk_disable);
static unsigned long get_uart_rate(struct clk *clk)
{
unsigned long rate = clk_get_rate(clk->parent);
u32 value;
value = __raw_readl(EP93XX_SYSCON_PWRCNT);
if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD)
return EP93XX_EXT_CLK_RATE;
return rate;
else
return EP93XX_EXT_CLK_RATE / 2;
return rate / 2;
}
unsigned long clk_get_rate(struct clk *clk)
@ -244,16 +316,16 @@ static int set_keytchclk_rate(struct clk *clk, unsigned long rate)
return 0;
}
static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel,
int *pdiv, int *div)
static int calc_clk_div(struct clk *clk, unsigned long rate,
int *psel, int *esel, int *pdiv, int *div)
{
unsigned long max_rate, best_rate = 0,
actual_rate = 0, mclk_rate = 0, rate_err = -1;
struct clk *mclk;
unsigned long max_rate, actual_rate, mclk_rate, rate_err = -1;
int i, found = 0, __div = 0, __pdiv = 0;
/* Don't exceed the maximum rate */
max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4),
(unsigned long)EP93XX_EXT_CLK_RATE / 4);
clk_xtali.rate / 4);
rate = min(rate, max_rate);
/*
@ -267,11 +339,12 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel,
*/
for (i = 0; i < 3; i++) {
if (i == 0)
mclk_rate = EP93XX_EXT_CLK_RATE * 2;
mclk = &clk_xtali;
else if (i == 1)
mclk_rate = clk_pll1.rate * 2;
else if (i == 2)
mclk_rate = clk_pll2.rate * 2;
mclk = &clk_pll1;
else
mclk = &clk_pll2;
mclk_rate = mclk->rate * 2;
/* Try each predivider value */
for (__pdiv = 4; __pdiv <= 6; __pdiv++) {
@ -286,7 +359,8 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel,
*div = __div;
*psel = (i == 2);
*esel = (i != 0);
best_rate = actual_rate;
clk->parent = mclk;
clk->rate = actual_rate;
rate_err = abs(actual_rate - rate);
found = 1;
}
@ -294,21 +368,19 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel,
}
if (!found)
return 0;
return -EINVAL;
return best_rate;
return 0;
}
static int set_div_rate(struct clk *clk, unsigned long rate)
{
unsigned long actual_rate;
int psel = 0, esel = 0, pdiv = 0, div = 0;
int err, psel = 0, esel = 0, pdiv = 0, div = 0;
u32 val;
actual_rate = calc_clk_div(rate, &psel, &esel, &pdiv, &div);
if (actual_rate == 0)
return -EINVAL;
clk->rate = actual_rate;
err = calc_clk_div(clk, rate, &psel, &esel, &pdiv, &div);
if (err)
return err;
/* Clear the esel, psel, pdiv and div bits */
val = __raw_readl(clk->enable_reg);
@ -344,7 +416,7 @@ static unsigned long calc_pll_rate(u32 config_word)
unsigned long long rate;
int i;
rate = EP93XX_EXT_CLK_RATE;
rate = clk_xtali.rate;
rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */
rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */
do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */
@ -377,7 +449,7 @@ static int __init ep93xx_clock_init(void)
value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
if (!(value & 0x00800000)) { /* PLL1 bypassed? */
clk_pll1.rate = EP93XX_EXT_CLK_RATE;
clk_pll1.rate = clk_xtali.rate;
} else {
clk_pll1.rate = calc_pll_rate(value);
}
@ -388,7 +460,7 @@ static int __init ep93xx_clock_init(void)
value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
if (!(value & 0x00080000)) { /* PLL2 bypassed? */
clk_pll2.rate = EP93XX_EXT_CLK_RATE;
clk_pll2.rate = clk_xtali.rate;
} else if (value & 0x00040000) { /* PLL2 enabled? */
clk_pll2.rate = calc_pll_rate(value);
} else {

32
arch/arm/mach-ep93xx/core.c
View file

@ -206,7 +206,6 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
for (i = 0; i < 8; i++) {
if (status & (1 << i)) {
int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i;
desc = irq_desc + gpio_irq;
generic_handle_irq(gpio_irq);
}
}
@ -550,13 +549,11 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
platform_device_register(&ep93xx_eth_device);
}
static struct i2c_gpio_platform_data ep93xx_i2c_data = {
.sda_pin = EP93XX_GPIO_LINE_EEDAT,
.sda_is_open_drain = 0,
.scl_pin = EP93XX_GPIO_LINE_EECLK,
.scl_is_open_drain = 0,
.udelay = 2,
};
/*************************************************************************
* EP93xx i2c peripheral handling
*************************************************************************/
static struct i2c_gpio_platform_data ep93xx_i2c_data;
static struct platform_device ep93xx_i2c_device = {
.name = "i2c-gpio",
@ -564,8 +561,25 @@ static struct platform_device ep93xx_i2c_device = {
.dev.platform_data = &ep93xx_i2c_data,
};
void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
struct i2c_board_info *devices, int num)
{
/*
* Set the EEPROM interface pin drive type control.
* Defines the driver type for the EECLK and EEDAT pins as either
* open drain, which will require an external pull-up, or a normal
* CMOS driver.
*/
if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
pr_warning("ep93xx: sda != EEDAT, open drain has no effect\n");
if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
pr_warning("ep93xx: scl != EECLK, open drain has no effect\n");
__raw_writel((data->sda_is_open_drain << 1) |
(data->scl_is_open_drain << 0),
EP93XX_GPIO_EEDRIVE);
ep93xx_i2c_data = *data;
i2c_register_board_info(0, devices, num);
platform_device_register(&ep93xx_i2c_device);
}

31
arch/arm/mach-ep93xx/edb93xx.c
View file

@ -27,8 +27,10 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/mtd/physmap.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/i2c-gpio.h>
#include <mach/hardware.h>
@ -76,13 +78,26 @@ static struct ep93xx_eth_data edb93xx_eth_data = {
.phy_id = 1,
};
static struct i2c_board_info __initdata edb93xxa_i2c_data[] = {
/*************************************************************************
* EDB93xx i2c peripheral handling
*************************************************************************/
static struct i2c_gpio_platform_data edb93xx_i2c_gpio_data = {
.sda_pin = EP93XX_GPIO_LINE_EEDAT,
.sda_is_open_drain = 0,
.scl_pin = EP93XX_GPIO_LINE_EECLK,
.scl_is_open_drain = 0,
.udelay = 0, /* default to 100 kHz */
.timeout = 0, /* default to 100 ms */
};
static struct i2c_board_info __initdata edb93xxa_i2c_board_info[] = {
{
I2C_BOARD_INFO("isl1208", 0x6f),
},
};
static struct i2c_board_info __initdata edb93xx_i2c_data[] = {
static struct i2c_board_info __initdata edb93xx_i2c_board_info[] = {
{
I2C_BOARD_INFO("ds1337", 0x68),
},
@ -92,12 +107,14 @@ static void __init edb93xx_register_i2c(void)
{
if (machine_is_edb9302a() || machine_is_edb9307a() ||
machine_is_edb9315a()) {
ep93xx_register_i2c(edb93xxa_i2c_data,
ARRAY_SIZE(edb93xxa_i2c_data));
ep93xx_register_i2c(&edb93xx_i2c_gpio_data,
edb93xxa_i2c_board_info,
ARRAY_SIZE(edb93xxa_i2c_board_info));
} else if (machine_is_edb9307() || machine_is_edb9312() ||
machine_is_edb9315()) {
ep93xx_register_i2c(edb93xx_i2c_data,
ARRAY_SIZE(edb93xx_i2c_data));
ep93xx_register_i2c(&edb93xx_i2c_gpio_data,
edb93xx_i2c_board_info,
ARRAY_SIZE(edb93xx_i2c_board_info));
}
}

42
arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
View file

@ -52,25 +52,27 @@
#define EP93XX_AHB_VIRT_BASE 0xfef00000
#define EP93XX_AHB_SIZE 0x00100000
#define EP93XX_AHB_PHYS(x) (EP93XX_AHB_PHYS_BASE + (x))
#define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x))
#define EP93XX_APB_PHYS_BASE 0x80800000
#define EP93XX_APB_VIRT_BASE 0xfed00000
#define EP93XX_APB_SIZE 0x00200000
#define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x))
#define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x))
/* AHB peripherals */
#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000)
#define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000)
#define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000)
#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000)
#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000)
#define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000)
#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000)
#define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000)
#define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000)
#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000)
#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000)
@ -112,21 +114,10 @@
#define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000)
#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
#define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c)
#define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50)
#define EP93XX_GPIO_F_INT_ACK EP93XX_GPIO_REG(0x54)
#define EP93XX_GPIO_F_INT_ENABLE EP93XX_GPIO_REG(0x58)
#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c)
#define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90)
#define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94)
#define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98)
#define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c)
#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0)
#define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac)
#define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0)
#define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4)
#define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8)
#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
#define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8)
#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
@ -134,13 +125,13 @@
#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000)
#define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000)
#define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000)
#define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000)
#define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000)
#define EP93XX_UART2_PHYS_BASE EP93XX_APB_PHYS(0x000d0000)
#define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000)
#define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000)
#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000)
#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000)
#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
@ -148,10 +139,10 @@
#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000)
#define EP93XX_PWM_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00110000)
#define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000)
#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000)
#define EP93XX_RTC_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00120000)
#define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000)
#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000)
#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000)
@ -218,6 +209,17 @@
#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15)
#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c)
#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000)
#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28)
#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8)
#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7)
#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6)
#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5)
#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4)
#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3)
#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1)
#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)

14
arch/arm/mach-ep93xx/include/mach/gpio.h
View file

@ -114,17 +114,9 @@ extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable);
* B0..B7 (7..15) to irq 72..79, and
* F0..F7 (16..24) to irq 80..87.
*/
static inline int gpio_to_irq(unsigned gpio)
{
if (gpio <= EP93XX_GPIO_LINE_MAX_IRQ)
return 64 + gpio;
#define gpio_to_irq(gpio) \
(((gpio) <= EP93XX_GPIO_LINE_MAX_IRQ) ? (64 + (gpio)) : -EINVAL)
return -EINVAL;
}
static inline int irq_to_gpio(unsigned irq)
{
return irq - gpio_to_irq(0);
}
#define irq_to_gpio(irq) ((irq) - gpio_to_irq(0))
#endif

6
arch/arm/mach-ep93xx/include/mach/memory.h
View file

@ -9,6 +9,12 @@
#define PHYS_OFFSET UL(0x00000000)
#elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xc0000000)
#elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xd0000000)
#elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xe0000000)
#elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xf0000000)
#else
#error "Kconfig bug: No EP93xx PHYS_OFFSET set"
#endif

5
arch/arm/mach-ep93xx/include/mach/platform.h
View file

@ -4,6 +4,7 @@
#ifndef __ASSEMBLY__
struct i2c_gpio_platform_data;
struct i2c_board_info;
struct platform_device;
struct ep93xxfb_mach_info;
@ -16,7 +17,6 @@ struct ep93xx_eth_data
void ep93xx_map_io(void);
void ep93xx_init_irq(void);
void ep93xx_init_time(unsigned long);
/* EP93xx System Controller software locked register write */
void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
@ -33,7 +33,8 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
}
void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
void ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
struct i2c_board_info *devices, int num);
void ep93xx_register_fb(struct ep93xxfb_mach_info *data);
void ep93xx_register_pwm(int pwm0, int pwm1);
int ep93xx_pwm_acquire_gpio(struct platform_device *pdev);

130
arch/arm/mach-ep93xx/micro9.c
View file

@ -2,7 +2,9 @@
* linux/arch/arm/mach-ep93xx/micro9.c
*
* Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH
* Manfred Gruber <manfred.gruber@contec.at>
* Manfred Gruber <m.gruber@tirol.com>
* Copyright (C) 2009 Contec Steuerungstechnik & Automation GmbH
* Hubert Feurstein <hubert.feurstein@contec.at>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@ -20,104 +22,124 @@
#include <asm/mach/arch.h>
static struct ep93xx_eth_data micro9_eth_data = {
.phy_id = 0x1f,
};
/*************************************************************************
* Micro9 NOR Flash
*
* Micro9-High has up to 64MB of 32-bit flash on CS1
* Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
* Micro9-Lite uses a seperate MTD map driver for flash support
* Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
*************************************************************************/
static struct physmap_flash_data micro9_flash_data;
static void __init micro9_init(void)
{
ep93xx_register_eth(&micro9_eth_data, 1);
}
/*
* Micro9-H
*/
#ifdef CONFIG_MACH_MICRO9H
static struct physmap_flash_data micro9h_flash_data = {
.width = 4,
};
static struct resource micro9h_flash_resource = {
static struct resource micro9_flash_resource = {
.start = EP93XX_CS1_PHYS_BASE,
.end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device micro9h_flash = {
static struct platform_device micro9_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &micro9h_flash_data,
.platform_data = &micro9_flash_data,
},
.num_resources = 1,
.resource = &micro9h_flash_resource,
.resource = &micro9_flash_resource,
};
static void __init micro9h_init(void)
static void __init __micro9_register_flash(unsigned int width)
{
platform_device_register(&micro9h_flash);
micro9_flash_data.width = width;
platform_device_register(&micro9_flash);
}
static void __init micro9h_init_machine(void)
static unsigned int __init micro9_detect_bootwidth(void)
{
u32 v;
/* Detect the bus width of the external flash memory */
v = __raw_readl(EP93XX_SYSCON_SYSCFG);
if (v & EP93XX_SYSCON_SYSCFG_LCSN7)
return 4; /* 32-bit */
else
return 2; /* 16-bit */
}
static void __init micro9_register_flash(void)
{
if (machine_is_micro9())
__micro9_register_flash(4);
else if (machine_is_micro9m() || machine_is_micro9s())
__micro9_register_flash(micro9_detect_bootwidth());
}
/*************************************************************************
* Micro9 Ethernet
*************************************************************************/
static struct ep93xx_eth_data micro9_eth_data = {
.phy_id = 0x1f,
};
static void __init micro9_init_machine(void)
{
ep93xx_init_devices();
micro9_init();
micro9h_init();
ep93xx_register_eth(&micro9_eth_data, 1);
micro9_register_flash();
}
MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H")
/* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
#ifdef CONFIG_MACH_MICRO9H
MACHINE_START(MICRO9, "Contec Micro9-High")
/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
.phys_io = EP93XX_APB_PHYS_BASE,
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
.timer = &ep93xx_timer,
.init_machine = micro9h_init_machine,
.init_machine = micro9_init_machine,
MACHINE_END
#endif
/*
* Micro9-M
*/
#ifdef CONFIG_MACH_MICRO9M
static void __init micro9m_init_machine(void)
{
ep93xx_init_devices();
micro9_init();
}
MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M")
/* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
MACHINE_START(MICRO9M, "Contec Micro9-Mid")
/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
.phys_io = EP93XX_APB_PHYS_BASE,
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
.timer = &ep93xx_timer,
.init_machine = micro9m_init_machine,
.init_machine = micro9_init_machine,
MACHINE_END
#endif
/*
* Micro9-L
*/
#ifdef CONFIG_MACH_MICRO9L
static void __init micro9l_init_machine(void)
{
ep93xx_init_devices();
micro9_init();
}
MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L")
/* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
MACHINE_START(MICRO9L, "Contec Micro9-Lite")
/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
.phys_io = EP93XX_APB_PHYS_BASE,
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
.timer = &ep93xx_timer,
.init_machine = micro9l_init_machine,
.init_machine = micro9_init_machine,
MACHINE_END
#endif
#ifdef CONFIG_MACH_MICRO9S
MACHINE_START(MICRO9S, "Contec Micro9-Slim")
/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
.phys_io = EP93XX_APB_PHYS_BASE,
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
.timer = &ep93xx_timer,
.init_machine = micro9_init_machine,
MACHINE_END
#endif

1
arch/arm/mach-integrator/pci_v3.c
View file

@ -31,6 +31,7 @@
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/signal.h>
#include <asm/system.h>
#include <asm/mach/pci.h>
#include <asm/irq_regs.h>

8
arch/arm/mach-mx2/clock_imx27.c
View file

@ -638,9 +638,9 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)
_REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)
_REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk)
_REGISTER_CLOCK(NULL, "cspi1", cspi1_clk)
_REGISTER_CLOCK(NULL, "cspi2", cspi2_clk)
_REGISTER_CLOCK(NULL, "cspi3", cspi3_clk)
_REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk)
_REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk)
_REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk)
_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
_REGISTER_CLOCK(NULL, "csi", csi_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk)
@ -665,7 +665,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "sahara2", sahara2_clk)
_REGISTER_CLOCK(NULL, "ata", ata_clk)
_REGISTER_CLOCK(NULL, "mstick", mstick_clk)
_REGISTER_CLOCK(NULL, "wdog", wdog_clk)
_REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
_REGISTER_CLOCK(NULL, "gpio", gpio_clk)
_REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
_REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)

96
arch/arm/mach-mx2/pcm038.c
View file

@ -23,6 +23,10 @@
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/irq.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -35,6 +39,7 @@
#include <mach/iomux.h>
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
#include <mach/spi.h>
#include "devices.h"
@ -78,8 +83,6 @@ static int pcm038_pins[] = {
PC6_PF_I2C2_SCL,
/* SPI1 */
PD25_PF_CSPI1_RDY,
PD27_PF_CSPI1_SS1,
PD28_PF_CSPI1_SS0,
PD29_PF_CSPI1_SCLK,
PD30_PF_CSPI1_MISO,
PD31_PF_CSPI1_MOSI,
@ -196,6 +199,86 @@ static struct i2c_board_info pcm038_i2c_devices[] = {
}
};
static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
static struct spi_imx_master pcm038_spi_0_data = {
.chipselect = pcm038_spi_cs,
.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
};
static struct regulator_consumer_supply sdhc1_consumers[] = {
{
.dev = &mxc_sdhc_device1.dev,
.supply = "sdhc_vcc",
},
};
static struct regulator_init_data sdhc1_data = {
.constraints = {
.min_uV = 3000000,
.max_uV = 3400000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
.valid_modes_mask = REGULATOR_MODE_NORMAL |
REGULATOR_MODE_FAST,
.always_on = 0,
.boot_on = 0,
},
.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
.consumer_supplies = sdhc1_consumers,
};
static struct regulator_consumer_supply cam_consumers[] = {
{
.dev = NULL,
.supply = "imx_cam_vcc",
},
};
static struct regulator_init_data cam_data = {
.constraints = {
.min_uV = 3000000,
.max_uV = 3400000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
.valid_modes_mask = REGULATOR_MODE_NORMAL |
REGULATOR_MODE_FAST,
.always_on = 0,
.boot_on = 0,
},
.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
.consumer_supplies = cam_consumers,
};
struct mc13783_regulator_init_data pcm038_regulators[] = {
{
.id = MC13783_REGU_VCAM,
.init_data = &cam_data,
}, {
.id = MC13783_REGU_VMMC1,
.init_data = &sdhc1_data,
},
};
static struct mc13783_platform_data pcm038_pmic = {
.regulators = pcm038_regulators,
.num_regulators = ARRAY_SIZE(pcm038_regulators),
.flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
MC13783_USE_TOUCHSCREEN,
};
static struct spi_board_info pcm038_spi_board_info[] __initdata = {
{
.modalias = "mc13783",
.irq = IRQ_GPIOB(23),
.max_speed_hz = 300000,
.bus_num = 0,
.chip_select = 0,
.platform_data = &pcm038_pmic,
.mode = SPI_CS_HIGH,
}
};
static void __init pcm038_init(void)
{
mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
@ -219,6 +302,15 @@ static void __init pcm038_init(void)
/* PE18 for user-LED D40 */
mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
/* MC13783 IRQ */
mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);
mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data);
spi_register_board_info(pcm038_spi_board_info,
ARRAY_SIZE(pcm038_spi_board_info));
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
#ifdef CONFIG_MACH_PCM970_BASEBOARD

2
arch/arm/mach-mx2/pcm970-baseboard.c
View file

@ -39,7 +39,6 @@ static int pcm970_pins[] = {
PB7_PF_SD2_D3,
PB8_PF_SD2_CMD,
PB9_PF_SD2_CLK,
GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN, /* card detect */
/* display */
PA5_PF_LSCLK,
PA6_PF_LD0,
@ -228,6 +227,7 @@ void __init pcm970_baseboard_init(void)
"PCM970");
mxc_register_device(&mxc_fb_device, &pcm038_fb_data);
mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN);
mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
platform_device_register(&pcm970_sja1000);
}

19
arch/arm/mach-mx25/devices.c
View file

@ -1,4 +1,23 @@
/*
* Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*/
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/gpio.h>
#include <mach/mx25.h>
#include <mach/irqs.h>

25
arch/arm/mach-mx25/mx25pdk.c
View file

@ -1,3 +1,21 @@
/*
* Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/clk.h>
@ -23,19 +41,12 @@ static struct imxuart_platform_data uart_pdata = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct mxc_nand_platform_data nand_board_info = {
.width = 1,
.hw_ecc = 1,
};
static void __init mx25pdk_init(void)
{
mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_register_device(&mxc_usbh2, NULL);
mxc_register_device(&mxc_nand_device, &nand_board_info);
}
static void __init mx25pdk_timer_init(void)
{
mx25_clocks_init(26000000);

2
arch/arm/mach-mx3/clock-imx35.c
View file

@ -443,7 +443,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
_REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
_REGISTER_CLOCK("mxc_wdt.0", NULL, wdog_clk)
_REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
_REGISTER_CLOCK(NULL, "max", max_clk)
_REGISTER_CLOCK(NULL, "admux", admux_clk)
_REGISTER_CLOCK(NULL, "csi", csi_clk)

2
arch/arm/mach-mx3/clock.c
View file

@ -530,7 +530,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk)
_REGISTER_CLOCK(NULL, "gpt", gpt_clk)
_REGISTER_CLOCK(NULL, "pwm", pwm_clk)
_REGISTER_CLOCK(NULL, "wdog", wdog_clk)
_REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
_REGISTER_CLOCK(NULL, "rtc", rtc_clk)
_REGISTER_CLOCK(NULL, "epit", epit1_clk)
_REGISTER_CLOCK(NULL, "epit", epit2_clk)

24
arch/arm/mach-mx3/devices.c
View file

@ -459,7 +459,7 @@ struct platform_device mxc_usbh2 = {
* SPI master controller
* 3 channels
*/
static struct resource imx_spi_0_resources[] = {
static struct resource mxc_spi_0_resources[] = {
{
.start = CSPI1_BASE_ADDR,
.end = CSPI1_BASE_ADDR + SZ_4K - 1,
@ -471,7 +471,7 @@ static struct resource imx_spi_0_resources[] = {
},
};
static struct resource imx_spi_1_resources[] = {
static struct resource mxc_spi_1_resources[] = {
{
.start = CSPI2_BASE_ADDR,
.end = CSPI2_BASE_ADDR + SZ_4K - 1,
@ -483,7 +483,7 @@ static struct resource imx_spi_1_resources[] = {
},
};
static struct resource imx_spi_2_resources[] = {
static struct resource mxc_spi_2_resources[] = {
{
.start = CSPI3_BASE_ADDR,
.end = CSPI3_BASE_ADDR + SZ_4K - 1,
@ -495,25 +495,25 @@ static struct resource imx_spi_2_resources[] = {
},
};
struct platform_device imx_spi_device0 = {
struct platform_device mxc_spi_device0 = {
.name = "spi_imx",
.id = 0,
.num_resources = ARRAY_SIZE(imx_spi_0_resources),
.resource = imx_spi_0_resources,
.num_resources = ARRAY_SIZE(mxc_spi_0_resources),
.resource = mxc_spi_0_resources,
};
struct platform_device imx_spi_device1 = {
struct platform_device mxc_spi_device1 = {
.name = "spi_imx",
.id = 1,
.num_resources = ARRAY_SIZE(imx_spi_1_resources),
.resource = imx_spi_1_resources,
.num_resources = ARRAY_SIZE(mxc_spi_1_resources),
.resource = mxc_spi_1_resources,
};
struct platform_device imx_spi_device2 = {
struct platform_device mxc_spi_device2 = {
.name = "spi_imx",
.id = 2,
.num_resources = ARRAY_SIZE(imx_spi_2_resources),
.resource = imx_spi_2_resources,
.num_resources = ARRAY_SIZE(mxc_spi_2_resources),
.resource = mxc_spi_2_resources,
};
#ifdef CONFIG_ARCH_MX35

6
arch/arm/mach-mx3/devices.h
View file

@ -20,7 +20,7 @@ extern struct platform_device mxc_otg_host;
extern struct platform_device mxc_usbh1;
extern struct platform_device mxc_usbh2;
extern struct platform_device mxc_rnga_device;
extern struct platform_device imx_spi_device0;
extern struct platform_device imx_spi_device1;
extern struct platform_device imx_spi_device2;
extern struct platform_device mxc_spi_device0;
extern struct platform_device mxc_spi_device1;
extern struct platform_device mxc_spi_device2;

2
arch/arm/mach-mx3/mm.c
View file

@ -81,6 +81,7 @@ void __init mx31_map_io(void)
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
#ifdef CONFIG_ARCH_MX35
void __init mx35_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX35);
@ -89,6 +90,7 @@ void __init mx35_map_io(void)
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
#endif
void __init mx31_init_irq(void)
{

6
arch/arm/mach-omap1/board-ams-delta.c
View file

@ -219,6 +219,10 @@ static struct platform_device *ams_delta_devices[] __initdata = {
static void __init ams_delta_init(void)
{
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
omap_board_config = ams_delta_config;
@ -231,6 +235,8 @@ static void __init ams_delta_init(void)
omap_usb_init(&ams_delta_usb_config);
platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
}
static struct plat_serial8250_port ams_delta_modem_ports[] = {

8
arch/arm/mach-omap1/board-generic.c
View file

@ -64,6 +64,14 @@ static void __init omap_generic_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap15xx()) {
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
omap_usb_init(&generic1510_usb_config);
}
#endif

20
arch/arm/mach-omap1/board-innovator.c
View file

@ -376,6 +376,26 @@ static void __init innovator_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
unsigned char reg;
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM1_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM2_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
spi_register_board_info(innovator1510_boardinfo,
ARRAY_SIZE(innovator1510_boardinfo));

8
arch/arm/mach-omap1/board-palmte.c
View file

@ -342,6 +342,14 @@ static void __init palmte_misc_gpio_setup(void)
static void __init omap_palmte_init(void)
{
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
omap_board_config = palmte_config;
omap_board_config_size = ARRAY_SIZE(palmte_config);

8
arch/arm/mach-omap1/board-palmtt.c
View file

@ -289,6 +289,14 @@ static void __init omap_mpu_wdt_mode(int mode) {
static void __init omap_palmtt_init(void)
{
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
omap_mpu_wdt_mode(0);
omap_board_config = palmtt_config;

8
arch/arm/mach-omap1/board-palmz71.c
View file

@ -307,6 +307,14 @@ palmz71_gpio_setup(int early)
static void __init
omap_palmz71_init(void)
{
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
palmz71_gpio_setup(1);
omap_mpu_wdt_mode(0);

8
arch/arm/mach-omap1/board-sx1.c
View file

@ -377,6 +377,14 @@ static struct omap_board_config_kernel sx1_config[] __initdata = {
static void __init omap_sx1_init(void)
{
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices));
omap_board_config = sx1_config;

8
arch/arm/mach-omap1/board-voiceblue.c
View file

@ -152,6 +152,14 @@ static void __init voiceblue_init_irq(void)
static void __init voiceblue_init(void)
{
/* mux pins for uarts */
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
/* Watchdog */
gpio_request(0, "Watchdog");
/* smc91x reset */

26
arch/arm/mach-omap1/serial.c
View file

@ -131,8 +131,6 @@ void __init omap_serial_init(void)
}
for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
unsigned char reg;
switch (i) {
case 0:
uart1_ck = clk_get(NULL, "uart1_ck");
@ -143,16 +141,6 @@ void __init omap_serial_init(void)
if (cpu_is_omap15xx())
clk_set_rate(uart1_ck, 12000000);
}
if (cpu_is_omap15xx()) {
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
if (machine_is_omap_innovator()) {
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM1_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
}
}
break;
case 1:
uart2_ck = clk_get(NULL, "uart2_ck");
@ -165,16 +153,6 @@ void __init omap_serial_init(void)
else
clk_set_rate(uart2_ck, 48000000);
}
if (cpu_is_omap15xx()) {
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
if (machine_is_omap_innovator()) {
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM2_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
}
}
break;
case 2:
uart3_ck = clk_get(NULL, "uart3_ck");
@ -185,10 +163,6 @@ void __init omap_serial_init(void)
if (cpu_is_omap15xx())
clk_set_rate(uart3_ck, 12000000);
}
if (cpu_is_omap15xx()) {
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
}
break;
}
omap_serial_reset(&serial_platform_data[i]);

12
arch/arm/mach-omap2/Kconfig
View file

@ -73,9 +73,21 @@ config MACH_OMAP_3430SDP
bool "OMAP 3430 SDP board"
depends on ARCH_OMAP3 && ARCH_OMAP34XX
config MACH_NOKIA_N800
bool
config MACH_NOKIA_N810
bool
config MACH_NOKIA_N810_WIMAX
bool
config MACH_NOKIA_N8X0
bool "Nokia N800/N810"
depends on ARCH_OMAP2420
select MACH_NOKIA_N800
select MACH_NOKIA_N810
select MACH_NOKIA_N810_WIMAX
config MACH_NOKIA_RX51
bool "Nokia RX-51 board"

2
arch/arm/mach-omap2/board-3430sdp.c
View file

@ -17,6 +17,7 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/i2c/twl4030.h>
@ -38,7 +39,6 @@
#include <mach/gpmc.h>
#include <mach/control.h>
#include <mach/keypad.h>
#include <mach/gpmc-smc91x.h>
#include "sdram-qimonda-hyb18m512160af-6.h"

4
arch/arm/mach-omap2/board-4430sdp.c
View file

@ -58,6 +58,8 @@ static void __init gic_init_irq(void)
static void __init omap_4430sdp_init_irq(void)
{
omap_board_config = sdp4430_config;
omap_board_config_size = ARRAY_SIZE(sdp4430_config);
omap2_init_common_hw(NULL, NULL);
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(1);
@ -70,8 +72,6 @@ static void __init omap_4430sdp_init_irq(void)
static void __init omap_4430sdp_init(void)
{
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
omap_board_config = sdp4430_config;
omap_board_config_size = ARRAY_SIZE(sdp4430_config);
omap_serial_init();
}

2
arch/arm/mach-omap2/board-ldp.c
View file

@ -16,6 +16,7 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/gpio_keys.h>
#include <linux/workqueue.h>
#include <linux/err.h>
@ -41,7 +42,6 @@
#include <asm/delay.h>
#include <mach/control.h>
#include <mach/usb.h>
#include <mach/keypad.h>
#include "mmc-twl4030.h"

2
arch/arm/mach-omap2/board-omap3evm.c
View file

@ -20,6 +20,7 @@
#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/leds.h>
#include <linux/spi/spi.h>
@ -37,7 +38,6 @@
#include <mach/usb.h>
#include <mach/common.h>
#include <mach/mcspi.h>
#include <mach/keypad.h>
#include "sdram-micron-mt46h32m32lf-6.h"
#include "mmc-twl4030.h"

2
arch/arm/mach-omap2/board-omap3pandora.c
View file

@ -27,6 +27,7 @@
#include <linux/i2c/twl4030.h>
#include <linux/leds.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/gpio_keys.h>
#include <asm/mach-types.h>
@ -39,7 +40,6 @@
#include <mach/hardware.h>
#include <mach/mcspi.h>
#include <mach/usb.h>
#include <mach/keypad.h>
#include <mach/mux.h>
#include "sdram-micron-mt46h32m32lf-6.h"

82
arch/arm/mach-omap2/board-rx51-peripherals.c
View file

@ -12,6 +12,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/i2c.h>
#include <linux/i2c/twl4030.h>
@ -27,7 +28,6 @@
#include <mach/common.h>
#include <mach/dma.h>
#include <mach/gpmc.h>
#include <mach/keypad.h>
#include <mach/onenand.h>
#include <mach/gpmc-smc91x.h>
@ -38,49 +38,49 @@
static int board_keymap[] = {
KEY(0, 0, KEY_Q),
KEY(0, 1, KEY_W),
KEY(0, 2, KEY_E),
KEY(0, 3, KEY_R),
KEY(0, 4, KEY_T),
KEY(0, 5, KEY_Y),
KEY(0, 6, KEY_U),
KEY(0, 7, KEY_I),
KEY(1, 0, KEY_O),
KEY(0, 1, KEY_O),
KEY(0, 2, KEY_P),
KEY(0, 3, KEY_COMMA),
KEY(0, 4, KEY_BACKSPACE),
KEY(0, 6, KEY_A),
KEY(0, 7, KEY_S),
KEY(1, 0, KEY_W),
KEY(1, 1, KEY_D),
KEY(1, 2, KEY_DOT),
KEY(1, 3, KEY_V),
KEY(1, 4, KEY_DOWN),
KEY(2, 0, KEY_P),
KEY(2, 1, KEY_F),
KEY(1, 2, KEY_F),
KEY(1, 3, KEY_G),
KEY(1, 4, KEY_H),
KEY(1, 5, KEY_J),
KEY(1, 6, KEY_K),
KEY(1, 7, KEY_L),
KEY(2, 0, KEY_E),
KEY(2, 1, KEY_DOT),
KEY(2, 2, KEY_UP),
KEY(2, 3, KEY_B),
KEY(2, 4, KEY_RIGHT),
KEY(3, 0, KEY_COMMA),
KEY(3, 1, KEY_G),
KEY(3, 2, KEY_ENTER),
KEY(2, 3, KEY_ENTER),
KEY(2, 5, KEY_Z),
KEY(2, 6, KEY_X),
KEY(2, 7, KEY_C),
KEY(3, 0, KEY_R),
KEY(3, 1, KEY_V),
KEY(3, 2, KEY_B),
KEY(3, 3, KEY_N),
KEY(4, 0, KEY_BACKSPACE),
KEY(4, 1, KEY_H),
KEY(4, 3, KEY_M),
KEY(3, 4, KEY_M),
KEY(3, 5, KEY_SPACE),
KEY(3, 6, KEY_SPACE),
KEY(3, 7, KEY_LEFT),
KEY(4, 0, KEY_T),
KEY(4, 1, KEY_DOWN),
KEY(4, 2, KEY_RIGHT),
KEY(4, 4, KEY_LEFTCTRL),
KEY(5, 1, KEY_J),
KEY(5, 2, KEY_Z),
KEY(5, 3, KEY_SPACE),
KEY(5, 4, KEY_LEFTSHIFT),
KEY(6, 0, KEY_A),
KEY(6, 1, KEY_K),
KEY(6, 2, KEY_X),
KEY(6, 3, KEY_SPACE),
KEY(6, 4, KEY_FN),
KEY(7, 0, KEY_S),
KEY(7, 1, KEY_L),
KEY(7, 2, KEY_C),
KEY(7, 3, KEY_LEFT),
KEY(0xff, 0, KEY_F6),
KEY(0xff, 1, KEY_F7),
KEY(0xff, 2, KEY_F8),
KEY(0xff, 4, KEY_F9),
KEY(0xff, 5, KEY_F10),
KEY(4, 5, KEY_RIGHTALT),
KEY(4, 6, KEY_LEFTSHIFT),
KEY(5, 0, KEY_Y),
KEY(6, 0, KEY_U),
KEY(7, 0, KEY_I),
KEY(7, 1, KEY_F7),
KEY(7, 2, KEY_F8),
KEY(0xff, 2, KEY_F9),
KEY(0xff, 4, KEY_F10),
KEY(0xff, 5, KEY_F11),
};
static struct matrix_keymap_data board_map_data = {
@ -444,7 +444,7 @@ static int __init rx51_i2c_init(void)
rx51_twldata.vaux3 = &rx51_vaux3_cam;
rx51_twldata.vmmc2 = &rx51_vmmc2;
}
omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1,
omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1,
ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
omap_register_i2c_bus(2, 100, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0);

1
arch/arm/mach-omap2/board-rx51.c
View file

@ -26,7 +26,6 @@
#include <mach/mux.h>
#include <mach/board.h>
#include <mach/common.h>
#include <mach/keypad.h>
#include <mach/dma.h>
#include <mach/gpmc.h>
#include <mach/usb.h>

6
arch/arm/mach-omap2/board-zoom2.c
View file

@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/gpio.h>
#include <linux/i2c/twl4030.h>
#include <linux/regulator/machine.h>
@ -22,9 +23,9 @@
#include <mach/common.h>
#include <mach/usb.h>
#include <mach/keypad.h>
#include "mmc-twl4030.h"
#include "sdram-micron-mt46h32m32lf-6.h"
/* Zoom2 has Qwerty keyboard*/
static int board_keymap[] = {
@ -213,7 +214,8 @@ static void __init omap_zoom2_init_irq(void)
{
omap_board_config = zoom2_config;
omap_board_config_size = ARRAY_SIZE(zoom2_config);
omap2_init_common_hw(NULL, NULL);
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
omap_gpio_init();
}

1
arch/arm/mach-omap2/clock24xx.c
View file

@ -769,6 +769,7 @@ int __init omap2_clk_init(void)
if (c->cpu & cpu_mask) {
clkdev_add(&c->lk);
clk_register(c->lk.clk);
omap2_init_clk_clkdm(c->lk.clk);
}
/* Check the MPU rate set by bootloader */

35
arch/arm/mach-omap2/clock34xx.c
View file

@ -338,6 +338,13 @@ static struct omap_clk omap34xx_clks[] = {
*/
#define SDRC_MPURATE_LOOPS 96
/*
* DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks
* that are sourced by DPLL5, and both of these require this clock
* to be at 120 MHz for proper operation.
*/
#define DPLL5_FREQ_FOR_USBHOST 120000000
/**
* omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI
* @clk: struct clk * being enabled
@ -1056,6 +1063,28 @@ void omap2_clk_prepare_for_reboot(void)
#endif
}
static void omap3_clk_lock_dpll5(void)
{
struct clk *dpll5_clk;
struct clk *dpll5_m2_clk;
dpll5_clk = clk_get(NULL, "dpll5_ck");
clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
clk_enable(dpll5_clk);
/* Enable autoidle to allow it to enter low power bypass */
omap3_dpll_allow_idle(dpll5_clk);
/* Program dpll5_m2_clk divider for no division */
dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck");
clk_enable(dpll5_m2_clk);
clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
clk_disable(dpll5_m2_clk);
clk_disable(dpll5_clk);
return;
}
/* REVISIT: Move this init stuff out into clock.c */
/*
@ -1148,6 +1177,12 @@ int __init omap2_clk_init(void)
*/
clk_enable_init_clocks();
/*
* Lock DPLL5 and put it in autoidle.
*/
if (omap_rev() >= OMAP3430_REV_ES2_0)
omap3_clk_lock_dpll5();
/* Avoid sleeping during omap2_clk_prepare_for_reboot() */
/* REVISIT: not yet ready for 343x */
#if 0

74
arch/arm/mach-omap2/clockdomain.c
View file

@ -137,6 +137,36 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
}
}
/*
* _omap2_clkdm_set_hwsup - set the hwsup idle transition bit
* @clkdm: struct clockdomain *
* @enable: int 0 to disable, 1 to enable
*
* Internal helper for actually switching the bit that controls hwsup
* idle transitions for clkdm.
*/
static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
{
u32 v;
if (cpu_is_omap24xx()) {
if (enable)
v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
else
v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
} else if (cpu_is_omap34xx()) {
if (enable)
v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
else
v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
} else {
BUG();
}
cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
v << __ffs(clkdm->clktrctrl_mask),
clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
}
static struct clockdomain *_clkdm_lookup(const char *name)
{
@ -456,8 +486,6 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
*/
void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
{
u32 v;
if (!clkdm)
return;
@ -473,18 +501,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
if (atomic_read(&clkdm->usecount) > 0)
_clkdm_add_autodeps(clkdm);
if (cpu_is_omap24xx())
v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
else if (cpu_is_omap34xx())
v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
else
BUG();
cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
v << __ffs(clkdm->clktrctrl_mask),
clkdm->pwrdm.ptr->prcm_offs,
CM_CLKSTCTRL);
_omap2_clkdm_set_hwsup(clkdm, 1);
pwrdm_clkdm_state_switch(clkdm);
}
@ -500,8 +517,6 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
*/
void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
{
u32 v;
if (!clkdm)
return;
@ -514,16 +529,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
pr_debug("clockdomain: disabling automatic idle transitions for %s\n",
clkdm->name);
if (cpu_is_omap24xx())
v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
else if (cpu_is_omap34xx())
v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
else
BUG();
cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
v << __ffs(clkdm->clktrctrl_mask),
clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
_omap2_clkdm_set_hwsup(clkdm, 0);
if (atomic_read(&clkdm->usecount) > 0)
_clkdm_del_autodeps(clkdm);
@ -569,10 +575,14 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
v = omap2_clkdm_clktrctrl_read(clkdm);
if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO))
(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
/* Disable HW transitions when we are changing deps */
_omap2_clkdm_set_hwsup(clkdm, 0);
_clkdm_add_autodeps(clkdm);
else
_omap2_clkdm_set_hwsup(clkdm, 1);
} else {
omap2_clkdm_wakeup(clkdm);
}
pwrdm_wait_transition(clkdm->pwrdm.ptr);
pwrdm_clkdm_state_switch(clkdm);
@ -623,10 +633,14 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
v = omap2_clkdm_clktrctrl_read(clkdm);
if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO))
(cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
/* Disable HW transitions when we are changing deps */
_omap2_clkdm_set_hwsup(clkdm, 0);
_clkdm_del_autodeps(clkdm);
else
_omap2_clkdm_set_hwsup(clkdm, 1);
} else {
omap2_clkdm_sleep(clkdm);
}
pwrdm_clkdm_state_switch(clkdm);

2
arch/arm/mach-omap2/io.c
View file

@ -302,7 +302,9 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
pwrdm_init(powerdomains_omap);
clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
omap2_clk_init();
#endif
omap_serial_early_init();
#ifndef CONFIG_ARCH_OMAP4
omap_hwmod_late_init();
omap_pm_if_init();
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);

2
arch/arm/mach-omap2/pm-debug.c
View file

@ -551,7 +551,7 @@ static int __init pm_dbg_init(void)
(void) debugfs_create_file("time", S_IRUGO,
d, (void *)DEBUG_FILE_TIMERS, &debug_fops);
pwrdm_for_each(pwrdms_setup, (void *)d);
pwrdm_for_each_nolock(pwrdms_setup, (void *)d);
pm_dbg_dir = debugfs_create_dir("registers", d);
if (IS_ERR(pm_dbg_dir))

192
arch/arm/mach-omap2/pm34xx.c
View file

@ -51,97 +51,112 @@ static void (*_omap_sram_idle)(u32 *addr, int save_state);
static struct powerdomain *mpu_pwrdm;
/* PRCM Interrupt Handler for wakeups */
/*
* PRCM Interrupt Handler Helper Function
*
* The purpose of this function is to clear any wake-up events latched
* in the PRCM PM_WKST_x registers. It is possible that a wake-up event
* may occur whilst attempting to clear a PM_WKST_x register and thus
* set another bit in this register. A while loop is used to ensure
* that any peripheral wake-up events occurring while attempting to
* clear the PM_WKST_x are detected and cleared.
*/
static int prcm_clear_mod_irqs(s16 module, u8 regs)
{
u32 wkst, fclk, iclk, clken;
u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1;
u16 fclk_off = (regs == 3) ? OMAP3430ES2_CM_FCLKEN3 : CM_FCLKEN1;
u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1;
u16 grpsel_off = (regs == 3) ?
OMAP3430ES2_PM_MPUGRPSEL3 : OMAP3430_PM_MPUGRPSEL;
int c = 0;
wkst = prm_read_mod_reg(module, wkst_off);
wkst &= prm_read_mod_reg(module, grpsel_off);
if (wkst) {
iclk = cm_read_mod_reg(module, iclk_off);
fclk = cm_read_mod_reg(module, fclk_off);
while (wkst) {
clken = wkst;
cm_set_mod_reg_bits(clken, module, iclk_off);
/*
* For USBHOST, we don't know whether HOST1 or
* HOST2 woke us up, so enable both f-clocks
*/
if (module == OMAP3430ES2_USBHOST_MOD)
clken |= 1 << OMAP3430ES2_EN_USBHOST2_SHIFT;
cm_set_mod_reg_bits(clken, module, fclk_off);
prm_write_mod_reg(wkst, module, wkst_off);
wkst = prm_read_mod_reg(module, wkst_off);
c++;
}
cm_write_mod_reg(iclk, module, iclk_off);
cm_write_mod_reg(fclk, module, fclk_off);
}
return c;
}
static int _prcm_int_handle_wakeup(void)
{
int c;
c = prcm_clear_mod_irqs(WKUP_MOD, 1);
c += prcm_clear_mod_irqs(CORE_MOD, 1);
c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1);
if (omap_rev() > OMAP3430_REV_ES1_0) {
c += prcm_clear_mod_irqs(CORE_MOD, 3);
c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1);
}
return c;
}
/*
* PRCM Interrupt Handler
*
* The PRM_IRQSTATUS_MPU register indicates if there are any pending
* interrupts from the PRCM for the MPU. These bits must be cleared in
* order to clear the PRCM interrupt. The PRCM interrupt handler is
* implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
* the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
* register indicates that a wake-up event is pending for the MPU and
* this bit can only be cleared if the all the wake-up events latched
* in the various PM_WKST_x registers have been cleared. The interrupt
* handler is implemented using a do-while loop so that if a wake-up
* event occurred during the processing of the prcm interrupt handler
* (setting a bit in the corresponding PM_WKST_x register and thus
* preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
* this would be handled.
*/
static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
{
u32 wkst, irqstatus_mpu;
u32 fclk, iclk;
/* WKUP */
wkst = prm_read_mod_reg(WKUP_MOD, PM_WKST);
if (wkst) {
iclk = cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
fclk = cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_ICLKEN);
cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_FCLKEN);
prm_write_mod_reg(wkst, WKUP_MOD, PM_WKST);
while (prm_read_mod_reg(WKUP_MOD, PM_WKST))
cpu_relax();
cm_write_mod_reg(iclk, WKUP_MOD, CM_ICLKEN);
cm_write_mod_reg(fclk, WKUP_MOD, CM_FCLKEN);
}
/* CORE */
wkst = prm_read_mod_reg(CORE_MOD, PM_WKST1);
if (wkst) {
iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
fclk = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN1);
cm_set_mod_reg_bits(wkst, CORE_MOD, CM_FCLKEN1);
prm_write_mod_reg(wkst, CORE_MOD, PM_WKST1);
while (prm_read_mod_reg(CORE_MOD, PM_WKST1))
cpu_relax();
cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN1);
cm_write_mod_reg(fclk, CORE_MOD, CM_FCLKEN1);
}
wkst = prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3);
if (wkst) {
iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
fclk = cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN3);
cm_set_mod_reg_bits(wkst, CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
prm_write_mod_reg(wkst, CORE_MOD, OMAP3430ES2_PM_WKST3);
while (prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3))
cpu_relax();
cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN3);
cm_write_mod_reg(fclk, CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
}
/* PER */
wkst = prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST);
if (wkst) {
iclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
fclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_ICLKEN);
cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_FCLKEN);
prm_write_mod_reg(wkst, OMAP3430_PER_MOD, PM_WKST);
while (prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST))
cpu_relax();
cm_write_mod_reg(iclk, OMAP3430_PER_MOD, CM_ICLKEN);
cm_write_mod_reg(fclk, OMAP3430_PER_MOD, CM_FCLKEN);
}
if (omap_rev() > OMAP3430_REV_ES1_0) {
/* USBHOST */
wkst = prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKST);
if (wkst) {
iclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
CM_ICLKEN);
fclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
CM_FCLKEN);
cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD,
CM_ICLKEN);
cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD,
CM_FCLKEN);
prm_write_mod_reg(wkst, OMAP3430ES2_USBHOST_MOD,
PM_WKST);
while (prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
PM_WKST))
cpu_relax();
cm_write_mod_reg(iclk, OMAP3430ES2_USBHOST_MOD,
CM_ICLKEN);
cm_write_mod_reg(fclk, OMAP3430ES2_USBHOST_MOD,
CM_FCLKEN);
}
}
u32 irqstatus_mpu;
int c = 0;
do {
irqstatus_mpu = prm_read_mod_reg(OCP_MOD,
OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
if (irqstatus_mpu & (OMAP3430_WKUP_ST | OMAP3430_IO_ST)) {
c = _prcm_int_handle_wakeup();
/*
* Is the MPU PRCM interrupt handler racing with the
* IVA2 PRCM interrupt handler ?
*/
WARN(c == 0, "prcm: WARNING: PRCM indicated MPU wakeup "
"but no wakeup sources are marked\n");
} else {
/* XXX we need to expand our PRCM interrupt handler */
WARN(1, "prcm: WARNING: PRCM interrupt received, but "
"no code to handle it (%08x)\n", irqstatus_mpu);
}
prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET))
cpu_relax();
} while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET));
return IRQ_HANDLED;
}
@ -624,6 +639,17 @@ static void __init prcm_setup_regs(void)
prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN,
OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
/* Enable wakeups in PER */
prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 |
OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 |
OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3,
OMAP3430_PER_MOD, PM_WKEN);
/* and allow them to wake up MPU */
prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 |
OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 |
OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3,
OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
/* Don't attach IVA interrupts */
prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);

37
arch/arm/mach-omap2/powerdomain.c
View file

@ -273,35 +273,50 @@ struct powerdomain *pwrdm_lookup(const char *name)
}
/**
* pwrdm_for_each - call function on each registered clockdomain
* pwrdm_for_each_nolock - call function on each registered clockdomain
* @fn: callback function *
*
* Call the supplied function for each registered powerdomain. The
* callback function can return anything but 0 to bail out early from
* the iterator. The callback function is called with the pwrdm_rwlock
* held for reading, so no powerdomain structure manipulation
* functions should be called from the callback, although hardware
* powerdomain control functions are fine. Returns the last return
* value of the callback function, which should be 0 for success or
* anything else to indicate failure; or -EINVAL if the function
* pointer is null.
* the iterator. Returns the last return value of the callback function, which
* should be 0 for success or anything else to indicate failure; or -EINVAL if
* the function pointer is null.
*/
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
void *user)
{
struct powerdomain *temp_pwrdm;
unsigned long flags;
int ret = 0;
if (!fn)
return -EINVAL;
read_lock_irqsave(&pwrdm_rwlock, flags);
list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
ret = (*fn)(temp_pwrdm, user);
if (ret)
break;
}
return ret;
}
/**
* pwrdm_for_each - call function on each registered clockdomain
* @fn: callback function *
*
* This function is the same as 'pwrdm_for_each_nolock()', but keeps the
* &pwrdm_rwlock locked for reading, so no powerdomain structure manipulation
* functions should be called from the callback, although hardware powerdomain
* control functions are fine.
*/
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
void *user)
{
unsigned long flags;
int ret;
read_lock_irqsave(&pwrdm_rwlock, flags);
ret = pwrdm_for_each_nolock(fn, user);
read_unlock_irqrestore(&pwrdm_rwlock, flags);
return ret;

10
arch/arm/mach-omap2/serial.c
View file

@ -109,16 +109,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
.regshift = 2,
.uartclk = OMAP24XX_BASE_BAUD * 16,
}, {
#ifdef CONFIG_ARCH_OMAP4
.membase = OMAP2_IO_ADDRESS(OMAP_UART4_BASE),
.mapbase = OMAP_UART4_BASE,
.irq = 70,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP24XX_BASE_BAUD * 16,
}, {
#endif
.flags = 0
}
};

36
arch/arm/mach-pxa/cm-x300.c
View file

@ -43,10 +43,10 @@
#define CM_X300_ETH_PHYS 0x08000010
#define GPIO82_MMC2_IRQ (82)
#define GPIO85_MMC2_WP (85)
#define GPIO82_MMC_IRQ (82)
#define GPIO85_MMC_WP (85)
#define CM_X300_MMC2_IRQ IRQ_GPIO(GPIO82_MMC2_IRQ)
#define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ)
#define GPIO95_RTC_CS (95)
#define GPIO96_RTC_WR (96)
@ -292,34 +292,34 @@ static inline void cm_x300_init_nand(void) {}
#endif
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
/* The first MMC slot of CM-X300 is hardwired to Libertas card and has
static struct pxamci_platform_data cm_x300_mci_platform_data = {
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = GPIO82_MMC_IRQ,
.gpio_card_ro = GPIO85_MMC_WP,
.gpio_power = -1,
};
/* The second MMC slot of CM-X300 is hardwired to Libertas card and has
no detection/ro pins */
static int cm_x300_mci_init(struct device *dev,
static int cm_x300_mci2_init(struct device *dev,
irq_handler_t cm_x300_detect_int,
void *data)
{
return 0;
}
static void cm_x300_mci_exit(struct device *dev, void *data)
static void cm_x300_mci2_exit(struct device *dev, void *data)
{
}
static struct pxamci_platform_data cm_x300_mci_platform_data = {
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = cm_x300_mci_init,
.exit = cm_x300_mci_exit,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static struct pxamci_platform_data cm_x300_mci2_platform_data = {
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = GPIO82_MMC2_IRQ,
.gpio_card_ro = GPIO85_MMC2_WP,
.init = cm_x300_mci2_init,
.exit = cm_x300_mci2_exit,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};

2
arch/arm/mach-pxa/cpufreq-pxa2xx.c
View file

@ -155,7 +155,7 @@ MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table
static pxa_freqs_t pxa27x_freqs[] = {
{104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 },
{156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1), 1000000, 1705000 },
{156000, 104000, PXA27x_CCCR(1, 8, 3), 0, CCLKCFG2(1, 0, 1), 1000000, 1705000 },
{208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 },
{312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 },
{416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 },

2
arch/arm/mach-pxa/csb726.c
View file

@ -238,7 +238,7 @@ static struct resource csb726_lan_resources[] = {
};
struct smsc911x_platform_config csb726_lan_config = {
.irq_type = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
.flags = SMSC911X_USE_32BIT,
.phy_interface = PHY_INTERFACE_MODE_MII,

39
arch/arm/mach-pxa/spitz.c
View file

@ -15,6 +15,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/gpio_keys.h>
#include <linux/gpio.h>
#include <linux/leds.h>
#include <linux/mtd/physmap.h>
@ -375,6 +376,43 @@ static struct platform_device spitzkbd_device = {
};
static struct gpio_keys_button spitz_gpio_keys[] = {
{
.type = EV_PWR,
.code = KEY_SUSPEND,
.gpio = SPITZ_GPIO_ON_KEY,
.desc = "On/Off",
.wakeup = 1,
},
/* Two buttons detecting the lid state */
{
.type = EV_SW,
.code = 0,
.gpio = SPITZ_GPIO_SWA,
.desc = "Display Down",
},
{
.type = EV_SW,
.code = 1,
.gpio = SPITZ_GPIO_SWB,
.desc = "Lid Closed",
},
};
static struct gpio_keys_platform_data spitz_gpio_keys_platform_data = {
.buttons = spitz_gpio_keys,
.nbuttons = ARRAY_SIZE(spitz_gpio_keys),
};
static struct platform_device spitz_gpio_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &spitz_gpio_keys_platform_data,
},
};
/*
* Spitz LEDs
*/
@ -689,6 +727,7 @@ static struct platform_device sharpsl_rom_device = {
static struct platform_device *devices[] __initdata = {
&spitzscoop_device,
&spitzkbd_device,
&spitz_gpio_keys_device,
&spitzled_device,
&sharpsl_nand_device,
&sharpsl_rom_device,

1
arch/arm/mach-sa1100/Makefile
View file

@ -25,6 +25,7 @@ led-$(CONFIG_SA1100_CERF) += leds-cerf.o
obj-$(CONFIG_SA1100_COLLIE) += collie.o
obj-$(CONFIG_SA1100_H3100) += h3600.o
obj-$(CONFIG_SA1100_H3600) += h3600.o
obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o

5
arch/arm/mm/Kconfig
View file

@ -122,10 +122,7 @@ config CPU_ARM920T
select CPU_TLB_V4WBI if MMU
help
The ARM920T is licensed to be produced by numerous vendors,
and is used in the Maverick EP9312 and the Samsung S3C2410.
More information on the Maverick EP9312 at
<http://linuxdevices.com/products/PD2382866068.html>.
and is used in the Cirrus EP93xx and the Samsung S3C2410.
Say Y if you want support for the ARM920T processor.
Otherwise, say N.

20
arch/arm/mm/cache-v6.S
View file

@ -12,6 +12,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include "proc-macros.S"
@ -121,11 +122,13 @@ ENTRY(v6_coherent_kern_range)
* - the Icache does not read data from the write buffer
*/
ENTRY(v6_coherent_user_range)
UNWIND(.fnstart )
#ifdef HARVARD_CACHE
bic r0, r0, #CACHE_LINE_SIZE - 1
1: mcr p15, 0, r0, c7, c10, 1 @ clean D line
1:
USER( mcr p15, 0, r0, c7, c10, 1 ) @ clean D line
add r0, r0, #CACHE_LINE_SIZE
2:
cmp r0, r1
blo 1b
#endif
@ -142,6 +145,19 @@ ENTRY(v6_coherent_user_range)
#endif
mov pc, lr
/*
* Fault handling for the cache operation above. If the virtual address in r0
* isn't mapped, just try the next page.
*/
9001:
mov r0, r0, lsr #12
mov r0, r0, lsl #12
add r0, r0, #4096
b 2b
UNWIND(.fnend )
ENDPROC(v6_coherent_user_range)
ENDPROC(v6_coherent_kern_range)
/*
* v6_flush_kern_dcache_page(kaddr)
*

19
arch/arm/mm/cache-v7.S
View file

@ -13,6 +13,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include "proc-macros.S"
@ -153,13 +154,16 @@ ENTRY(v7_coherent_kern_range)
* - the Icache does not read data from the write buffer
*/
ENTRY(v7_coherent_user_range)
UNWIND(.fnstart )
dcache_line_size r2, r3
sub r3, r2, #1
bic r0, r0, r3
1: mcr p15, 0, r0, c7, c11, 1 @ clean D line to the point of unification
1:
USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification
dsb
mcr p15, 0, r0, c7, c5, 1 @ invalidate I line
USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line
add r0, r0, r2
2:
cmp r0, r1
blo 1b
mov r0, #0
@ -167,6 +171,17 @@ ENTRY(v7_coherent_user_range)
dsb
isb
mov pc, lr
/*
* Fault handling for the cache operation above. If the virtual address in r0
* isn't mapped, just try the next page.
*/
9001:
mov r0, r0, lsr #12
mov r0, r0, lsl #12
add r0, r0, #4096
b 2b
UNWIND(.fnend )
ENDPROC(v7_coherent_kern_range)
ENDPROC(v7_coherent_user_range)

7
arch/arm/mm/fault-armv.c
View file

@ -153,14 +153,11 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
page = pfn_to_page(pfn);
mapping = page_mapping(page);
if (mapping) {
#ifndef CONFIG_SMP
int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
if (dirty)
if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
__flush_dcache_page(mapping, page);
#endif
if (mapping) {
if (cache_is_vivt())
make_coherent(mapping, vma, addr, pfn);
else if (vma->vm_flags & VM_EXEC)

5
arch/arm/mm/fault.c
View file

@ -292,6 +292,11 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
* down_read()
*/
might_sleep();
#ifdef CONFIG_DEBUG_VM
if (!user_mode(regs) &&
!search_exception_tables(regs->ARM_pc))
goto no_context;
#endif
}
fault = __do_page_fault(mm, addr, fsr, tsk);

2
arch/arm/mm/highmem.c
View file

@ -46,6 +46,8 @@ void *kmap_atomic(struct page *page, enum km_type type)
if (!PageHighMem(page))
return page_address(page);
debug_kmap_atomic(type);
kmap = kmap_high_get(page);
if (kmap)
return kmap;

2
arch/arm/mm/init.c
View file

@ -483,7 +483,7 @@ free_memmap(int node, unsigned long start_pfn, unsigned long end_pfn)
/*
* Convert start_pfn/end_pfn to a struct page pointer.
*/
start_pg = pfn_to_page(start_pfn);
start_pg = pfn_to_page(start_pfn - 1) + 1;
end_pg = pfn_to_page(end_pfn);
/*

3
arch/arm/oprofile/op_model_v6.c
View file

@ -33,6 +33,9 @@ static int irqs[] = {
#ifdef CONFIG_ARCH_OMAP2
3,
#endif
#ifdef CONFIG_ARCH_BCMRING
IRQ_PMUIRQ, /* for BCMRING, ARM PMU interrupt is 43 */
#endif
};
static void armv6_pmu_stop(void)

27
arch/arm/plat-omap/dma.c
View file

@ -829,7 +829,7 @@ EXPORT_SYMBOL(omap_free_dma);
*
* @param arb_rate
* @param max_fifo_depth
* @param tparams - Number of thereads to reserve : DMA_THREAD_RESERVE_NORM
* @param tparams - Number of threads to reserve : DMA_THREAD_RESERVE_NORM
* DMA_THREAD_RESERVE_ONET
* DMA_THREAD_RESERVE_TWOT
* DMA_THREAD_RESERVE_THREET
@ -844,11 +844,14 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
return;
}
if (max_fifo_depth == 0)
max_fifo_depth = 1;
if (arb_rate == 0)
arb_rate = 1;
reg = (arb_rate & 0xff) << 16;
reg |= (0xff & max_fifo_depth);
reg = 0xff & max_fifo_depth;
reg |= (0x3 & tparams) << 12;
reg |= (arb_rate & 0xff) << 16;
dma_write(reg, GCR);
}
@ -975,6 +978,14 @@ void omap_stop_dma(int lch)
{
u32 l;
/* Disable all interrupts on the channel */
if (cpu_class_is_omap1())
dma_write(0, CICR(lch));
l = dma_read(CCR(lch));
l &= ~OMAP_DMA_CCR_EN;
dma_write(l, CCR(lch));
if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
int next_lch, cur_lch = lch;
char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
@ -992,18 +1003,8 @@ void omap_stop_dma(int lch)
next_lch = dma_chan[cur_lch].next_lch;
cur_lch = next_lch;
} while (next_lch != -1);
return;
}
/* Disable all interrupts on the channel */
if (cpu_class_is_omap1())
dma_write(0, CICR(lch));
l = dma_read(CCR(lch));
l &= ~OMAP_DMA_CCR_EN;
dma_write(l, CCR(lch));
dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
}
EXPORT_SYMBOL(omap_stop_dma);

37
arch/arm/plat-omap/include/mach/cpu.h
View file

@ -303,32 +303,21 @@ IS_OMAP_TYPE(3430, 0x3430)
#define cpu_is_omap2430() 0
#define cpu_is_omap3430() 0
#if defined(MULTI_OMAP1)
# if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730
# define cpu_is_omap730() is_omap730()
# endif
# if defined(CONFIG_ARCH_OMAP850)
# undef cpu_is_omap850
# define cpu_is_omap850() is_omap850()
# endif
#else
# if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730
# define cpu_is_omap730() 1
# endif
#endif
#else
# if defined(CONFIG_ARCH_OMAP850)
# undef cpu_is_omap850
# define cpu_is_omap850() 1
# endif
#endif
/*
* Whether we have MULTI_OMAP1 or not, we still need to distinguish
* between 330 vs. 1510 and 1611B/5912 vs. 1710.
* between 730 vs 850, 330 vs. 1510 and 1611B/5912 vs. 1710.
*/
#if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730
# define cpu_is_omap730() is_omap730()
#endif
#if defined(CONFIG_ARCH_OMAP850)
# undef cpu_is_omap850
# define cpu_is_omap850() is_omap850()
#endif
#if defined(CONFIG_ARCH_OMAP15XX)
# undef cpu_is_omap310
# undef cpu_is_omap1510
@ -433,3 +422,5 @@ IS_OMAP_TYPE(3430, 0x3430)
int omap_chip_is(struct omap_chip_id oci);
void omap2_check_revision(void);
#endif

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