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cs5535-gpio: request function, mask & names added
Changed number of gpio pins to 32 (according to datasheet) Added mask to disable some pins Added gpio_request for checking mask and disabling special pin functions Added pin names [dilinger@collabora.co.uk: make printk usage consistent] Signed-off-by: Tobias Mueller <Tobias_Mueller@twam.info> Signed-off-by: Andres Salomon <dilinger@collabora.co.uk> Cc: Takashi Iwai <tiwai@suse.de> Cc: Jordan Crouse <jordan@cosmicpenguin.net> Cc: David Brownell <david-b@pacbell.net> Cc: Alessandro Zummo <alessandro.zummo@towertech.it> Signed-off-by: Andres Salomon <dilinger@collabora.co.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
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5f0a96b044
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1ea3fa7bbf
1 changed files with 78 additions and 5 deletions
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@ -19,6 +19,29 @@
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#define DRV_NAME "cs5535-gpio"
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#define DRV_NAME "cs5535-gpio"
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#define GPIO_BAR 1
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#define GPIO_BAR 1
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/*
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* Some GPIO pins
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* 31-29,23 : reserved (always mask out)
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* 28 : Power Button
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* 26 : PME#
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* 22-16 : LPC
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* 14,15 : SMBus
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* 9,8 : UART1
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* 7 : PCI INTB
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* 3,4 : UART2/DDC
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* 2 : IDE_IRQ0
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* 1 : AC_BEEP
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* 0 : PCI INTA
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*
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* If a mask was not specified, allow all except
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* reserved and Power Button
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*/
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#define GPIO_DEFAULT_MASK 0x0F7FFFFF
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static ulong mask = GPIO_DEFAULT_MASK;
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module_param_named(mask, mask, ulong, 0444);
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MODULE_PARM_DESC(mask, "GPIO channel mask.");
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static struct cs5535_gpio_chip {
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static struct cs5535_gpio_chip {
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struct gpio_chip chip;
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struct gpio_chip chip;
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resource_size_t base;
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resource_size_t base;
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@ -102,6 +125,33 @@ EXPORT_SYMBOL_GPL(cs5535_gpio_isset);
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* Generic gpio_chip API support.
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* Generic gpio_chip API support.
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*/
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*/
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static int chip_gpio_request(struct gpio_chip *c, unsigned offset)
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{
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struct cs5535_gpio_chip *chip = (struct cs5535_gpio_chip *) c;
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unsigned long flags;
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spin_lock_irqsave(&chip->lock, flags);
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/* check if this pin is available */
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if ((mask & (1 << offset)) == 0) {
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dev_info(&chip->pdev->dev,
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"pin %u is not available (check mask)\n", offset);
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spin_unlock_irqrestore(&chip->lock, flags);
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return -EINVAL;
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}
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/* disable output aux 1 & 2 on this pin */
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__cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_AUX1);
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__cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_AUX2);
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/* disable input aux 1 on this pin */
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__cs5535_gpio_clear(chip, offset, GPIO_INPUT_AUX1);
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spin_unlock_irqrestore(&chip->lock, flags);
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return 0;
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}
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static int chip_gpio_get(struct gpio_chip *chip, unsigned offset)
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static int chip_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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{
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return cs5535_gpio_isset(offset, GPIO_OUTPUT_VAL);
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return cs5535_gpio_isset(offset, GPIO_OUTPUT_VAL);
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@ -145,13 +195,26 @@ static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val)
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return 0;
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return 0;
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}
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}
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static char *cs5535_gpio_names[] = {
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"GPIO0", "GPIO1", "GPIO2", "GPIO3",
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"GPIO4", "GPIO5", "GPIO6", "GPIO7",
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"GPIO8", "GPIO9", "GPIO10", "GPIO11",
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"GPIO12", "GPIO13", "GPIO14", "GPIO15",
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"GPIO16", "GPIO17", "GPIO18", "GPIO19",
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"GPIO20", "GPIO21", "GPIO22", NULL,
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"GPIO24", "GPIO25", "GPIO26", "GPIO27",
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"GPIO28", NULL, NULL, NULL,
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};
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static struct cs5535_gpio_chip cs5535_gpio_chip = {
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static struct cs5535_gpio_chip cs5535_gpio_chip = {
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.chip = {
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.chip = {
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.owner = THIS_MODULE,
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.owner = THIS_MODULE,
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.label = DRV_NAME,
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.label = DRV_NAME,
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.base = 0,
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.base = 0,
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.ngpio = 28,
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.ngpio = 32,
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.names = cs5535_gpio_names,
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.request = chip_gpio_request,
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.get = chip_gpio_get,
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.get = chip_gpio_get,
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.set = chip_gpio_set,
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.set = chip_gpio_set,
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@ -165,6 +228,7 @@ static int __init cs5535_gpio_probe(struct pci_dev *pdev,
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const struct pci_device_id *pci_id)
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const struct pci_device_id *pci_id)
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{
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{
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int err;
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int err;
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ulong mask_orig = mask;
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/* There are two ways to get the GPIO base address; one is by
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/* There are two ways to get the GPIO base address; one is by
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* fetching it from MSR_LBAR_GPIO, the other is by reading the
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* fetching it from MSR_LBAR_GPIO, the other is by reading the
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@ -193,14 +257,23 @@ static int __init cs5535_gpio_probe(struct pci_dev *pdev,
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dev_info(&pdev->dev, "allocated PCI BAR #%d: base 0x%llx\n", GPIO_BAR,
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dev_info(&pdev->dev, "allocated PCI BAR #%d: base 0x%llx\n", GPIO_BAR,
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(unsigned long long) cs5535_gpio_chip.base);
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(unsigned long long) cs5535_gpio_chip.base);
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/* mask out reserved pins */
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mask &= 0x1F7FFFFF;
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/* do not allow pin 28, Power Button, as there's special handling
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* in the PMC needed. (note 12, p. 48) */
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mask &= ~(1 << 28);
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if (mask_orig != mask)
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dev_info(&pdev->dev, "mask changed from 0x%08lX to 0x%08lX\n",
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mask_orig, mask);
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/* finally, register with the generic GPIO API */
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/* finally, register with the generic GPIO API */
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err = gpiochip_add(&cs5535_gpio_chip.chip);
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err = gpiochip_add(&cs5535_gpio_chip.chip);
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if (err) {
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if (err)
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dev_err(&pdev->dev, "failed to register gpio chip\n");
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goto release_region;
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goto release_region;
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}
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printk(KERN_INFO DRV_NAME ": GPIO support successfully loaded.\n");
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dev_info(&pdev->dev, DRV_NAME ": GPIO support successfully loaded.\n");
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return 0;
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return 0;
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release_region:
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release_region:
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