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[SCSI] qla2xxx: Synchronize MPI settings after a PE Reset.
Ensure MPS remains in synchronization across all NIC/FCoE functions after a reset. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
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656e89122a
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18e7555a38
3 changed files with 121 additions and 0 deletions
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@ -299,6 +299,12 @@ qla2x00_get_xgmac_stats(scsi_qla_host_t *, dma_addr_t, uint16_t, uint16_t *);
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extern int
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qla2x00_get_dcbx_params(scsi_qla_host_t *, dma_addr_t, uint16_t);
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extern int
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qla2x00_read_ram_word(scsi_qla_host_t *, uint32_t, uint32_t *);
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extern int
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qla2x00_write_ram_word(scsi_qla_host_t *, uint32_t, uint32_t);
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/*
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* Global Function Prototypes in qla_isr.c source file.
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*/
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@ -886,6 +886,56 @@ cont_alloc:
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htonl(offsetof(struct qla2xxx_fw_dump, isp));
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}
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static int
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qla81xx_mpi_sync(scsi_qla_host_t *vha)
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{
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#define MPS_MASK 0xe0
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int rval;
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uint16_t dc;
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uint32_t dw;
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struct qla_hw_data *ha = vha->hw;
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if (!IS_QLA81XX(vha->hw))
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return QLA_SUCCESS;
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rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
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if (rval != QLA_SUCCESS) {
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DEBUG2(qla_printk(KERN_WARNING, ha,
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"Sync-MPI: Unable to acquire semaphore.\n"));
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goto done;
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}
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pci_read_config_word(vha->hw->pdev, 0x54, &dc);
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rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
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if (rval != QLA_SUCCESS) {
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DEBUG2(qla_printk(KERN_WARNING, ha,
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"Sync-MPI: Unable to read sync.\n"));
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goto done_release;
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}
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dc &= MPS_MASK;
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if (dc == (dw & MPS_MASK))
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goto done_release;
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dw &= ~MPS_MASK;
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dw |= dc;
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rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
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if (rval != QLA_SUCCESS) {
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DEBUG2(qla_printk(KERN_WARNING, ha,
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"Sync-MPI: Unable to gain sync.\n"));
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}
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done_release:
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rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
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if (rval != QLA_SUCCESS) {
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DEBUG2(qla_printk(KERN_WARNING, ha,
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"Sync-MPI: Unable to release semaphore.\n"));
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}
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done:
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return rval;
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}
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/**
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* qla2x00_setup_chip() - Load and start RISC firmware.
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* @ha: HA context
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@ -910,6 +960,8 @@ qla2x00_setup_chip(scsi_qla_host_t *vha)
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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}
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qla81xx_mpi_sync(vha);
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/* Load firmware sequences */
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rval = ha->isp_ops->load_risc(vha, &srisc_address);
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if (rval == QLA_SUCCESS) {
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@ -3545,3 +3545,66 @@ qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
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return rval;
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}
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int
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qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
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{
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int rval;
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mbx_cmd_t mc;
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mbx_cmd_t *mcp = &mc;
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if (!IS_FWI2_CAPABLE(vha->hw))
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return QLA_FUNCTION_FAILED;
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DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
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mcp->mb[0] = MBC_READ_RAM_EXTENDED;
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mcp->mb[1] = LSW(risc_addr);
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mcp->mb[8] = MSW(risc_addr);
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mcp->out_mb = MBX_8|MBX_1|MBX_0;
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mcp->in_mb = MBX_3|MBX_2|MBX_0;
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mcp->tov = 30;
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mcp->flags = 0;
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rval = qla2x00_mailbox_command(vha, mcp);
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if (rval != QLA_SUCCESS) {
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DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
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vha->host_no, rval, mcp->mb[0]));
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} else {
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DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
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*data = mcp->mb[3] << 16 | mcp->mb[2];
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}
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return rval;
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}
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int
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qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
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{
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int rval;
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mbx_cmd_t mc;
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mbx_cmd_t *mcp = &mc;
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if (!IS_FWI2_CAPABLE(vha->hw))
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return QLA_FUNCTION_FAILED;
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DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
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mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
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mcp->mb[1] = LSW(risc_addr);
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mcp->mb[2] = LSW(data);
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mcp->mb[3] = MSW(data);
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mcp->mb[8] = MSW(risc_addr);
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mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
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mcp->in_mb = MBX_0;
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mcp->tov = 30;
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mcp->flags = 0;
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rval = qla2x00_mailbox_command(vha, mcp);
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if (rval != QLA_SUCCESS) {
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DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
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vha->host_no, rval, mcp->mb[0]));
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} else {
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DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
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}
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return rval;
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}
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