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bnx2x: Fix Parallel-Detect settings
Enable Parallel-Detect for 10G and 1G only if the relevant speed capability is enabled Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 9 additions and 6 deletions
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@ -1107,18 +1107,21 @@ static void bnx2x_set_parallel_detection(struct link_params *params,
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MDIO_REG_BANK_SERDES_DIGITAL,
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MDIO_SERDES_DIGITAL_A_1000X_CONTROL2,
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&control2);
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control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN;
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if (params->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)
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control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN;
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else
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control2 &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN;
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DP(NETIF_MSG_LINK, "params->speed_cap_mask = 0x%x, control2 = 0x%x\n",
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params->speed_cap_mask, control2);
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CL45_WR_OVER_CL22(bp, params->port,
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params->phy_addr,
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MDIO_REG_BANK_SERDES_DIGITAL,
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MDIO_SERDES_DIGITAL_A_1000X_CONTROL2,
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control2);
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if (phy_flags & PHY_XGXS_FLAG) {
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if ((phy_flags & PHY_XGXS_FLAG) &&
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(params->speed_cap_mask &
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PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) {
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DP(NETIF_MSG_LINK, "XGXS\n");
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CL45_WR_OVER_CL22(bp, params->port,
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