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pm2fb: Permedia 2V initialization fixes
This patch: - initializes correctly the Permedia2V chip if it is not initialized by BIOS - puts back clock frequency for the ELSA WINNER board to 100kHz - fixes returned error values from setcolreg() function - uses more general classes for PCI ids Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Krzysztof Helt
Linus Torvalds
parent
45f169ec81
commit
138a451cce
2 changed files with 19 additions and 24 deletions
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@ -343,7 +343,7 @@ static void reset_card(struct pm2fb_par* p)
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static void reset_config(struct pm2fb_par* p)
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{
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WAIT_FIFO(p, 52);
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WAIT_FIFO(p, 53);
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pm2_WR(p, PM2R_CHIP_CONFIG, pm2_RD(p, PM2R_CHIP_CONFIG) &
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~(PM2F_VGA_ENABLE | PM2F_VGA_FIXED));
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pm2_WR(p, PM2R_BYPASS_WRITE_MASK, ~(0L));
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@ -380,6 +380,7 @@ static void reset_config(struct pm2fb_par* p)
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pm2_WR(p, PM2R_STATISTICS_MODE, 0);
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pm2_WR(p, PM2R_SCISSOR_MODE, 0);
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pm2_WR(p, PM2R_FILTER_MODE, PM2F_SYNCHRONIZATION);
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pm2_WR(p, PM2R_RD_PIXEL_MASK, 0xff);
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switch (p->type) {
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case PM2_TYPE_PERMEDIA2:
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pm2_RDAC_WR(p, PM2I_RD_MODE_CONTROL, 0); /* no overlay */
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@ -393,11 +394,6 @@ static void reset_config(struct pm2fb_par* p)
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break;
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case PM2_TYPE_PERMEDIA2V:
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pm2v_RDAC_WR(p, PM2VI_RD_MISC_CONTROL, 1); /* 8bit */
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pm2v_RDAC_WR(p, PM2I_RD_COLOR_KEY_CONTROL, 0);
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pm2v_RDAC_WR(p, PM2I_RD_OVERLAY_KEY, 0);
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pm2v_RDAC_WR(p, PM2I_RD_RED_KEY, 0);
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pm2v_RDAC_WR(p, PM2I_RD_GREEN_KEY, 0);
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pm2v_RDAC_WR(p, PM2I_RD_BLUE_KEY, 0);
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break;
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}
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}
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@ -532,7 +528,7 @@ static void set_video(struct pm2fb_par* p, u32 video) {
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vsync &= ~(PM2F_HSYNC_MASK | PM2F_VSYNC_MASK);
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vsync |= PM2F_HSYNC_ACT_HIGH | PM2F_VSYNC_ACT_HIGH;
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WAIT_FIFO(p, 5);
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WAIT_FIFO(p, 3);
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pm2_WR(p, PM2R_VIDEO_CONTROL, vsync);
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switch (p->type) {
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@ -551,7 +547,6 @@ static void set_video(struct pm2fb_par* p, u32 video) {
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if ((video & PM2F_VSYNC_MASK) == PM2F_VSYNC_ACT_LOW)
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tmp |= 4; /* invert vsync */
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pm2v_RDAC_WR(p, PM2VI_RD_SYNC_CONTROL, tmp);
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pm2v_RDAC_WR(p, PM2VI_RD_MISC_CONTROL, 1);
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break;
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}
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}
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@ -686,6 +681,7 @@ static int pm2fb_set_par(struct fb_info *info)
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u32 txtmap = 0;
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u32 pixsize = 0;
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u32 clrformat = 0;
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u32 misc = 1; /* 8-bit DAC */
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u32 xres = (info->var.xres + 31) & ~31;
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int data64;
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@ -767,7 +763,7 @@ static int pm2fb_set_par(struct fb_info *info)
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switch (depth) {
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case 8:
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pm2_WR(par, PM2R_FB_READ_PIXEL, 0);
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clrformat = 0x0e;
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clrformat = 0x2e;
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break;
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case 16:
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pm2_WR(par, PM2R_FB_READ_PIXEL, 1);
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@ -775,6 +771,7 @@ static int pm2fb_set_par(struct fb_info *info)
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txtmap = PM2F_TEXTEL_SIZE_16;
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pixsize = 1;
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clrformat = 0x70;
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misc |= 8;
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break;
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case 32:
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pm2_WR(par, PM2R_FB_READ_PIXEL, 2);
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@ -782,6 +779,7 @@ static int pm2fb_set_par(struct fb_info *info)
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txtmap = PM2F_TEXTEL_SIZE_32;
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pixsize = 2;
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clrformat = 0x20;
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misc |= 8;
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break;
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case 24:
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pm2_WR(par, PM2R_FB_READ_PIXEL, 4);
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@ -789,6 +787,7 @@ static int pm2fb_set_par(struct fb_info *info)
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txtmap = PM2F_TEXTEL_SIZE_24;
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pixsize = 4;
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clrformat = 0x20;
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misc |= 8;
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break;
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}
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pm2_WR(par, PM2R_FB_WRITE_MODE, PM2F_FB_WRITE_ENABLE);
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@ -813,7 +812,7 @@ static int pm2fb_set_par(struct fb_info *info)
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pm2_WR(par, PM2R_SCREEN_BASE, base);
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wmb();
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set_video(par, video);
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WAIT_FIFO(par, 6);
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WAIT_FIFO(par, 10);
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switch (par->type) {
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case PM2_TYPE_PERMEDIA2:
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pm2_RDAC_WR(par, PM2I_RD_COLOR_MODE, clrmode);
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@ -821,10 +820,11 @@ static int pm2fb_set_par(struct fb_info *info)
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(depth == 8) ? 0 : PM2F_COLOR_KEY_TEST_OFF);
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break;
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case PM2_TYPE_PERMEDIA2V:
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pm2v_RDAC_WR(par, PM2VI_RD_DAC_CONTROL, 0);
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pm2v_RDAC_WR(par, PM2VI_RD_PIXEL_SIZE, pixsize);
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pm2v_RDAC_WR(par, PM2VI_RD_COLOR_FORMAT, clrformat);
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pm2v_RDAC_WR(par, PM2I_RD_COLOR_KEY_CONTROL,
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(depth == 8) ? 0 : PM2F_COLOR_KEY_TEST_OFF);
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pm2v_RDAC_WR(par, PM2VI_RD_MISC_CONTROL, misc);
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pm2v_RDAC_WR(par, PM2VI_RD_OVERLAY_KEY, 0);
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break;
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}
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set_pixclock(par, pixclock);
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@ -855,7 +855,7 @@ static int pm2fb_setcolreg(unsigned regno, unsigned red, unsigned green,
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struct pm2fb_par *par = info->par;
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if (regno >= info->cmap.len) /* no. of hw registers */
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return 1;
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return -EINVAL;
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/*
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* Program hardware... do anything you want with transp
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*/
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@ -914,7 +914,7 @@ static int pm2fb_setcolreg(unsigned regno, unsigned red, unsigned green,
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u32 v;
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if (regno >= 16)
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return 1;
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return -EINVAL;
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v = (red << info->var.red.offset) |
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(green << info->var.green.offset) |
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@ -1341,7 +1341,7 @@ static int __devinit pm2fb_probe(struct pci_dev *pdev,
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DPRINTK("We have not been initialized by VGA BIOS "
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"and are running on an Elsa Winner 2000 Office\n");
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DPRINTK("Initializing card timings manually...\n");
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default_par->memclock = 70000;
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default_par->memclock = 100000;
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}
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if (pdev->subsystem_vendor == 0x3d3d &&
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pdev->subsystem_device == 0x0100) {
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@ -1491,17 +1491,11 @@ static void __devexit pm2fb_remove(struct pci_dev *pdev)
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static struct pci_device_id pm2fb_id_table[] = {
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{ PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_TVP4020,
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PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
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0xff0000, 0 },
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PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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{ PCI_VENDOR_ID_3DLABS, PCI_DEVICE_ID_3DLABS_PERMEDIA2,
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PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
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0xff0000, 0 },
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PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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{ PCI_VENDOR_ID_3DLABS, PCI_DEVICE_ID_3DLABS_PERMEDIA2V,
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PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
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0xff0000, 0 },
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{ PCI_VENDOR_ID_3DLABS, PCI_DEVICE_ID_3DLABS_PERMEDIA2V,
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PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NOT_DEFINED_VGA << 8,
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0xff00, 0 },
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PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
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{ 0, }
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};
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@ -153,6 +153,7 @@
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#define PM2VI_RD_CURSOR_Y_HIGH 0x00A
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#define PM2VI_RD_CURSOR_X_HOT 0x00B
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#define PM2VI_RD_CURSOR_Y_HOT 0x00C
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#define PM2VI_RD_OVERLAY_KEY 0x00D
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#define PM2VI_RD_CLK0_PRESCALE 0x201
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#define PM2VI_RD_CLK0_FEEDBACK 0x202
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#define PM2VI_RD_CLK0_POSTSCALE 0x203
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