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[MIPS] No need to write c0_compare in plat_timer_setup
If R4k counter was used for hpt_timer and interrupt source, c0_hpt_timer_init() initializes the c0_compare register. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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a0574e0480
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5 changed files with 0 additions and 26 deletions
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@ -116,7 +116,6 @@ static void lasat_time_init(void)
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void __init plat_timer_setup(struct irqaction *irq)
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{
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write_c0_compare( read_c0_count() + mips_hpt_frequency / HZ);
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change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
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}
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@ -295,7 +295,4 @@ void __init plat_timer_setup(struct irqaction *irq)
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irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
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set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
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#endif
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/* to generate the first timer interrupt */
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write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ);
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}
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@ -199,7 +199,4 @@ void __init plat_timer_setup(struct irqaction *irq)
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irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU;
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set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
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#endif
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/* to generate the first timer interrupt */
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write_c0_compare(read_c0_count() + (mips_hpt_frequency/HZ));
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}
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@ -81,18 +81,8 @@ void __init tx4927_time_init(void)
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void __init plat_timer_setup(struct irqaction *irq)
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{
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u32 count;
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u32 c1;
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u32 c2;
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setup_irq(TX4927_IRQ_CPU_TIMER, irq);
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/* to generate the first timer interrupt */
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c1 = read_c0_count();
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count = c1 + (mips_hpt_frequency / HZ);
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write_c0_compare(count);
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c2 = read_c0_count();
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#ifdef CONFIG_TOSHIBA_RBTX4927
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{
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extern void toshiba_rbtx4927_timer_setup(struct irqaction
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@ -55,14 +55,5 @@ tx4938_time_init(void)
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void __init plat_timer_setup(struct irqaction *irq)
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{
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u32 count;
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u32 c1;
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u32 c2;
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setup_irq(TX4938_IRQ_CPU_TIMER, irq);
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c1 = read_c0_count();
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count = c1 + (mips_hpt_frequency / HZ);
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write_c0_compare(count);
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c2 = read_c0_count();
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}
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