powerpc: add fsl,fifo-depth property to Freescale SSI device nodes

The Freescale Serial Synchronous Interface (SSI) is an audio device present on
some Freescale SOCs.  Various implementations of the SSI have a different
transmit and receive FIFO depth, but are otherwise identical.  To support
these variations, add a new property fsl,fifo-depth to the SSI node that
specifies the depth of the FIFOs.

Also update the MPC8610 HPCD device tree with this property.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Timur Tabi 2009-03-04 14:55:30 -06:00 committed by Kumar Gala
parent c3071951d0
commit 0bcd783c1f
2 changed files with 4 additions and 0 deletions

View file

@ -30,6 +30,8 @@ Required properties:
- fsl,capture-dma: phandle to a node for the DMA channel to use for
capture (recording) of audio. This is typically dictated
by SOC design. See the notes below.
- fsl,fifo-depth: the number of elements in the transmit and receive FIFOs.
This number is the maximum allowed value for SFCSR[TFWM0].
Optional properties:
- codec-handle : phandle to a 'codec' node that defines an audio

View file

@ -217,6 +217,7 @@
codec-handle = <&cs4270>;
fsl,playback-dma = <&dma00>;
fsl,capture-dma = <&dma01>;
fsl,fifo-depth = <8>;
};
ssi@16100 {
@ -225,6 +226,7 @@
reg = <0x16100 0x100>;
interrupt-parent = <&mpic>;
interrupts = <63 2>;
fsl,fifo-depth = <8>;
};
dma@21300 {