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Merge remote branch 'anholt/drm-intel-next' into drm-linus

Browse source 
Pull more Intel changes in, especially one to init the GTT properly
This commit is contained in:
Dave Airlie 2009-12-10 15:44:11 +10:00
commit 0b5e8db639
8 changed files with 34 additions and 29 deletions
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7
drivers/char/agp/intel-agp.c
View file

@ -178,6 +178,7 @@ static struct _intel_private {
* popup and for the GTT.
*/
int gtt_entries; /* i830+ */
int gtt_total_size;
union {
void __iomem *i9xx_flush_page;
void *i8xx_flush_page;
@ -1153,7 +1154,7 @@ static int intel_i915_configure(void)
readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
if (agp_bridge->driver->needs_scratch_page) {
for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) {
for (i = intel_private.gtt_entries; i < intel_private.gtt_total_size; i++) {
writel(agp_bridge->scratch_page, intel_private.gtt+i);
}
readl(intel_private.gtt+i-1); /* PCI Posting. */
@ -1308,6 +1309,8 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
if (!intel_private.gtt)
return -ENOMEM;
intel_private.gtt_total_size = gtt_map_size / 4;
temp &= 0xfff80000;
intel_private.registers = ioremap(temp, 128 * 4096);
@ -1395,6 +1398,8 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
if (!intel_private.gtt)
return -ENOMEM;
intel_private.gtt_total_size = gtt_size / 4;
intel_private.registers = ioremap(temp, 128 * 4096);
if (!intel_private.registers) {
iounmap(intel_private.gtt);

5
drivers/gpu/drm/i915/i915_debugfs.c
View file

@ -97,13 +97,14 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
{
struct drm_gem_object *obj = obj_priv->obj;
seq_printf(m, " %p: %s %8zd %08x %08x %d %s",
seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
obj,
get_pin_flag(obj_priv),
obj->size,
obj->read_domains, obj->write_domain,
obj_priv->last_rendering_seqno,
obj_priv->dirty ? "dirty" : "");
obj_priv->dirty ? " dirty" : "",
obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
if (obj->name)
seq_printf(m, " (name: %d)", obj->name);

2
drivers/gpu/drm/i915/i915_drv.h
View file

@ -383,8 +383,6 @@ typedef struct drm_i915_private {
u32 saveFDI_RXA_IMR;
u32 saveFDI_RXB_IMR;
u32 saveCACHE_MODE_0;
u32 saveD_STATE;
u32 saveDSPCLK_GATE_D;
u32 saveMI_ARB_STATE;
u32 saveSWF0[16];
u32 saveSWF1[16];

1
drivers/gpu/drm/i915/i915_gem.c
View file

@ -1288,6 +1288,7 @@ i915_gem_create_mmap_offset(struct drm_gem_object *obj)
list->hash.key = list->file_offset_node->start;
if (drm_ht_insert_item(&mm->offset_hash, &list->hash)) {
DRM_ERROR("failed to add to map hash\n");
ret = -ENOMEM;
goto out_free_mm;
}

1
drivers/gpu/drm/i915/i915_irq.c
View file

@ -546,7 +546,6 @@ static void i915_handle_error(struct drm_device *dev, bool wedged)
/*
* Wakeup waiting processes so they don't hang
*/
printk("i915: Waking up sleeping processes\n");
DRM_WAKEUP(&dev_priv->irq_queue);
}

7
drivers/gpu/drm/i915/i915_suspend.c
View file

@ -756,10 +756,6 @@ int i915_save_state(struct drm_device *dev)
dev_priv->saveIMR = I915_READ(IMR);
}
/* Clock gating state */
dev_priv->saveD_STATE = I915_READ(D_STATE);
dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); /* Not sure about this */
/* Cache mode state */
dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
@ -834,8 +830,7 @@ int i915_restore_state(struct drm_device *dev)
}
/* Clock gating state */
I915_WRITE (D_STATE, dev_priv->saveD_STATE);
I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
intel_init_clock_gating(dev);
/* Cache mode state */
I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);

39
drivers/gpu/drm/i915/intel_display.c
View file

@ -4584,28 +4584,33 @@ void intel_init_clock_gating(struct drm_device *dev)
struct drm_i915_gem_object *obj_priv;
int ret;
pwrctx = drm_gem_object_alloc(dev, 4096);
if (!pwrctx) {
DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
goto out;
if (dev_priv->pwrctx) {
obj_priv = dev_priv->pwrctx->driver_private;
} else {
pwrctx = drm_gem_object_alloc(dev, 4096);
if (!pwrctx) {
DRM_DEBUG("failed to alloc power context, "
"RC6 disabled\n");
goto out;
}
ret = i915_gem_object_pin(pwrctx, 4096);
if (ret) {
DRM_ERROR("failed to pin power context: %d\n",
ret);
drm_gem_object_unreference(pwrctx);
goto out;
}
i915_gem_object_set_to_gtt_domain(pwrctx, 1);
dev_priv->pwrctx = pwrctx;
obj_priv = pwrctx->driver_private;
}
ret = i915_gem_object_pin(pwrctx, 4096);
if (ret) {
DRM_ERROR("failed to pin power context: %d\n", ret);
drm_gem_object_unreference(pwrctx);
goto out;
}
i915_gem_object_set_to_gtt_domain(pwrctx, 1);
obj_priv = pwrctx->driver_private;
I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN);
I915_WRITE(MCHBAR_RENDER_STANDBY,
I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
dev_priv->pwrctx = pwrctx;
}
out:

1
drivers/gpu/drm/i915/intel_drv.h
View file

@ -208,6 +208,7 @@ extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
u16 blue, int regno);
extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
u16 *blue, int regno);
extern void intel_init_clock_gating(struct drm_device *dev);
extern int intel_framebuffer_create(struct drm_device *dev,
struct drm_mode_fb_cmd *mode_cmd,