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[TG3]: ethtool -d hangs PCIe systems
Resubmitting after recommendation to use GET_REG32_1() instead of GET_REG32_LOOP(..., 1). Retested. Problem remains fixed. Prevent tg3_get_regs() from reading reserved and undocumented registers at RX_CPU_BASE and TX_CPU_BASE offsets which caused hostile behavior on PCIe platforms. Acked-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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67dbb4ea33
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091465d751
2 changed files with 14 additions and 2 deletions
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@ -7151,8 +7151,13 @@ do { p = (u32 *)(orig_p + (reg)); \
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GET_REG32_LOOP(BUFMGR_MODE, 0x58);
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GET_REG32_LOOP(RDMAC_MODE, 0x08);
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GET_REG32_LOOP(WDMAC_MODE, 0x08);
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GET_REG32_LOOP(RX_CPU_BASE, 0x280);
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GET_REG32_LOOP(TX_CPU_BASE, 0x280);
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GET_REG32_1(RX_CPU_MODE);
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GET_REG32_1(RX_CPU_STATE);
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GET_REG32_1(RX_CPU_PGMCTR);
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GET_REG32_1(RX_CPU_HWBKPT);
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GET_REG32_1(TX_CPU_MODE);
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GET_REG32_1(TX_CPU_STATE);
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GET_REG32_1(TX_CPU_PGMCTR);
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GET_REG32_LOOP(GRCMBOX_INTERRUPT_0, 0x110);
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GET_REG32_LOOP(FTQ_RESET, 0x120);
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GET_REG32_LOOP(MSGINT_MODE, 0x0c);
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@ -1124,7 +1124,14 @@
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/* 0x280 --> 0x400 unused */
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#define RX_CPU_BASE 0x00005000
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#define RX_CPU_MODE 0x00005000
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#define RX_CPU_STATE 0x00005004
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#define RX_CPU_PGMCTR 0x0000501c
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#define RX_CPU_HWBKPT 0x00005034
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#define TX_CPU_BASE 0x00005400
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#define TX_CPU_MODE 0x00005400
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#define TX_CPU_STATE 0x00005404
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#define TX_CPU_PGMCTR 0x0000541c
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/* Mailboxes */
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#define GRCMBOX_INTERRUPT_0 0x00005800 /* 64-bit */
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