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skge: genesis phy initialzation
The SysKonnect Genesis based board would fail on initialization with phy_read errors caused by not waiting for last phy write. Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
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a9cdab869e
commit
0781191cf6
1 changed files with 26 additions and 11 deletions
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@ -879,13 +879,12 @@ static int __xm_phy_read(struct skge_hw *hw, int port, u16 reg, u16 *val)
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int i;
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xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr);
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xm_read16(hw, port, XM_PHY_DATA);
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*val = xm_read16(hw, port, XM_PHY_DATA);
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/* Need to wait for external PHY */
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for (i = 0; i < PHY_RETRIES; i++) {
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udelay(1);
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if (xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_RDY)
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goto ready;
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udelay(1);
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}
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return -ETIMEDOUT;
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@ -918,7 +917,12 @@ static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
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ready:
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xm_write16(hw, port, XM_PHY_DATA, val);
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return 0;
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for (i = 0; i < PHY_RETRIES; i++) {
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if (!(xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_BUSY))
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return 0;
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udelay(1);
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}
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return -ETIMEDOUT;
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}
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static void genesis_init(struct skge_hw *hw)
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@ -1168,13 +1172,17 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
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u32 r;
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const u8 zero[6] = { 0 };
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/* Clear MIB counters */
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xm_write16(hw, port, XM_STAT_CMD,
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XM_SC_CLR_RXC | XM_SC_CLR_TXC);
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/* Clear two times according to Errata #3 */
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xm_write16(hw, port, XM_STAT_CMD,
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XM_SC_CLR_RXC | XM_SC_CLR_TXC);
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for (i = 0; i < 10; i++) {
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skge_write16(hw, SK_REG(port, TX_MFF_CTRL1),
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MFF_SET_MAC_RST);
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if (skge_read16(hw, SK_REG(port, TX_MFF_CTRL1)) & MFF_SET_MAC_RST)
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goto reset_ok;
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udelay(1);
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}
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printk(KERN_WARNING PFX "%s: genesis reset failed\n", dev->name);
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reset_ok:
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/* Unreset the XMAC. */
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skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
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@ -1191,7 +1199,7 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
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r |= GP_DIR_2|GP_IO_2;
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skge_write32(hw, B2_GP_IO, r);
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skge_read32(hw, B2_GP_IO);
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/* Enable GMII interface */
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xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD);
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@ -1205,6 +1213,13 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
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for (i = 1; i < 16; i++)
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xm_outaddr(hw, port, XM_EXM(i), zero);
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/* Clear MIB counters */
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xm_write16(hw, port, XM_STAT_CMD,
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XM_SC_CLR_RXC | XM_SC_CLR_TXC);
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/* Clear two times according to Errata #3 */
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xm_write16(hw, port, XM_STAT_CMD,
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XM_SC_CLR_RXC | XM_SC_CLR_TXC);
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/* configure Rx High Water Mark (XM_RX_HI_WM) */
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xm_write16(hw, port, XM_RX_HI_WM, 1450);
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